DATE 2005:
Munich,
Germany
2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany.
IEEE Computer Society 2005, ISBN 0-7695-2288-2 BibTeX
Volume 1
Keynote Addresses
- Jeong-Taek Kong:
SoC in Nanoera: Challenges and Endless Possibility.
2 BibTeX
- Garry Hughes:
Striking a New Balance in the Nanometer Era: First-Time-Right and Time-to-Market Demands Versus Technology Challenges.
3 BibTeX
1A:
Partitioning and Optimisation for Reconfigurable Computing
Interactive Presentations
1B:
Hot Topic - Analogue/Digital Circuit Design in 65nm:
End of the Road
1C:
SoC Design-for-Test
Interactive Presentation
1E:
Embedded Tutorial - Cross-Pollination between HW and SW - Hard Lessons for Software,
and Vice Versa
1F:
Low Power Design with Error Tolerance
- Diana Marculescu:
Energy Bounds for Fault-Tolerant Nanoscale Designs.
74-79
Electronic Edition (link) BibTeX
- Himanshu Kaul, Dennis Sylvester, David Blaauw, Trevor N. Mudge, Todd M. Austin:
DVS for On-Chip Bus Designs Based on Timing Error Correction.
80-85
Electronic Edition (link) BibTeX
- Le Cai, Yung-Hsiang Lu:
Joint Power Management of Memory and Disk.
86-91
Electronic Edition (link) BibTeX
- Jia Yu, Wei Wu, Xi Chen, Harry Hsieh, Jun Yang, Felice Balarin:
Assertion-Based Design Exploration of DVS in Network Processor Architectures.
92-97
Electronic Edition (link) BibTeX
2A:
Scheduling and Synthesis for Reconfigurable Computin
2B:
Analogue Simulation,
Placement and Statistical Analysis
2C:
Analogue and Gigahertz Test
Interactive Presentations
2E:
Ubiquitous Computing:
Security and Energy Aspects
- Divya Arora, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha:
Secure Embedded Processing through Hardware-Assisted Run-Time Monitoring.
178-183
Electronic Edition (link) BibTeX
- Jung-Chun Kao, Radu Marculescu:
Energy-Aware Routing for E-Textile Applications.
184-189
Electronic Edition (link) BibTeX
- Arijit Ghosh, Tony Givargis:
LORD: A Localized, Reactive and Distributed Protocol for Node Scheduling in Wireless Sensor Networks.
190-195
Electronic Edition (link) BibTeX
- Bruno Bougard, Francky Catthoor, Denis C. Daly, Anantha Chandrakasan, Wim Dehaene:
Energy Efficiency of the IEEE 802.15.4 Standard in Dense Wireless Microsensor Networks: Modeling and Improvement Perspectives.
196-201
Electronic Edition (link) BibTeX
Interactive Presentation
2F:
Power Aware Design in DSM Technology
- José Luis Rosselló, Vicens Canals, Sebastià A. Bota, Ali Keshavarzi, Jaume Segura:
A Fast Concurrent Power-Thermal Model for Sub-100nm Digital ICs.
206-211
Electronic Edition (link) BibTeX
- Hassan Hassan, Mohab Anis, Antoine El Daher, Mohamed I. Elmasry:
Activity Packing in FPGAs for Leakage Power Reduction.
212-217
Electronic Edition (link) BibTeX
- Suresh Srinivasan, Lin Li, Narayanan Vijaykrishnan:
Simultaneous Partitioning and Frequency Assignment for On-Chip Bus Architectures.
218-223
Electronic Edition (link) BibTeX
- Saibal Mukhopadhyay, Swarup Bhunia, Kaushik Roy:
Modeling and Analysis of Loading Effect in Leakage of Nano-Scaled Bulk-CMOS Logic Circuits.
224-229
Electronic Edition (link) BibTeX
Interactive Presentation
3A:
Reconfigurability in MPSoC
- Vincent Nollet, Théodore Marescaux, Prabhat Avasare, Jean-Yves Mignolet:
Centralized Run-Time Resource Management in a Network-on-Chip Containing Reconfigurable Hardware Tiles.
234-239
Electronic Edition (link) BibTeX
- Austin Hung, William D. Bishop, Andrew A. Kennings:
Symmetric Multiprocessing on Programmable Chips Made Easy.
240-245
Electronic Edition (link) BibTeX
- Nicolas Genko, David Atienza, Giovanni De Micheli, Jose Manuel Mendias, Román Hermida, Francky Catthoor:
A Complete Network-On-Chip Emulation Framework.
246-251
Electronic Edition (link) BibTeX
Interactive Presentation
3B:
Analogue,
Mixed-Signal and RF Circuits and Systems
Interactive Presentations
3C:
Reliability at the Very Deep Sub-Micron Region
Interactive Presentations
3F:
HW/SW Solutions for Low Power Multimedia Systems
- Arne Hamann, Rolf Ernst:
TDMA Time Slot and Turn Optimization with Evolutionary Search Techniques.
312-317
Electronic Edition (link) BibTeX
- Jennifer L. Wong, Weiping Liao, Fei Li, Lei He, Miodrag Potkonjak:
Scheduling of Soft Real-Time Systems for Context-Aware Applications.
318-323
Electronic Edition (link) BibTeX
- Fernando Rincón, Francisco Moya, Jesús Barba, Juan Carlos López:
Model Reuse through Hardware Design Patterns.
324-329
Electronic Edition (link) BibTeX
- Amr T. Abdel-Hamid, Sofiène Tahar, El Mostapha Aboulhamid:
A Public-Key Watermarking Technique for IP Designs.
330-335
Electronic Edition (link) BibTeX
Interactive Presentation
3F:
HW/SW Solutions for Low Power Multimedia Systems
4A:
Embedded System Partitioning and Validation
- Benoit Miramond, Jean-Marc Delosme:
Design Space Exploration for Dynamically Reconfigurable Architectures.
366-371
Electronic Edition (link) BibTeX
- Arshad Jhumka, Stephan Klaus, Sorin A. Huss:
A Dependability-Driven System-Level Design Approach for Embedded Systems.
372-377
Electronic Edition (link) BibTeX
- Luciano Lavagno, Claudio Passerone, Vishal Shah, Yosinori Watanabe:
A Time Slice Based Scheduler Model for System Level Design.
378-383
Electronic Edition (link) BibTeX
- Jae-Gon Lee, Moo-Kyoung Chung, Ki-Yong Ahn, Sang-Heon Lee, Chong-Min Kyung:
A Prediction Packetizing Scheme for Reducing Channel Traffic in Transaction-Level Hardware/Software Co-Emulation.
384-389
Electronic Edition (link) BibTeX
- Ambar A. Gadkari, S. Ramesh:
Automated Synthesis of Assertion Monitors using Visual Specifications.
390-395
Electronic Edition (link) BibTeX
Interactive Presentation
4B:
Logic Synthesis
- Aseem Agarwal, Kaviraj Chopra, David Blaauw:
Statistical Timing Based Optimization using Gate Sizing.
400-405
Electronic Edition (link) BibTeX
- Maxim Teslenko, Elena Dubrova:
An Efficient Algorithm for Finding Double-Vertex Dominators in Circuit Graphs.
406-411
Electronic Edition (link) BibTeX
- Alan Mishchenko, Robert K. Brayton:
SAT-Based Complete Don't-Care Computation for Network Optimization.
412-417
Electronic Edition (link) BibTeX
- Alan Mishchenko, Robert K. Brayton, Jie-Hong Roland Jiang, Tiziano Villa, Nina Yevtushenko:
Efficient Solution of Language Equations Using Partitioned Representations.
418-423
Electronic Edition (link) BibTeX
- G. Fraidy Bouesse, Marc Renaudin, Sophie Dumont, Fabien Germain:
DPA on Quasi Delay Insensitive Asynchronous Circuits: Formalization and Improvement.
424-429
Electronic Edition (link) BibTeX
Interactive Presentations
4C:
Defect Detection and Characterisation
- Ananta K. Majhi, Mohamed Azimane, Guido Gronthoud, Maurice Lousberg, Stefan Eichenberger, Fred Bowen:
Memory Testing Under Different Stress Conditions: An Industrial Evaluation.
438-443
Electronic Edition (link) BibTeX
- Irith Pomeranz, Sudhakar M. Reddy:
Worst-Case and Average-Case Analysis of n-Detection Test Sets.
444-449
Electronic Edition (link) BibTeX
- Huaxing Tang, Gang Chen, Sudhakar M. Reddy, Chen Wang, Janusz Rajski, Irith Pomeranz:
Defect Aware Test Patterns.
450-455
Electronic Edition (link) BibTeX
- Eric Liau, Doris Schmitt-Landsiedel:
Computational Intelligence Characterization Method of Semiconductor Device.
456-461
Electronic Edition (link) BibTeX
Interactive Presentations
4E:
Real-Time Scheduling
Interactive Presentation
4F:
SoC Power Optimisation
- César A. M. Marcon, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Igor M. Reis, Fabiano Hessel:
Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique.
502-507
Electronic Edition (link) BibTeX
- Mirko Loghi, Massimo Poncino:
Exploring Energy/Performance Tradeoffs in Shared Memory MPSoCs: Snoop-Based Cache Coherence vs. Software Solutions.
508-513
Electronic Edition (link) BibTeX
- Alexandru Andrei, Marcus T. Schmitz, Petru Eles, Zebo Peng, Bashir M. Al-Hashimi:
Quasi-Static Voltage Scaling for Energy Minimization with Time Constraints.
514-519
Electronic Edition (link) BibTeX
- Mirko Loghi, Paolo Azzoni, Massimo Poncino:
Tag Overflow Buffering: An Energy-Efficient Cache Architecture.
520-525
Electronic Edition (link) BibTeX
Interactive Presentations
4G:
Embedded Tutorial - Platforms and Tools for Automotive System Design
5A:
System Level Languages,
Verification and Simulation
Interactive Presentations
5B:
Panel Session - Semiconductor Industry Disaggregation vs. Reaggregation:
Who will be the Shark?
5C:
Reliable Memory Design
- Jin-Fu Li, Tsu-Wei Tseng, Chin-Long Wey:
An Efficient Transparent Test Scheme for Embedded Word-Oriented Memories.
574-579
Electronic Edition (link) BibTeX
- Luca Schiano, Marco Ottavi, Fabrizio Lombardi, Salvatore Pontarelli, Adelio Salsano:
On the Analysis of Reed Solomon Coding for Resilience to Transient/Permanent Faults in Highly Reliable Memories.
580-585
Electronic Edition (link) BibTeX
- Gokhan Memik, Mahmut T. Kandemir, Ozcan Ozturk:
Increasing Register File Immunity to Transient Errors.
586-591
Electronic Edition (link) BibTeX
- Balkaran S. Gill, Michael Nicolaidis, Francis G. Wolff, Christos A. Papachristou, Steven L. Garverick:
An Efficient BICS Design for SEUs Detection and Correction in Semiconductor Memories.
592-597
Electronic Edition (link) BibTeX
5E:
Execution-Time Analysis
Interactive Presentations
5F:
Battery and Current Considerations in CMOS Design
Interactive Presentations
5G:
Panel Session - Automotive System Architectures
5K:
Keynote
Volume 2
6A:
High-Level Verification
Interactive Presentations
6B:
System Modelling with UML
- Tim Schattkowsky, Wolfgang Müller, Achim Rettberg:
A Model-Based Approach for Executable Specifications on Reconfigurable Hardware.
692-697
Electronic Edition (link) BibTeX
- Alexandre Chureau, Yvon Savaria, El Mostapha Aboulhamid:
The Role of Model-Level Transactors and UML in Functional Prototyping of Systems-on-Chip: A Software-Radio Application.
698-703
Electronic Edition (link) BibTeX
- Elvinia Riccobene, Patrizia Scandurra, Alberto Rosti, Sara Bocchio:
A SoC Design Methodology Involving a UML 2.0 Profile for SystemC.
704-709
Electronic Edition (link) BibTeX
- Petri Kukkala, Jouni Riihimäki, Marko Hännikäinen, Timo D. Hämäläinen, Klaus Kronlöf:
UML 2.0 Profile for Embedded System Design.
710-715
Electronic Edition (link) BibTeX
Interactive Presentations
6C:
Hot Topic - Challenges in Embedded Memory Design and Test
6E:
Parallel and Multithreaded Processor Architectures
Interactive Presentation
6F:
Very Deep Submicron Simulation
Interactive Presentation
6G:
SoC Prototyping and Simulation
- Shankar Mahadevan, Federico Angiolini, Michael Storgaard, Rasmus Grøndahl Olsen, Jens Sparsø, Jan Madsen:
A Network Traffic Generator Model for Fast Network-on-Chip Simulation.
780-785
Electronic Edition (link) BibTeX
- Mehrdad Reshadi, Nikil D. Dutt:
Generic Pipelined Processor Modeling and High Performance Cycle-Accurate Simulator Generation.
786-791
Electronic Edition (link) BibTeX
- Jürgen Schnerr, Oliver Bringmann, Wolfgang Rosenstiel:
Cycle Accurate Binary Translation for Simulation Acceleration in Rapid Prototyping of SoCs.
792-797
Electronic Edition (link) BibTeX
- Franco Fummi, Mirko Loghi, Stefano Martini, Marco Monguzzi, Giovanni Perbellini, Massimo Poncino:
Virtual Hardware Prototyping through Timed Hardware-Software Co-Simulation.
798-803
Electronic Edition (link) BibTeX
Interactive Presentation
7A:
Memory Optimisation and Clocking for SoC
Interactive Presentations
7B:
Embedded Tutorial - UML for System-on-Chip Design:
Current Applications and Future Perspectives
7C:
Test Power Reduction and Diagnosis
Interactive Presentations
- Ghenadie Bodean, D. Bodean, A. Labunetz:
New Schemes for Self-Testing RAM.
858-859
Electronic Edition (link) BibTeX
- B. Cheon, E. Lee, Laung-Terng Wang, Xiaoqing Wen, P. Hsu, J. Cho, J. Park, H. Chao, Shianling Wu:
At-Speed Logic BIST for IP Cores.
860-861
Electronic Edition (link) BibTeX
7E:
Scheduling and Memory Optimisation for Multiprocessor Embedded Systems
- Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Peng:
Design Optimization of Time-and Cost-Constrained Fault-Tolerant Distributed Embedded Systems.
864-869
Electronic Edition (link) BibTeX
- Mahmut T. Kandemir, Guilin Chen:
Locality-Aware Process Scheduling for Embedded MPSoCs.
870-875
Electronic Edition (link) BibTeX
- Torsten Kempf, Malte Doerper, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tim Kogel, Bart Vanthournout:
A Modular Simulation Framework for Spatial and Temporal Task Mapping onto Multi-Processor SoC Platforms.
876-881
Electronic Edition (link) BibTeX
- Ozcan Ozturk, Hendra Saputra, Mahmut T. Kandemir, Ibrahim Kolcu:
Access Pattern-Based Code Compression for Memory-Constrained Embedded Systems.
882-887
Electronic Edition (link) BibTeX
- Ryan Mannion, Harry Hsieh, Susan Cotterell, Frank Vahid:
System Synthesis for Networks of Programmable Blocks.
888-893
Electronic Edition (link) BibTeX
Interactive Presentations
7F:
Layout Issues
Interactive Presentations
7G:
Quantifying Architecture Trade-Off
- Animesh Datta, Swarup Bhunia, Saibal Mukhopadhyay, Nilanjan Banerjee, Kaushik Roy:
Statistical Modeling of Pipeline Delay and Design of Pipeline under Process Variation to Enhance Yield in sub-100nm Technologies.
926-931
Electronic Edition (link) BibTeX
- Anca Mariana Molnos, Marc J. M. Heijligers, Sorin Dan Cotofana, Jos T. J. van Eijndhoven:
Compositional Memory Systems for Multimedia Communicating Tasks.
932-937
Electronic Edition (link) BibTeX
- Judita Kruse, Clive Thomsen, Rolf Ernst, Thomas Volling, Thomas Spengler:
Introducing Flexible Quantity Contracts into Distributed SoC and Embedded System Design Processes.
938-943
Electronic Edition (link) BibTeX
Interactive Presentations
8A:
Panel Session - Is There a Market for SystemC Tools?
8B:
Interconnect Solutions:
Timing,
Noise,
and Process Variations
- Lizheng Zhang, Weijen Chen, Yuhen Hu, Charlie Chung-Ping Chen:
Statistical Timing Analysis with Extended Pseudo-Canonical Timing Model.
952-957
Electronic Edition (link) BibTeX
- Peng Li, Frank Liu, Xin Li, Lawrence T. Pileggi, Sani R. Nassif:
Modeling Interconnect Variability Using Efficient Parametric Model Order Reduction.
958-963
Electronic Edition (link) BibTeX
- Praveen Ghanta, Sarma B. K. Vrudhula, Rajendran Panda, Janet Meiling Wang:
Stochastic Power Grid Analysis Considering Process Variations.
964-969
Electronic Edition (link) BibTeX
- Jinjun Xiong, King Ho Tam, Lei He:
Buffer Insertion Considering Process Variation.
970-975
Electronic Edition (link) BibTeX
- Baohua Wang, Pinaki Mazumder:
EM Wave Coupling Noise Modeling Based on Chebyshev Approximation and Exact Moment Formulation.
976-981
Electronic Edition (link) BibTeX
Interactive Presentations
8C:
Advances in Pattern Generation for Fault Detection and Diagnosis
Interactive Presentations
8E:
Embedded Software Technology
- Mahmut T. Kandemir, Feihui Li, Guilin Chen, Guangyu Chen, Ozcan Ozturk:
Studying Storage-Recomputation Tradeoffs in Memory-Constrained Embedded Processing.
1026-1031
Electronic Edition (link) BibTeX
- Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin:
BB-GC: Basic-Block Level Garbage Collection.
1032-1037
Electronic Edition (link) BibTeX
- Jacques Combaz, Jean-Claude Fernandez, Thierry Lepley, Joseph Sifakis:
Fine Grain QoS Control for Multimedia Application Software.
1038-1043
Electronic Edition (link) BibTeX
- Massimo Baleani, Alberto Ferrari, Leonardo Mangeruca, Alberto L. Sangiovanni-Vincentelli, Ulrich Freund, Erhard Schlenker, Hans-Jörg Wolff:
Correct-by-Construction Transformations across Design Environments for Model-Based Embedded Software Development.
1044-1049
Electronic Edition (link) BibTeX
- Elaine Cheong, Jie Liu:
galsC: A Language for Event-Driven Embedded Systems.
1050-1055
Electronic Edition (link) BibTeX
Interactive Presentations
8F:
Advanced Analogue Performance Modelling
- Abhishek Somani, Partha Pratim Chakrabarti, Amit Patra:
Mixing Global and Local Competition in Genetic Optimization based Design Space Exploration of Analog Circuits.
1064-1069
Electronic Edition (link) BibTeX
- Tom Eeckelaert, Trent McConaghy, Georges G. E. Gielen:
Efficient Multiobjective Synthesis of Analog Circuits using Hierarchical Pareto-Optimal Performance Hypersurfaces.
1070-1075
Electronic Edition (link) BibTeX
- Gerd Vandersteen, Ludwig De Locht, Snezana Jenei, Yves Rolain, Rik Pintelon:
Estimating Scalable Common-Denominator Laplace-Domain MIMO Models in an Errors-in-Variables Framework.
1076-1081
Electronic Edition (link) BibTeX
- Trent McConaghy, Tom Eeckelaert, Georges G. E. Gielen:
CAFFEINE: Template-Free Symbolic Model Generation of Analog Circuits via Canonical Form Functions and Genetic Programming.
1082-1087
Electronic Edition (link) BibTeX
Interactive Presentation
8G:
Hot Topic - Biochips:
Principles and Application
9A:
Efficient SAT Based Verification
9B:
Embedded Tutorial - How Do They Manage Designing Complex SoC?
9C:
Test Pattern Compression and Delay Test Schemes
9E:
Compiler/Architecture Codesign
9F:
Network-on-Chip Design Flows
- Srinivasan Murali, Giovanni De Micheli:
An Application-Specific Design Methodology for STbus Crossbar Generation.
1176-1181
Electronic Edition (link) BibTeX
- Kees Goossens, John Dielissen, Om Prakash Gangwal, Santiago González Pestana, Andrei Radulescu, Edwin Rijpkema:
A Design Flow for Application-Specific Networks on Chip with Guaranteed Performance to Accelerate SOC Design and Verification.
1182-1187
Electronic Edition (link) BibTeX
- Stergios Stergiou, Federico Angiolini, Salvatore Carta, Luigi Raffo, Davide Bertozzi, Giovanni De Micheli:
ast pipes Lite: A Synthesis Oriented Design Library For Networks on Chips.
1188-1193
Electronic Edition (link) BibTeX
9G:
Biochips and Quantum Computing
9K:
CMOS-Based Biosensor Arrarys
- Roland Thewes, Christian Paulus, Meinrad Schienle, Franz Hofmann, Alexander Frey, Ralf Brederlow, M. Augustyniak, Martin Jenkner, Björn Eversmann, Petra Schindler-Bauer, Melanie Atzesberger, Birgit Holzapfl, Gottfried Beer, Thomas Haneder, Hans-Christian Hanke:
CMOS-Based Biosensor Arrays.
1222-1223
Electronic Edition (link) BibTeX
10A:
Efficient Network-on-Chip Architectures
10B:
Architectural Synthesis and Design Space Exploration
- Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, Laura Pozzi, Paolo Ienne:
ISEGEN: Generation of High-Quality Instruction Set Extensions by Iterative Improvement.
1246-1251
Electronic Edition (link) BibTeX
- Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida:
Behavioural Transformation to Improve Circuit Performance in High-Level Synthesis.
1252-1257
Electronic Edition (link) BibTeX
- Suleyman Tosun, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie:
Reliability-Centric High-Level Synthesis.
1258-1263
Electronic Edition (link) BibTeX
- Aviral Shrivastava, Nikil D. Dutt, Alexandru Nicolau, Eugene Earlie:
PBExplore: A Framework for Compiler-in-the-Loop Exploration of Partial Bypassing in Embedded Processors.
1264-1269
Electronic Edition (link) BibTeX
10C:
Concurrent Error Detection and Correction
10E:
Formal Verification of Processor Architecture and DSP Programs
10F:
Interconnect Optimisation
10G:
Hot Topic - Silicon Based Biochips
Volume 3
1D:
Media and Signal Processing
- Sebastián López, Gustavo Marrero Callicó, José Francisco López, Roberto Sarmiento:
A High Quality/Low Computational Cost Technique for Block Matching Motion Estimation.
2-7
Electronic Edition (link) BibTeX
- Suhaib A. Fahmy, Peter Y. K. Cheung, Wayne Luk:
Hardware Acceleration of Hidden Markov Model Decoding for Person Detection.
8-13
Electronic Edition (link) BibTeX
- Hendrik Eeckhaut, Harald Devos, Benjamin Schrauwen, Mark Christiaens, Dirk Stroobandt:
A Hardware-Friendly Wavelet Entropy Codec for Scalable Video.
14-19
Electronic Edition (link) BibTeX
- Artur Burchard, Ewa Hekstra-Nowacka, Atul Chauhan:
A Real-Time Streaming Memory Controller.
20-25
Electronic Edition (link) BibTeX
- Walter Stechele, L. Alvado Cárcel, Stephan Herrmann, J. Lidón Simón:
A Coprocessor for Accelerating Visual Information Processing.
26-31
Electronic Edition (link) BibTeX
- Sandro V. Silva, Sergio Bampi:
Area and Throughput Trade-Offs in the Design of Pipelined Discrete Wavelet Transform Architectures.
32-37
Electronic Edition (link) BibTeX
2D:
Secure and Embedded Security Systems
- Reouven Elbaz, Lionel Torres, Gilles Sassatelli, Pierre Guillemin, C. Anguille, Michel Bardouillet, Christian Buatois, Jean-Baptiste Rigaud:
Hardware Engines for Bus Encryption: A Survey of Existing Techniques.
40-45
Electronic Edition (link) BibTeX
- Daniel Thull, Roberto Sannino:
Performance Considerations for an Embedded Implementation of OMA DRM 2.
46-51
Electronic Edition (link) BibTeX
- Alessandro Cilardo, Antonino Mazzeo, Nicola Mazzocca, Luigi Romano:
A Novel Unified Architecture for Public-Key Cryptography.
52-57
Electronic Edition (link) BibTeX
- Kris Tiri, Ingrid Verbauwhede:
A VLSI Design Flow for Secure Side-Channel Attack Resistant ICs.
58-63
Electronic Edition (link) BibTeX
- Shengqi Yang, Wayne Wolf, Narayanan Vijaykrishnan, Dimitrios N. Serpanos, Yuan Xie:
Power Attack Resistant Cryptosystem Design: A Dynamic Voltage and Frequency Switching Approach.
64-69
Electronic Edition (link) BibTeX
- Zoya Dyka, Peter Langendoerfer:
Area Efficient Hardware Implementation of Elliptic Curve Cryptography by Iteratively Applying Karatsuba's Method.
70-75
Electronic Edition (link) BibTeX
Interactive Presentations
3D:
Hot Topic - MPSoC Platforms for Mobile Multimedia
4D:
Hot Topic - Low-Power Wireless LANs:
Past,
Present and Future
5D:
Wireless Communication and Networking
- Frank Kienle, Torben Brack, Norbert Wehn:
A Synthesizable IP Core for DVB-S2 LDPC Code Decoding.
100-105
Electronic Edition (link) BibTeX
- Andrew Duller, Daniel Towner, Gajinder Panesar, Alan Gray, Will Robbins:
picoArray Technology: The Tool's Story.
106-111
Electronic Edition (link) BibTeX
- Ioannis Papaefstathiou, Theofanis Orphanoudakis, George Kornaros, Christopher Kachris, Ioannis Mavroidis, Aristides Nikologiannis:
Queue Management in Network Processors.
112-117
Electronic Edition (link) BibTeX
- Massimo Conti, Daniele Moretti:
System Level Analysis of the Bluetooth Standard.
118-123
Electronic Edition (link) BibTeX
- Andrés Takach, Bryan Bowyer, Thomas Bollaert:
C Based Hardware Design for Wireless Applications.
124-129
Electronic Edition (link) BibTeX
- Andreas Raabe, Blazej Bartyzel, Joachim K. Anlauf, Gabriel Zachmann:
Hardware Accelerated Collision Detection - An Architecture and Simulation Results.
130-135
Electronic Edition (link) BibTeX
Interactive Presentations
6D:
Automotive
- Wayne Lyons:
Meeting the Embedded Design Needs of Automotive Applications.
142-147
Electronic Edition (link) BibTeX
- Albrecht Mayer, Harry Siebert, Klaus D. McDonald-Maier:
Debug Support, Calibration and Emulation for Multiple Processor and Powertrain Control SoCs.
148-152
Electronic Edition (link) BibTeX
- Carl Jeffrey, Reuben Cutajar, Stephen Prosser, M. Lickess, Andrew Richardson, Stephen Riches:
The Integration of On-Line Monitoring and Reconfiguration Functions using IEEE1149.4 Into a Safety Critical Automotive Electronic Control Unit.
153-158
Electronic Edition (link) BibTeX
- Pavel Horsky:
LC Oscillator Driver for Safety Critical Applications.
159-164
Electronic Edition (link) BibTeX
- Jan Staschulat, Rolf Ernst, Andreas Schulze, Fabian Wolf:
Context Sensitive Performance Analysis of Automotive Applications.
165-170
Electronic Edition (link) BibTeX
- Dirk Ziegenbein, Peter Braun, Ulrich Freund, Andreas Bauer, Jan Romberg, Bernhard Schätz:
AutoMoDe - Model-Based Development of Automotive Software.
171-177
Electronic Edition (link) BibTeX
Interactive Presentation
7D:
Sensors
- Steve Chappell, Alistair Macarthur, Dan Preston, Dave Olmstead, Bob Flint, Chris Sullivan:
Exploiting Real-Time FPGA Based Adaptive Systems Technology for Real-Time Sensor Fusion in Next Generation Automotive Safety Systems.
180-185
Electronic Edition (link) BibTeX
- Luca Fanucci, A. Giambastiani, Francesco Iozzi, Corrado Marino, A. Rocchi:
Platform Based Design for Automotive Sensor Conditioning.
186-191
Electronic Edition (link) BibTeX
- Paolo Amato, Nicola Cesario, M. Di Meglio, Francesco Pirozzi:
Realization of a Virtual Lambda Sensor on a Fixed Precision System.
192-197
Electronic Edition (link) BibTeX
- Claudio Stagni, Carlotta Guiducci, Massimo Lanzoni, Luca Benini, Bruno Riccò:
Hardware-Software Design of a Smart Sensor for Fully-Electronic DNA Hybridization Detection.
198-203
Electronic Edition (link) BibTeX
- Momchil Milev, Rod Burt:
A Tool and Methodology for AC-Stability Analysis of Continuous-Time Closed-Loop Systems.
204-208
Electronic Edition (link) BibTeX
8D:
Best of ESSCIRC 2004
- Kay-Uwe Kirstein, Jan Sedivý, Tomi Salo, Christoph Hagleitner, Tobias Vancura, Andreas Hierlemann:
A CMOS-Based Tactile Sensor for Continuous Blood Pressure Monitoring.
210-214
Electronic Edition (link) BibTeX
- Johannes Sturm, Martin Leifhelm, Harald Schatzmayr, Stefan Groiss, Horst Zimmermann:
Optical Receiver IC for CD/DVD/Blue-Laser Application.
215-218
Electronic Edition (link) BibTeX
- Terje N. Andersen, Atle Briskemyr, Frode Telstø, Johnny Bjørnsen, Thomas E. Bonnerud, Bjørnar Hernes, Øystein Moldsvor:
A 97mW 110MS/s 12b Pipeline ADC Implemented in 0.18mum Digital CMOS.
219-222
Electronic Edition (link) BibTeX
- Christoph Sandner, Martin Clara, Andreas Santner, Thomas Hartig, Franz Kuttner:
A 6bit, 1.2GSps Low-Power Flash-ADC in 0.13?m Digital CMOS.
223-226
Electronic Edition (link) BibTeX
9D:
IP-Reuse and Reconfigurable Systems
- Paolo Bernardi, Guido Masera, Federico Quaglio, Matteo Sonza Reorda:
Testing Logic Cores using a BIST P1500 Compliant Approach: A Case of Study.
228-233
Electronic Edition (link) BibTeX
- Aline Mello, Leandro Möller, Ney Calazans, Fernando Gehm Moraes:
MultiNoC: A Multiprocessing System Enabled by a Network on Chip.
234-239
Electronic Edition (link) BibTeX
- Dan Hillman:
Using Mobilize Power Management IP for Dynamic & Static Power Reduction in SoC at 130 nm.
240-246
Electronic Edition (link) BibTeX
- Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis:
A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms.
247-252
Electronic Edition (link) BibTeX
- Tero Rissa, Adam Donlin, Wayne Luk:
Evaluation of SystemC Modelling of Reconfigurable Embedded Systems.
253-258
Electronic Edition (link) BibTeX
- Michael Ullmann, Wansheng Jin, Jürgen Becker:
Hardware Support for QoS-based Function Allocation in Reconfigurable Systems.
259-264
Electronic Edition (link) BibTeX
10D:
Design Verification
- Michele Borgatti, Andrea Capello, Umberto Rossi, Jean-Luc Lambert, Imed Moussa, Franco Fummi, Graziano Pravadelli:
An Integrated Design and Verification Methodology for Reconfigurable Multimedia Systems.
266-271
Electronic Edition (link) BibTeX
- Giuseppe Falconeri, Walid Naifer, Nizar Romdhane:
Common Reusable Verification Environment for BCA and RTL Models.
272-277
Electronic Edition (link) BibTeX
- John S. MacBeth, Dietmar Heinz, Ken Gray:
An Assembler Driven Verification Methodology (ADVM).
278-283
Electronic Edition (link) BibTeX
- Yasushi Umezawa, Takeshi Shimizu:
A Formal Verification Methodology for Checking Data Integrity.
284-289
Electronic Edition (link) BibTeX
- Ali Habibi, Asif Iqbal Ahmed, Otmane Aït Mohamed, Sofiène Tahar:
On the Design and Verification Methodology of the Look-Aside Interface.
290-295
Electronic Edition (link) BibTeX
Copyright © Sat May 16 23:05:43 2009
by Michael Ley (ley@uni-trier.de)
