| 2007 |
|---|
| 6 | EE | Anup Gangwar,
M. Balakrishnan,
Anshul Kumar:
Impact of intercluster communication mechanisms on ILP in clustered VLIW architectures.
ACM Trans. Design Autom. Electr. Syst. 12(1): (2007) |
| 5 | EE | Anup Gangwar,
M. Balakrishnan,
Preeti Ranjan Panda,
Anshul Kumar:
Evaluation of Bus Based Interconnect Mechanisms in Clustered VLIW Architectures.
International Journal of Parallel Programming 35(6): 507-527 (2007) |
| 2005 |
|---|
| 4 | EE | Anup Gangwar,
M. Balakrishnan,
Preeti Ranjan Panda,
Anshul Kumar:
Evaluation of Bus Based Interconnect Mechanisms in Clustered VLIW Architectures.
DATE 2005: 730-735 |
| 3 | EE | Ankit Mathur,
Mayank Agarwal,
Soumyadeb Mitra,
Anup Gangwar,
M. Balakrishnan,
Subhashis Banerjee:
SMPS: an FPGA-based prototyping environment for multiprocessor embedded systems (abstract only).
FPGA 2005: 273 |
| 2003 |
|---|
| 2 | EE | Amarjeet Singh,
Amit Chhabra,
Anup Gangwar,
Basant Kumar Dwivedi,
M. Balakrishnan,
Anshul Kumar:
SoC Synthesis with Automatic Hardware Software Interface Generation.
VLSI Design 2003: 585- |
| 2002 |
|---|
| 1 | EE | M. Balakrishnan,
Anshul Kumar,
Paolo Ienne,
Anup Gangwar,
Bhuvan Middha:
A Trimaran Based Framework for Exploring the Design Space of VLIW ASIPs with Coarse Grain Functional Units.
ISSS 2002: 2-7 |
