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Anup Gangwar

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2007
6EEAnup Gangwar, M. Balakrishnan, Anshul Kumar: Impact of intercluster communication mechanisms on ILP in clustered VLIW architectures. ACM Trans. Design Autom. Electr. Syst. 12(1): (2007)
5EEAnup Gangwar, M. Balakrishnan, Preeti Ranjan Panda, Anshul Kumar: Evaluation of Bus Based Interconnect Mechanisms in Clustered VLIW Architectures. International Journal of Parallel Programming 35(6): 507-527 (2007)
2005
4EEAnup Gangwar, M. Balakrishnan, Preeti Ranjan Panda, Anshul Kumar: Evaluation of Bus Based Interconnect Mechanisms in Clustered VLIW Architectures. DATE 2005: 730-735
3EEAnkit Mathur, Mayank Agarwal, Soumyadeb Mitra, Anup Gangwar, M. Balakrishnan, Subhashis Banerjee: SMPS: an FPGA-based prototyping environment for multiprocessor embedded systems (abstract only). FPGA 2005: 273
2003
2EEAmarjeet Singh, Amit Chhabra, Anup Gangwar, Basant Kumar Dwivedi, M. Balakrishnan, Anshul Kumar: SoC Synthesis with Automatic Hardware Software Interface Generation. VLSI Design 2003: 585-
2002
1EEM. Balakrishnan, Anshul Kumar, Paolo Ienne, Anup Gangwar, Bhuvan Middha: A Trimaran Based Framework for Exploring the Design Space of VLIW ASIPs with Coarse Grain Functional Units. ISSS 2002: 2-7

Coauthor Index

1Mayank Agarwal [3]
2M. Balakrishnan [1] [2] [3] [4] [5] [6]
3Subhashis Banerjee [3]
4Amit Chhabra [2]
5Basant Kumar Dwivedi [2]
6Paolo Ienne [1]
7Anshul Kumar [1] [2] [4] [5] [6]
8Ankit Mathur [3]
9Bhuvan Middha [1]
10Soumyadeb Mitra [3]
11Preeti Ranjan Panda [4] [5]
12Amarjeet Singh [2]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)