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Mohab Anis

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2009
42EEJavid Jaffari, Mohab Anis: Timing yield estimation of digital circuits using a control variate technique. ISQED 2009: 382-387
41EEAkhilesh Kumar, Mohab Anis: IR-drop management CAD techniques in FPGAs for power grid reliability. ISQED 2009: 746-752
2008
40EEMohamed H. Abu-Rahma, Kinshuk Chowdhury, Joseph Wang, Zhiqin Chen, Sei Seung Yoon, Mohab Anis: A methodology for statistical estimation of read access yield in SRAMs. DAC 2008: 205-210
39EEJavid Jaffari, Mohab Anis: On efficient Monte Carlo-based statistical static timing analysis of digital circuits. ICCAD 2008: 196-203
38EERodrigo Jaramillo-Ramirez, Javid Jaffari, Mohab Anis: Variability-aware design of subthreshold devices. ISCAS 2008: 1196-1199
37EERizwan Mudassir, Mohab Anis, Javid Jaffari: Switching activity reduction in low power Booth multiplier. ISCAS 2008: 3306-3309
36EEMohab Anis: Advanced IC technology - opportunities and challenges. ISCAS 2008: 776-779
35EEAhmed Youssef, Mohab Anis, Mohamed I. Elmasry: A Comparative Study Between Static and Dynamic Sleep Signal Generation Techniques for Leakage Tolerant Designs. IEEE Trans. VLSI Syst. 16(9): 1114-1126 (2008)
34EEKian Haghdad, Mohab Anis: Design-Specific Optimization Considering Supply and Threshold Voltage Variations. IEEE Trans. on CAD of Integrated Circuits and Systems 27(10): 1891-1901 (2008)
33EEMohamed H. Abu-Rahma, Mohab Anis: A Statistical Design-Oriented Delay Variation Model Accounting for Within-Die Variations. IEEE Trans. on CAD of Integrated Circuits and Systems 27(11): 1983-1995 (2008)
32EEJavid Jaffari, Mohab Anis: Variability-Aware Bulk-MOS Device Design. IEEE Trans. on CAD of Integrated Circuits and Systems 27(2): 205-216 (2008)
31EEJavid Jaffari, Mohab Anis: Statistical Thermal Profile Considering Process Variations: Analysis and Applications. IEEE Trans. on CAD of Integrated Circuits and Systems 27(6): 1027-1040 (2008)
30EEHassan Hassan, Mohab Anis, Mohamed I. Elmasry: Input Vector Reordering for Leakage Power Reduction in FPGAs. IEEE Trans. on CAD of Integrated Circuits and Systems 27(9): 1555-1564 (2008)
29EEJavid Jaffari, Mohab Anis: Thermal Driven Placement for Island-style MTCMOS FPGAs. JCP 3(4): 24-30 (2008)
2007
28EEHassan Hassan, Mohab Anis, Mohamed I. Elmasry: A Timing-Driven Algorithm for Leakage Reduction in MTCMOS FPGAs. ASP-DAC 2007: 678-683
27EEMohamed H. Abu-Rahma, Mohab Anis: Variability in VLSI Circuits: Sources and Design Considerations. ISCAS 2007: 3215-3218
26EERodrigo Jaramillo-Ramirez, Mohab Anis: A Dual-Threshold FPGA Routing Design for Subthreshold Leakage Reduction. ISCAS 2007: 3724-3727
25EEAhmed Youssef, Tor Myklebust, Mohab Anis, Mohamed I. Elmasry: A Low-Power Multi-Pin Maze Routing Methodology. ISQED 2007: 153-158
24EEJavid Jaffari, Mohab Anis: Thermal-Aware Placement for FPGAs Using Electrostatic Charge Model. ISQED 2007: 666-671
23EEAkhilesh Kumar, Mohab Anis: Dual-Threshold CAD Framework for Subthreshold Leakage Power Aware FPGAs. IEEE Trans. on CAD of Integrated Circuits and Systems 26(1): 53-66 (2007)
2006
22EEAkhilesh Kumar, Mohab Anis: An analytical state dependent leakage power model for FPGAs. DATE 2006: 612-617
21EEJavid Jaffari, Mohab Anis: Variability-aware device optimization under ION and leakage current constraints. ISLPED 2006: 119-122
20EEAkhilesh Kumar, Mohab Anis: Dual-Vt Design of FPGAs for Subthreshold Leakage Tolerance. ISQED 2006: 735-740
19EEAhmed Youssef, Mohab Anis, Mohamed I. Elmasry: Dynamic Standby Prediction for Leakage Tolerant Microprocessor Functional Units. MICRO 2006: 371-384
18EEHassan Hassan, Mohab Anis, Mohamed I. Elmasry: Low-power multi-threshold MCML: Analysis, design, and variability. Microelectronics Journal 37(10): 1097-1104 (2006)
17EEHassan Hassan, Mohab Anis, Mohamed I. Elmasry: Impact of technology scaling and process variations on RF CMOS devices. Microelectronics Journal 37(4): 275-282 (2006)
2005
16EEHratch Mangassarian, Mohab Anis: On Statistical Timing Analysis with Inter- and Intra-Die Variations. DATE 2005: 132-137
15EEHassan Hassan, Mohab Anis, Antoine El Daher, Mohamed I. Elmasry: Activity Packing in FPGAs for Leakage Power Reduction. DATE 2005: 212-217
14EEHassan Hassan, Mohab Anis, Mohamed I. Elmasry: A leakage-aware CAD flow for MTCMOS FPGA architectures (abstract only). FPGA 2005: 267
13EEAkhilesh Kumar, Mohab Anis: Dual-Vt FPGA design for leakage power reduction (abstract only). FPGA 2005: 272
12EEHassan Hassan, Mohab Anis, Mohamed I. Elmasry: LAP: a logic activity packing methodology for leakage power-tolerant FPGAs. ISLPED 2005: 257-262
11EEPayam Ghafari, Ehsan Mirhadi, Mohab Anis, Shawki Areibi, Mohamed I. Elmasry: A Low-Power Partitioning Methodology by Maximizing Sleep Time and Minimizing Cut Nets. IWSOC 2005: 368-371
10EEMohab Anis, Mohamed H. Abu-Rahma: Leakage Current Variability in Nanometer Technologies, invited. IWSOC 2005: 60-63
9EEAhmed Youssef, Mohab Anis, Mohamed I. Elmasry: POMR: a power-aware interconnect optimization methodology. IEEE Trans. VLSI Syst. 13(3): 297-307 (2005)
8EEHassan Hassan, Mohab Anis, Mohamed I. Elmasry: MOS current mode circuits: analysis, design, and variability. IEEE Trans. VLSI Syst. 13(8): 885-898 (2005)
7EEHassan Hassan, Mohab Anis, Mohamed I. Elmasry: Design and optimization of MOS current mode logic for parameter variations. Integration 38(3): 417-437 (2005)
2004
6EEHassan Hassan, Mohab Anis, Mohamed I. Elmasry: Design and optimization of MOS current mode logic for parameter variations. ACM Great Lakes Symposium on VLSI 2004: 33-38
2003
5EEMohab Anis, Shawki Areibi, Mohamed I. Elmasry: Design and optimization of multithreshold CMOS (MTCMOS) circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 22(10): 1324-1342 (2003)
2002
4EEMohab Anis, Mohamed Mahmoud, Mohamed I. Elmasry, Shawki Areibi: Dynamic and leakage power reduction in MTCMOS circuits using an automated efficient gate clustering technique. DAC 2002: 480-485
3EEMohab Anis, Mohamed I. Elmasry: Self-timed MOS current mode logic for digital applications. ISCAS (5) 2002: 113-116
2EEMohab Anis, Mohamed W. Allam, Mohamed I. Elmasry: Energy-efficient noise-tolerant dynamic styles for scaled-down CMOS and MTCMOS technologies. IEEE Trans. VLSI Syst. 10(2): 71-78 (2002)
2000
1EEMohamed W. Allam, Mohab Anis, Mohamed I. Elmasry: High-speed dynamic logic styles for scaled-down CMOS and MTCMOS technologies. ISLPED 2000: 155-160

Coauthor Index

1Mohamed H. Abu-Rahma [10] [27] [33] [40]
2Mohamed W. Allam [1] [2]
3Shawki Areibi [4] [5] [11]
4Zhiqin Chen [40]
5Kinshuk Chowdhury [40]
6Antoine El Daher [15]
7Mohamed I. Elmasry [1] [2] [3] [4] [5] [6] [7] [8] [9] [11] [12] [14] [15] [17] [18] [19] [25] [28] [30] [35]
8Payam Ghafari [11]
9Kian Haghdad [34]
10Hassan Hassan [6] [7] [8] [12] [14] [15] [17] [18] [28] [30]
11Javid Jaffari [21] [24] [29] [31] [32] [37] [38] [39] [42]
12Rodrigo Jaramillo-Ramirez [26] [38]
13Akhilesh Kumar [13] [20] [22] [23] [41]
14Mohamed Mahmoud [4]
15Hratch Mangassarian [16]
16Ehsan Mirhadi [11]
17Rizwan Mudassir [37]
18Tor Myklebust [25]
19Joseph Wang [40]
20Sei Seung Yoon [40]
21Ahmed Youssef [9] [19] [25] [35]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)