2009 |
36 | EE | Daniele Ludovici,
Georgi Nedeltchev Gaydadjiev,
Davide Bertozzi,
Luca Benini:
Capturing topology-level implications of link synthesis techniques for nanoscale networks-on-chip.
ACM Great Lakes Symposium on VLSI 2009: 125-128 |
35 | EE | Martino Ruggiero,
Davide Bertozzi,
Luca Benini,
Michela Milano,
A. Andrei:
Reducing the Abstraction and Optimality Gaps in the Allocation and Scheduling for Variable Voltage/Frequency MPSoC Platforms.
IEEE Trans. on CAD of Integrated Circuits and Systems 28(3): 378-391 (2009) |
2008 |
34 | EE | Simone Medardoni,
Marcello Lajolo,
Davide Bertozzi:
Variation tolerant NoC design by means of self-calibrating links.
DATE 2008: 1402-1407 |
33 | EE | Bonesi Stefano,
Davide Bertozzi,
Luca Benini,
Enrico Macii:
Process Variation Tolerant Pipeline Design Through a Placement-Aware Multiple Voltage Island Design Style.
DATE 2008: 967-972 |
32 | EE | Luca Benini,
Davide Bertozzi,
Michela Milano:
Resource Management Policy Handling Multiple Use-Cases in MPSoC Platforms Using Constraint Programming.
ICLP 2008: 470-484 |
31 | EE | Francisco Gilabert Villamón,
Simone Medardoni,
Davide Bertozzi,
Luca Benini,
María Engracia Gómez,
Pedro López,
José Duato:
Exploring High-Dimensional Topologies for NoC Design Through an Integrated Analysis and Synthesis Framework.
NOCS 2008: 107-116 |
30 | EE | Iyad Al Khatib,
Francesco Poletti,
Davide Bertozzi,
Luca Benini,
Mohamed Bechara,
Hasan Khalifeh,
Axel Jantsch,
Rustam Nabiev:
A multiprocessor system-on-chip for real-time biomedical monitoring and analysis: ECG prototype architectural design space exploration.
ACM Trans. Design Autom. Electr. Syst. 13(2): (2008) |
29 | EE | Martino Ruggiero,
Alessio Guerri,
Davide Bertozzi,
Michela Milano,
Luca Benini:
A Fast and Accurate Technique for Mapping Parallel Applications on Stream-Oriented MPSoC Platforms with Communication Awareness.
International Journal of Parallel Programming 36(1): 3-36 (2008) |
2007 |
28 | EE | Iyad Al Khatib,
Davide Bertozzi,
Axel Jantsch,
Luca Benini:
Performance analysis and design space exploration for high-end biomedical applications: challenges and solutions.
CODES+ISSS 2007: 217-226 |
27 | EE | Simone Medardoni,
Martino Ruggiero,
Davide Bertozzi,
Luca Benini,
Giovanni Strano,
Carlo Pistritto:
Interactive presentation: Capturing the interaction of the communication, memory and I/O subsystems in memory-centric industrial MPSoC platforms.
DATE 2007: 660-665 |
26 | EE | Simone Medardoni,
Davide Bertozzi,
Enrico Macii:
Power-optimal RTL arithmetic unit soft-macro selection strategy for leakage-sensitive technologies.
ISLPED 2007: 159-164 |
25 | EE | Francesco Poletti,
Antonio Poggiali,
Davide Bertozzi,
Luca Benini,
Pol Marchal,
Mirko Loghi,
Massimo Poncino:
Energy-Efficient Multiprocessor Systems-on-Chip for Embedded Computing: Exploring Programming Models and Their Architectural Support.
IEEE Trans. Computers 56(5): 606-621 (2007) |
24 | EE | Iyad Al Khatib,
Davide Bertozzi,
Francesco Poletti,
Luca Benini,
Axel Jantsch,
Mohamed Bechara,
Hasan Khalifeh,
Mazen Hajjar,
Rustam Nabiev,
Sven Jonsson:
Hardware/Software Architecture for Real-Time ECG Monitoring and Analysis Leveraging MPSoC Technology.
T. HiPEAC 1: 239-258 (2007) |
2006 |
23 | EE | Luca Benini,
Davide Bertozzi,
Alessio Guerri,
Michela Milano:
Allocation, Scheduling and Voltage Scaling on Energy Aware MPSoCs.
CPAIOR 2006: 44-58 |
22 | EE | Iyad Al Khatib,
Davide Bertozzi,
Francesco Poletti,
Luca Benini,
Axel Jantsch,
Mohamed Bechara,
Hasan Khalifeh,
Mazen Hajjar,
Rustam Nabiev,
Sven Jonsson:
MPSoC ECG biochip: a multiprocessor system-on-chip for real-time human heart monitoring and analysis.
Conf. Computing Frontiers 2006: 21-28 |
21 | EE | Iyad Al Khatib,
Francesco Poletti,
Davide Bertozzi,
Luca Benini,
Mohamed Bechara,
Hasan Khalifeh,
Axel Jantsch,
Rustam Nabiev:
A multiprocessor system-on-chip for real-time biomedical monitoring and analysis: architectural design space exploration.
DAC 2006: 125-130 |
20 | EE | Stefano Bertozzi,
Andrea Acquaviva,
Davide Bertozzi,
Antonio Poggiali:
Supporting task migration in multi-processor systems-on-chip: a feasibility study.
DATE 2006: 15-20 |
19 | EE | Martino Ruggiero,
Alessio Guerri,
Davide Bertozzi,
Francesco Poletti,
Michela Milano:
Communication-aware allocation and scheduling framework for stream-oriented multi-processor systems-on-chip.
DATE 2006: 3-8 |
2005 |
18 | EE | Luca Benini,
Davide Bertozzi,
Alessio Guerri,
Michela Milano:
Allocation and Scheduling for MPSoCs via Decomposition and No-Good Generation.
CP 2005: 107-121 |
17 | EE | Stergios Stergiou,
Federico Angiolini,
Salvatore Carta,
Luigi Raffo,
Davide Bertozzi,
Giovanni De Micheli:
ast pipes Lite: A Synthesis Oriented Design Library For Networks on Chips.
DATE 2005: 1188-1193 |
16 | EE | Martino Ruggiero,
Andrea Acquaviva,
Davide Bertozzi,
Luca Benini:
Application-Specific Power-Aware Workload Allocation for Voltage Scalable MPSoC Platforms.
ICCD 2005: 87-93 |
15 | EE | Luca Benini,
Davide Bertozzi,
Alessio Guerri,
Michela Milano:
Allocation and Scheduling for MPSoCs via decomposition and no-good generation.
IJCAI 2005: 1517-1518 |
14 | EE | Antonio Pullini,
Federico Angiolini,
Davide Bertozzi,
Luca Benini:
Fault tolerance overhead in network-on-chip flow control schemes.
SBCCI 2005: 224-229 |
13 | | Davide Bertozzi,
Luca Benini,
Giovanni De Micheli:
Network On-Chip Design for Gigascale Systems-on-Chip.
The Industrial Information Technology Handbook 2005: 0- |
12 | EE | Davide Bertozzi,
Antoine Jalabert,
Srinivasan Murali,
Rutuparna Tamhankar,
Stergios Stergiou,
Luca Benini,
Giovanni De Micheli:
NoC Synthesis Flow for Customized Domain Specific Multiprocessor Systems-on-Chip.
IEEE Trans. Parallel Distrib. Syst. 16(2): 113-129 (2005) |
11 | EE | Davide Bertozzi,
Luca Benini,
Giovanni De Micheli:
Error control schemes for on-chip communication links: the energy-reliability tradeoff.
IEEE Trans. on CAD of Integrated Circuits and Systems 24(6): 818-831 (2005) |
10 | | Luca Benini,
Davide Bertozzi,
Alessio Guerri,
Michela Milano,
Francesco Poletti:
Measuring Efficiency and Executability of Allocation and Scheduling in Multi-Processor Systems-on-Chip.
Intelligenza Artificiale 2(3): 13-20 (2005) |
9 | EE | Luca Benini,
Davide Bertozzi,
Alessandro Bogliolo,
Francesco Menichelli,
Mauro Olivieri:
MPARM: Exploring the Multi-Processor SoC Design Space with SystemC.
VLSI Signal Processing 41(2): 169-182 (2005) |
2004 |
8 | EE | Mirko Loghi,
Federico Angiolini,
Davide Bertozzi,
Luca Benini,
Roberto Zafalon:
Analyzing On-Chip Communication in a MPSoC Environment.
DATE 2004: 752-757 |
2003 |
7 | EE | Davide Bertozzi,
Anand Raghunathan,
Luca Benini,
Srivaths Ravi:
Transport Protocol Optimization for Energy Efficient Wireless Embedded Systems.
DATE 2003: 10706-10713 |
6 | EE | Matteo Dall'Osso,
Gianluca Biccari,
Luca Giovannini,
Davide Bertozzi,
Luca Benini:
xpipes: a Latency Insensitive Parameterized Network-on-chip Architecture For Multi-Processor SoCs.
ICCD 2003: 536- |
5 | EE | Luca Benini,
Davide Bertozzi,
Davide Bruni,
Nicola Drago,
Franco Fummi,
Massimo Poncino:
SystemC Cosimulation and Emulation of Multiprocessor SoC Designs.
IEEE Computer 36(4): 53-59 (2003) |
2002 |
4 | EE | Davide Bertozzi,
Luca Benini,
Giovanni De Micheli:
Low Power Error Resilient Encoding for On-Chip Data Buses.
DATE 2002: 102-109 |
3 | EE | Luca Benini,
Davide Bertozzi,
Davide Bruni,
Nicola Drago,
Franco Fummi,
Massimo Poncino:
Legacy SystemC Co-Simulation of Multi-Processor Systems-on-Chip.
ICCD 2002: 494-499 |
2 | EE | Davide Bertozzi,
Luca Benini,
Bruno Riccò:
Energy-efficient and reliable low-swing signaling for on-chip buses based on redundant coding.
ISCAS (1) 2002: 93-96 |
1 | EE | Davide Bertozzi,
Luca Benini,
Bruno Riccò:
Parametric timing and power macromodels for high level simulation of low-swing interconnects.
ISLPED 2002: 307-312 |