H. Chao

2007
3	EE	B. Cheon, E. Lee, Laung-Terng Wang, Xiaoqing Wen, P. Hsu, J. Cho, J. Park, H. Chao, Shianling Wu: At-Speed Logic BIST for IP Cores CoRR abs/0710.4645: (2007)
2005
2	EE	B. Cheon, E. Lee, Laung-Terng Wang, Xiaoqing Wen, P. Hsu, J. Cho, J. Park, H. Chao, Shianling Wu: At-Speed Logic BIST for IP Cores. DATE 2005: 860-861
1987
1		J. H. Chang, H. Chao, Kimming So: Cache Design of a Sub-Micron CMOS System/370. ISCA 1987: 208-213

Coauthor Index

1	J. H. Chang	[1]
2	B. Cheon	[2] [3]
3	J. Cho	[2] [3]
4	P. Hsu	[2] [3]
5	E. Lee	[2] [3]
6	J. Park	[2] [3]
7	Kimming So	[1]
8	Laung-Terng Wang	[2] [3]
9	Xiaoqing Wen	[2] [3]
10	Shianling Wu	[2] [3]

Colors in the list of coauthors