| 2008 |
|---|
| 10 | EE | Takeshi Kitahara,
Hajime Nakamura:
A Data Transmission Control to Maximize Discharge Capacity of Battery.
WCNC 2008: 2951-2956 |
| 2007 |
|---|
| 9 | EE | Mototsugu Hamada,
Takeshi Kitahara,
Naoyuki Kawabe,
Hironori Sato,
Tsuyoshi Nishikawa,
Takayoshi Shimazawa,
Takahiro Yamashita,
Hiroyuki Hara,
Yukihito Oowaki:
An automated runtime power-gating scheme.
ICCD 2007: 382-387 |
| 8 | EE | Takeshi Kitahara,
Naoyuki Kawabe,
Fumihiro Minami,
Katsuhiro Seta,
Toshiyuki Furusawa:
Area-Efficient Selective Multi-Threshold CMOS Design Methodology for Standby Leakage Power Reduction
CoRR abs/0710.4762: (2007) |
| 2006 |
|---|
| 7 | EE | Takeshi Kitahara,
Hiroyuki Hara,
Shinichiro Shiratake,
Yoshiki Tsukiboshi,
Tomoyuki Yoda,
Tetsuaki Utsumi,
Fumihiro Minami:
Low-power design methodology for module-wise dynamic voltage and frequency scaling with dynamic de-skewing systems.
ASP-DAC 2006: 533-540 |
| 6 | EE | Xiaoqiu Wang,
Satoshi Konishi,
Takeshi Kitahara,
Hajime Nakamura:
A Novel Adaptive SR-SW-ARQ/FEC Scheme for an Ultra Low-Latency Mobile Network.
VTC Spring 2006: 241-245 |
| 2005 |
|---|
| 5 | EE | Takeshi Kitahara,
Naoyuki Kawabe,
Fumihiro Minami,
Katsuhiro Seta,
Toshiyuki Furusawa:
Area-Efficient Selective Multi-Threshold CMOS Design Methodology for Standby Leakage Power Reduction.
DATE 2005: 646-647 |
| 4 | | Yujin Noishiki,
Akira Idoue,
Takeshi Kitahara,
Yoji Kishi,
Shinichi Nomoto:
Adaptive Traffic Load Adjustment Method for Mesh Broadband Fixed Wireless Access Systems.
Parallel and Distributed Computing and Networks 2005: 70-75 |
| 3 | EE | Yoji Kishi,
Keita Tabata,
Takeshi Kitahara,
Yujin Noishiki,
Akira Idoue,
Shinichi Nomoto:
Wireless Node Architecture and Its Implementation for Multi-Hop Mesh Networks in IP-Based Broadband Fixed Wireless Access Systems.
IEICE Transactions 88-B(3): 1202-1210 (2005) |
| 2 | EE | Yoji Kishi,
Takeshi Kitahara,
Yujin Noishiki,
Akira Idoue,
Shinichi Nomoto:
An Adaptive Traffic Load Balancing Method for Multi-Hop Mesh Networks in Broadband Fixed Wireless Access Systems.
IEICE Transactions 88-B(4): 1355-1363 (2005) |
| 1998 |
|---|
| 1 | | Takeshi Kitahara,
Fumihiro Minami,
Toshiaki Ueda,
Kimiyoshi Usami,
Seiichi Nishio,
Masami Murakata,
Takashi Mitsuhashi:
A Clock-Gating Method for Low-Power LSI Design.
ASP-DAC 1998: 307-312 |
