| 2009 |
|---|
| 200 | EE | Dario Cozzi,
Claudia Farè,
Alessandro Meroni,
Vincenzo Rana,
Marco D. Santambrogio,
Donatella Sciuto:
Reconfigurable NoC design flow for multiple applications run-time mapping on FPGA devices.
ACM Great Lakes Symposium on VLSI 2009: 421-424 |
| 199 | EE | Antonino Tumeo,
Christian Pilato,
Gianluca Palermo,
Fabrizio Ferrandi,
Donatella Sciuto:
HW/SW methodologies for synchronization in FPGA multiprocessors.
FPGA 2009: 265-268 |
| 2008 |
|---|
| 198 | EE | Antonino Tumeo,
Matteo Monchiero,
Gianluca Palermo,
Fabrizio Ferrandi,
Donatella Sciuto:
Lightweight DMA management mechanisms for multiprocessors on FPGA.
ASAP 2008: 275-280 |
| 197 | EE | Carlo Curino,
Luca Fossati,
Vincenzo Rana,
Francesco Redaelli,
Marco D. Santambrogio,
Donatella Sciuto:
The Shining embedded system design methodology based on self dynamic reconfigurable architectures.
ASP-DAC 2008: 595-600 |
| 196 | EE | Giovanni Beltrame,
Cristiana Bolchini,
Luca Fossati,
Antonio Miele,
Donatella Sciuto:
ReSP: A non-intrusive Transaction-Level Reflective MPSoC Simulation Platform for design space exploration.
ASP-DAC 2008: 673-678 |
| 195 | EE | Giovanni Beltrame,
Luca Fossati,
Donatella Sciuto:
Concurrency emulation and analysis of parallel applications for multi-processor system-on-chip co-design.
CODES+ISSS 2008: 7-12 |
| 194 | EE | Antonino Tumeo,
Marco Branca,
Lorenzo Camerini,
Marco Ceriani,
Matteo Monchiero,
Gianluca Palermo,
Fabrizio Ferrandi,
Donatella Sciuto:
A Dual-Priority Real-Time Multiprocessor System on FPGA for Automotive Applications.
DATE 2008: 1039-1044 |
| 193 | EE | Francesco Redaelli,
Marco D. Santambrogio,
Donatella Sciuto:
Task Scheduling with Configuration Prefetching and Anti-Fragmentation techniques on Dynamically Reconfigurable Systems.
DATE 2008: 519-522 |
| 192 | EE | Andrea Cuoccio,
Paolo R. Grassi,
Vincenzo Rana,
Marco D. Santambrogio,
Donatella Sciuto:
A Generation Flow for Self-Reconfiguration Controllers Customization.
DELTA 2008: 279-284 |
| 191 | EE | Alessandro Meroni,
Vincenzo Rana,
Marco D. Santambrogio,
Donatella Sciuto:
A Requirements-Driven Reconfigurable SoC Communication Infrastructure Design Flow.
DELTA 2008: 405-409 |
| 190 | EE | Alessio Montone,
Marco D. Santambrogio,
Donatella Sciuto:
A Design Workflow for the Identification of Area Constraints in Dynamic Reconfigurable Systems.
DELTA 2008: 450-453 |
| 189 | EE | Francesco Bruschi,
Vincenzo Rana,
Donatella Sciuto:
An architecture for dynamically reconfigurable real time audio processing systems.
ESTImedia 2008: 81-86 |
| 188 | EE | Marco D. Santambrogio,
Vincenzo Rana,
Donatella Sciuto:
Operating system support for online partial dynamic reconfiguration management.
FPL 2008: 455-458 |
| 187 | EE | Christian Pilato,
Daniele Loiacono,
Fabrizio Ferrandi,
Pier Luca Lanzi,
Donatella Sciuto:
High-level synthesis with multi-objective genetic algorithm: A comparative encoding analysis.
IEEE Congress on Evolutionary Computation 2008: 3334-3341 |
| 186 | EE | Fabio Cancare,
Marco D. Santambrogio,
Donatella Sciuto:
A design flow tailored for self dynamic reconfigurable architecture.
IPDPS 2008: 1-8 |
| 185 | EE | Marco D. Santambrogio,
Donatella Sciuto:
Design methodology for partial dynamic reconfiguration: a new degree of freedom in the HW/SW codesign.
IPDPS 2008: 1-8 |
| 184 | EE | Alessio Montone,
Vincenzo Rana,
Marco D. Santambrogio,
Donatella Sciuto:
HARPE: A Harvard-based processing element tailored for partial dynamic reconfigurable architectures.
IPDPS 2008: 1-8 |
| 183 | EE | Massimo Morandi,
Marco Novati,
Marco D. Santambrogio,
Donatella Sciuto:
Core Allocation and Relocation Management for a Self Dynamically Reconfigurable Architecture.
ISVLSI 2008: 286-291 |
| 182 | EE | Fabrizio Ferrandi,
Pier Luca Lanzi,
Daniele Loiacono,
Christian Pilato,
Donatella Sciuto:
A Multi-objective Genetic Algorithm for Design Space Exploration in High-Level Synthesis.
ISVLSI 2008: 417-422 |
| 181 | EE | Giovanni Agosta,
Francesco Bruschi,
Donatella Sciuto:
Static Analysis of Transaction-Level Communication Models.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(8): 1412-1424 (2008) |
| 180 | EE | Cristiana Bolchini,
Antonio Miele,
Fabio Rebaudengo,
Fabio Salice,
Donatella Sciuto,
Luca Sterpone,
Massimo Violante:
Software and Hardware Techniques for SEU Detection in IP Processors.
J. Electronic Testing 24(1-3): 35-44 (2008) |
| 179 | EE | Christian Pilato,
Antonino Tumeo,
Gianluca Palermo,
Fabrizio Ferrandi,
Pier Luca Lanzi,
Donatella Sciuto:
Improving evolutionary exploration to area-time optimization of FPGA designs.
Journal of Systems Architecture - Embedded Systems Design 54(11): 1046-1057 (2008) |
| 2007 |
|---|
| 178 | EE | Antonino Tumeo,
Matteo Monchiero,
Gianluca Palermo,
Fabrizio Ferrandi,
Donatella Sciuto:
A design kit for a fully working shared memory multiprocessor on FPGA.
ACM Great Lakes Symposium on VLSI 2007: 219-222 |
| 177 | EE | Giovanni Agosta,
Francesco Bruschi,
Donatella Sciuto:
An efficient cost-based canonical form for Boolean matching.
ACM Great Lakes Symposium on VLSI 2007: 445-448 |
| 176 | EE | Antonino Tumeo,
Matteo Monchiero,
Gianluca Palermo,
Fabrizio Ferrandi,
Donatella Sciuto:
A Self-Reconfigurable Implementation of the JPEG Encoder.
ASAP 2007: 24-29 |
| 175 | EE | Giovanni Agosta,
Francesco Bruschi,
Gerardo Pelosi,
Donatella Sciuto:
A Unified Approach to Canonical Form-based Boolean Matching.
DAC 2007: 841-846 |
| 174 | EE | Giovanni Beltrame,
Cristiana Bolchini,
Luca Fossati,
Antonio Miele,
Donatella Sciuto:
A Framework for Reliability Assessment and Enhancement in Multi-Processor Systems-On-Chip.
DFT 2007: 132-141 |
| 173 | | Matteo Giani,
Massimo Redaelli,
Marco D. Santambrogio,
Donatella Sciuto:
Task Partitioning for the Scheduling on Reconfigurable Systems driven by Specification Self-Similarity.
ERSA 2007: 78-84 |
| 172 | EE | Marco D. Santambrogio,
Seda Ogrenci Memik,
Vincenzo Rana,
Umut A. Acar,
Donatella Sciuto:
A novel SoC design methodology combining adaptive software and reconfigurable hardware.
ICCAD 2007: 303-308 |
| 171 | EE | Fabrizio Ferrandi,
Pier Luca Lanzi,
Gianluca Palermo,
Christian Pilato,
Donatella Sciuto,
Antonino Tumeo:
An Evolutionary Approach to Area-Time Optimization of FPGA designs.
ICSAMOS 2007: 145-152 |
| 170 | EE | Antonino Tumeo,
Marco Branca,
Lorenzo Camerini,
Matteo Monchiero,
Gianluca Palermo,
Fabrizio Ferrandi,
Donatella Sciuto:
An Interrupt Controller for FPGA-based Multiprocessors.
ICSAMOS 2007: 82-87 |
| 169 | EE | Christian Pilato,
Gianluca Palermo,
Antonino Tumeo,
Fabrizio Ferrandi,
Donatella Sciuto,
Pier Luca Lanzi:
Fitness inheritance in evolutionary and multi-objective high-level synthesis.
IEEE Congress on Evolutionary Computation 2007: 3459-3466 |
| 168 | EE | Fabrizio Ferrandi,
Luca Fossati,
Marco Lattuada,
Gianluca Palermo,
Donatella Sciuto,
Antonino Tumeo:
Automatic Parallelization of Sequential Specifications for Symmetric MPSoCs.
IESS 2007: 179-192 |
| 167 | EE | Vincenzo Rana,
Marco D. Santambrogio,
Donatella Sciuto,
Boris Kettelhoit,
Markus Köster,
Mario Porrmann,
Ulrich Rückert:
Partial Dynamic Reconfiguration in a Multi-FPGA Clustered Architecture Based on Linux.
IPDPS 2007: 1-8 |
| 166 | EE | Vincenzo Rana,
Marco D. Santambrogio,
Donatella Sciuto:
Dynamic Reconfigurability in Embedded System Design.
ISCAS 2007: 2734-2737 |
| 165 | EE | Antonino Tumeo,
Matteo Monchiero,
Gianluca Palermo,
Fabrizio Ferrandi,
Donatella Sciuto:
A Pipelined Fast 2D-DCT Accelerator for FPGA-based SoCs.
ISVLSI 2007: 331-336 |
| 164 | EE | Antonino Tumeo,
Matteo Monchiero,
Gianluca Palermo,
Fabrizio Ferrandi,
Donatella Sciuto:
An Internal Partial Dynamic Reconfiguration Implementation of the JPEG Encoder for Low-Cost FPGAsb.
ISVLSI 2007: 449-450 |
| 163 | EE | S. Corbetta,
Fabrizio Ferrandi,
Massimo Morandi,
Marco Novati,
Marco D. Santambrogio,
Donatella Sciuto:
Two Novel Approaches to Online Partial Bitstream Relocation in a Dynamically Reconfigurable System.
ISVLSI 2007: 457-458 |
| 162 | EE | Angelo P. E. Rosiello,
Fabrizio Ferrandi,
Davide Pandini,
Donatella Sciuto:
A Hash-based Approach for Functional Regularity Extraction During Logic Synthesis.
ISVLSI 2007: 92-97 |
| 161 | EE | Vincenzo Rana,
Chiara Sandionigi,
Marco D. Santambrogio,
Donatella Sciuto:
An adaptive genetic algorithm for dynamically reconfigurable modules allocation.
VLSI-SoC 2007: 128-133 |
| 160 | EE | Cristiana Bolchini,
Fabio Salice,
Donatella Sciuto,
Luigi Pomante:
Reliable System Specification for Self-Checking Data-Paths
CoRR abs/0710.4685: (2007) |
| 159 | EE | Giovanni Beltrame,
Donatella Sciuto,
Cristina Silvano:
Multi-Accuracy Power and Performance Transaction-Level Modeling.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(10): 1830-1842 (2007) |
| 158 | EE | Georges G. E. Gielen,
Donatella Sciuto:
Guest Editorial [intro. to the special issue on the 2006 IEEE/ACM Design, Automation and Test in Europe Conference].
IEEE Trans. on CAD of Integrated Circuits and Systems 26(3): 405-407 (2007) |
| 2006 |
|---|
| 157 | EE | Roberto Cordone,
Fabrizio Ferrandi,
Marco D. Santambrogio,
Gianluca Palermo,
Donatella Sciuto:
Using speculative computation and parallelizing techniques to improve scheduling of control based designs.
ASP-DAC 2006: 898-904 |
| 156 | EE | Giovanni Beltrame,
Dario Bruschi,
Donatella Sciuto,
Cristina Silvano:
Decision-theoretic exploration of multiProcessor platforms.
CODES+ISSS 2006: 205-210 |
| 155 | EE | Giovanni Beltrame,
Donatella Sciuto,
Cristina Silvano,
Damien Lyonnard,
Chuck Pilkington:
Exploiting TLM and object introspection for system-level simulation.
DATE 2006: 100-105 |
| 154 | EE | Maurizio Rebaudengo,
Luca Sterpone,
Massimo Violante,
Cristiana Bolchini,
Antonio Miele,
Donatella Sciuto:
Combined software and hardware techniques for the design of reliable IP processors.
DFT 2006: 265-273 |
| 153 | | Giovanni Agosta,
Francesco Bruschi,
Marco D. Santambrogio,
Donatella Sciuto:
Synthesis of Object Oriented Models on Reconfigurable Hardware.
ERSA 2006: 249-250 |
| 152 | | Carlo Amicucci,
Fabrizio Ferrandi,
Marco D. Santambrogio,
Donatella Sciuto:
SyCERS: a SystemC Design Exploration Framework for SoC Reconfigurable Architecture.
ERSA 2006: 63-69 |
| 151 | EE | Marco D. Santambrogio,
Donatella Sciuto:
Partial Dynamic Reconfiguration: The Caronte Approach. A New Degree of Freedom in the HW/SW Codesign.
FPL 2006: 1-2 |
| 150 | EE | Simone Borgio,
Davide Bosisio,
Fabrizio Ferrandi,
Matteo Monchiero,
Marco D. Santambrogio,
Donatella Sciuto,
Antonino Tumeo:
Hardware DWT accelerator for MultiProcessor System-on-Chip on FPGA.
ICSAMOS 2006: 107-114 |
| 149 | EE | Tiziana Gravagnoli,
Fabrizio Ferrandi,
Pier Luca Lanzi,
Donatella Sciuto:
Automatic Test Pattern Generation with BOA.
PPSN 2006: 423-432 |
| 148 | EE | Giovanni Beltrame,
Donatella Sciuto,
Cristina Silvano,
Pierre G. Paulin,
Essaid Bensoudane:
An Application Mapping Methodology and Case Study for Multi-Processor On-Chip Architectures.
VLSI-SoC 2006: 146-151 |
| 147 | EE | Marco Giorgetta,
Marco D. Santambrogio,
Donatella Sciuto,
Paola Spoletini:
A graph-coloring approach to the allocation and tasks scheduling for reconfigurable architectures.
VLSI-SoC 2006: 24-29 |
| 146 | EE | Matteo Murgida,
Alessandro Panella,
Vincenzo Rana,
Marco D. Santambrogio,
Donatella Sciuto:
Fast IP-Core Generation in a Partial Dynamic Reconfiguration Workflow.
VLSI-SoC 2006: 74-79 |
| 145 | EE | Carlo Brandolese,
William Fornaciari,
Luigi Pomante,
Fabio Salice,
Donatella Sciuto:
Affinity-Driven System Design Exploration for Heterogeneous Multiprocessor SoC.
IEEE Trans. Computers 55(5): 508-519 (2006) |
| 2005 |
|---|
| 144 | EE | Cristiana Bolchini,
Fabio Salice,
Donatella Sciuto,
Luigi Pomante:
Reliable System Specification for Self-Checking Data-Paths.
DATE 2005: 1278-1283 |
| 143 | EE | Cristiana Bolchini,
Antonio Miele,
Fabio Salice,
Donatella Sciuto:
A model of soft error effects in generic IP processors.
DFT 2005: 334-342 |
| 142 | EE | Giovanni Agosta,
Francesco Bruschi,
Marco D. Santambrogio,
Donatella Sciuto:
A Data Oriented Approach to the Design of Reconfigurable Stream Decoders.
ESTImedia 2005: 107-112 |
| 141 | EE | Alberto Donato,
Fabrizio Ferrandi,
Massimo Redaelli,
Marco D. Santambrogio,
Donatella Sciuto:
Caronte: A Complete Methodology for the Implementation of Partially Dynamically Self-Reconfiguring Systems on FPGA Platforms.
FCCM 2005: 321-322 |
| 140 | EE | Francesco Bruschi,
Federico Moro,
Donatella Sciuto:
Mapping Interface Method Calls over OCP Buses.
FDL 2005: 279-283 |
| 139 | EE | Giovanni Agosta,
Francesco Bruschi,
Donatella Sciuto:
Aspect Orientation in System Level Design.
FDL 2005: 397-401 |
| 138 | | Paolo Faverio,
Donatella Sciuto,
Giacomo Buonanno:
Using Critical Success Factors for Assessing Critical Activities in ERP Implementation within SMEs.
ICEIS (1) 2005: 285-292 |
| 137 | EE | Fabrizio Ferrandi,
Marco D. Santambrogio,
Donatella Sciuto:
A Design Methodology for Dynamic Reconfiguration: The Caronte Architecture.
IPDPS 2005 |
| 136 | EE | Alberto Donato,
Fabrizio Ferrandi,
Massimo Redaelli,
Marco D. Santambrogio,
Donatella Sciuto:
Caronte: A methodology for the Implementation of Partially dynamically Self-Reconfiguring Systems on FPGA Platforms.
VLSI-SoC 2005: 87-109 |
| 135 | EE | Francesco Bruschi,
Fabrizio Ferrandi,
Donatella Sciuto:
A Framework for the Functional Verification of SystemC Models.
International Journal of Parallel Programming 33(6): 667-695 (2005) |
| 2004 |
|---|
| 134 | EE | Giovanni Beltrame,
Gianluca Palermo,
Donatella Sciuto,
Cristina Silvano:
Plug-in of power models in the StepNP exploration platform: analysis of power/performance trade-offs.
CASES 2004: 85-92 |
| 133 | EE | Donatella Sciuto,
Grant Martin,
Wolfgang Rosenstiel,
Stuart Swan,
Frank Ghenassia,
Peter Flake,
Johny Srouji:
SystemC and SystemVerilog: Where do They Fit? Where are They Going?
DATE 2004: 122-129 |
| 132 | EE | Carlo Brandolese,
William Fornaciari,
Fabio Salice,
Donatella Sciuto:
Analysis and Modeling of Energy Reducing Source Code Transformations.
DATE 2004: 306-311 |
| 131 | EE | Fabrizio Ferrandi,
Pier Luca Lanzi,
Donatella Sciuto,
Mara Tanelli:
System-level metrics for hardware/software architectural mapping.
DELTA 2004: 231-236 |
| 130 | EE | Giovanni Agosta,
Francesco Bruschi,
Donatella Sciuto:
Synthesis of Dynamic Class Loading Specifications on Reconfigurable Hardware.
DELTA 2004: 431-433 |
| 129 | EE | Cristiana Bolchini,
Antonio Miele,
Fabio Salice,
Donatella Sciuto,
Luigi Pomante:
Reliable System Co-Design: The FIR Case Study.
DFT 2004: 433-441 |
| 128 | | Francesco Bruschi,
Paolo Faverio,
R. Hodges,
L. Mari,
D. Restelli,
Donatella Sciuto:
Virtual Community in the Classroom: An Innovating Tool for Elearning.
EDUTECH 2004: 123-132 |
| 127 | EE | Fabrizio Ferrandi,
Pier Luca Lanzi,
Donatella Sciuto:
System Level Hardware-Software Design Exploration with XCS.
GECCO (2) 2004: 763-773 |
| 2003 |
|---|
| 126 | EE | Giovanni Agosta,
Francesco Bruschi,
Donatella Sciuto:
Static analysis of transaction-level models.
DAC 2003: 448-453 |
| 125 | EE | Heinz-Joseph Schlebusch,
Gary Smith,
Donatella Sciuto,
Daniel Gajski,
Carsten Mielenz,
Christopher K. Lennard,
Frank Ghenassia,
Stuart Swan,
Joachim Kunkel:
Transaction Based Design: Another Buzzword or the Solution to a Design Problem?
DATE 2003: 10876-10879 |
| 124 | EE | Carlo Brandolese,
William Fornaciari,
Fabio Salice,
Donatella Sciuto:
Library Functions Timing Characterization for Source-Level Analysis.
DATE 2003: 11132-11133 |
| 123 | EE | Cristiana Bolchini,
Fabio Salice,
Donatella Sciuto,
R. Zavaglia:
An Integrated Design Approach for Self-Checking FPGAs.
DFT 2003: 443-450 |
| 122 | | Fabio Salice,
William Fornaciari,
Luigi Pomante,
Donatella Sciuto:
An Internal Representation Model for System-Level Co-Design of Heterogeneous Multiprocessor Embedded System.
FDL 2003: 669-680 |
| 121 | | Lorenzo Salvemini,
Mariagiovanna Sami,
Donatella Sciuto,
Cristina Silvano,
Vittorio Zaccaria,
Roberto Zafalon:
A Methodology for the Efficient Architectural Exploration of Energy-Delay Trade-offs for Embedded Systems.
SAC 2003: 672-678 |
| 120 | EE | Fabrizio Ferrandi,
Franco Fummi,
Graziano Pravadelli,
Donatella Sciuto:
Identification of design errors through functional testing.
IEEE Transactions on Reliability 52(4): 400-412 (2003) |
| 2002 |
|---|
| 119 | EE | Donatella Sciuto,
Fabio Salice,
Luigi Pomante,
William Fornaciari:
Metrics for design space exploration of heterogeneous multiprocessor embedded systems.
CODES 2002: 55-60 |
| 118 | EE | Andrea Bona,
Mariagiovanna Sami,
Donatella Sciuto,
Vittorio Zaccaria,
Cristina Silvano,
Roberto Zafalon:
Energy estimation and optimization of embedded VLIW processors based on instruction clustering.
DAC 2002: 886-891 |
| 117 | EE | Andrea Bona,
Mariagiovanna Sami,
Donatella Sciuto,
Vittorio Zaccaria,
Cristina Silvano,
Roberto Zafalon:
An Instruction-Level Methodology for Power Estimation and Optimization of Embedded VLIW Cores.
DATE 2002: 1128 |
| 116 | EE | Francesco Bruschi,
Michele Chiamenti,
Fabrizio Ferrandi,
Donatella Sciuto:
Error Simulation Based on the SystemC Design Description Language.
DATE 2002: 1135 |
| 115 | EE | Fabrizio Ferrandi,
Michele Rendine,
Donatella Sciuto:
Functional Verification for SystemC Descriptions Using Constraint Solving.
DATE 2002: 744-751 |
| 114 | EE | Cristiana Bolchini,
Fabio Salice,
Donatella Sciuto:
Designing Self-Checking FPGAs through Error Detection Codes.
DFT 2002: 60-68 |
| 113 | EE | Cristiana Bolchini,
Luigi Pomante,
Fabio Salice,
Donatella Sciuto:
A System Level Approach in Designing Dual-Duplex Fault Tolerant Embedded Systems.
IOLTW 2002: 32- |
| 112 | EE | William Fornaciari,
Vito Trianni,
Carlo Brandolese,
Donatella Sciuto,
Fabio Salice,
Giovanni Beltrame:
Modeling Assembly Instruction Timing in Superscalar Architectures.
ISSS 2002: 132-137 |
| 111 | EE | Fabrizio Ferrandi,
Franco Fummi,
Donatella Sciuto:
Test Generation and Testability Alternatives Exploration of Critical Algorithms for Embedded Applications.
IEEE Trans. Computers 51(2): 200-215 (2002) |
| 110 | EE | Mariagiovanna Sami,
Donatella Sciuto,
Cristina Silvano,
Vittorio Zaccaria,
Roberto Zafalon:
Low-power data forwarding for VLIW embedded architectures.
IEEE Trans. VLSI Syst. 10(5): 614-622 (2002) |
| 109 | EE | Carlo Brandolese,
Fabio Salice,
William Fornaciari,
Donatella Sciuto:
Static power modeling of 32-bit microprocessors.
IEEE Trans. on CAD of Integrated Circuits and Systems 21(11): 1306-1316 (2002) |
| 108 | EE | Mariagiovanna Sami,
Donatella Sciuto,
Cristina Silvano,
Vittorio Zaccaria:
An instruction-level energy model for embedded VLIW architectures.
IEEE Trans. on CAD of Integrated Circuits and Systems 21(9): 998-1010 (2002) |
| 107 | EE | Cristiana Bolchini,
Luigi Pomante,
Fabio Salice,
Donatella Sciuto:
Reliability Properties Assessment at System Level: A Co-Design Framework.
J. Electronic Testing 18(3): 351-356 (2002) |
| 106 | EE | Carlo Brandolese,
William Fornaciari,
Fabio Salice,
Donatella Sciuto:
The Impact of Source Code Transformations on Software Power and Energy Consumption.
Journal of Circuits, Systems, and Computers 11(5): 477-502 (2002) |
| 2001 |
|---|
| 105 | EE | William Fornaciari,
Donatella Sciuto,
Cristina Silvano,
Vittorio Zaccaria:
A design framework to efficiently explore energy-delay tradeoffs.
CODES 2001: 260-265 |
| 104 | EE | Carlo Brandolese,
William Fornaciari,
Fabio Salice,
Donatella Sciuto:
Source-level execution time estimation of C programs.
CODES 2001: 98-103 |
| 103 | EE | Mariagiovanna Sami,
Donatella Sciuto,
Cristina Silvano,
Vittorio Zaccaria,
Roberto Zafalon:
Exploiting data forwarding to reduce the power budget of VLIW embedded processors.
DATE 2001: 252-257 |
| 102 | EE | Fabrizio Ferrandi,
G. Ferrara,
Donatella Sciuto,
Alessandro Fin,
Franco Fummi:
Functional test generation for behaviorally sequential models.
DATE 2001: 403-410 |
| 101 | EE | Giovanni Beltrame,
Carlo Brandolese,
William Fornaciari,
Fabio Salice,
Donatella Sciuto,
Vito Trianni:
An Assembly-Level Execution-Time Model for Pipelined Architectures.
ICCAD 2001: 195-200 |
| 100 | EE | Cristiana Bolchini,
Fabio Salice,
Donatella Sciuto:
Designing Reliable Embedded Systems Based on 32 Bit Microprocessors.
IOLTW 2001: 137 |
| 99 | EE | Cristiana Bolchini,
Luigi Pomante,
Fabio Salice,
Donatella Sciuto:
Reliability Properties Assessment at System Level: A Co-design Framework.
IOLTW 2001: 165-171 |
| 98 | EE | William Fornaciari,
Donatella Sciuto,
Cristina Silvano,
Vittorio Zaccaria:
Fast system-level exploration of memory architectures driven by energy-delay metrics.
ISCAS (4) 2001: 502-505 |
| 97 | | Giovanni Beltrame,
Carlo Brandolese,
William Fornaciari,
Fabio Salice,
Donatella Sciuto,
Vito Trianni:
Dynamic modeling of inter-instruction effects for execution time estimation.
ISSS 2001: 136-141 |
| 96 | | Cristiana Bolchini,
Luigi Pomante,
Fabio Salice,
Donatella Sciuto:
On-line fault detection in a hardware/software co-design environment.
ISSS 2001: 51-56 |
| 95 | EE | Roberto Cordone,
Fabrizio Ferrandi,
Donatella Sciuto,
Roberto Wolfler Calvo:
An efficient heuristic approach to solve the unate covering problem.
IEEE Trans. on CAD of Integrated Circuits and Systems 20(12): 1377-1388 (2001) |
| 94 | | Fabiano Cattaneo,
Alfonso Fuggetta,
Donatella Sciuto:
Pursuing coherence in software process assessment and improvement.
Software Process: Improvement and Practice 6(1): 3-22 (2001) |
| 2000 |
|---|
| 93 | EE | Carlo Brandolese,
William Fornaciari,
Fabio Salice,
Donatella Sciuto:
Energy estimation for 32-bit microprocessors.
CODES 2000: 24-28 |
| 92 | EE | William Fornaciari,
M. Polentarutti,
Donatella Sciuto,
Cristina Silvano:
Power optimization of system-level address buses based on software profiling.
CODES 2000: 29-33 |
| 91 | EE | Mariagiovanna Sami,
Donatella Sciuto,
Cristina Silvano,
Vittorio Zaccaria:
Instruction-level power estimation for embedded VLIW cores.
CODES 2000: 34-38 |
| 90 | EE | Carlo Brandolese,
William Fornaciari,
Fabio Salice,
Donatella Sciuto:
An instruction-level functionally-based energy estimation model for 32-bits microprocessors.
DAC 2000: 346-351 |
| 89 | EE | Roberto Cordone,
Fabrizio Ferrandi,
Donatella Sciuto,
Roberto Wolfler Calvo:
An Efficient Heuristic Approach to Solve the Unate Covering Problem.
DATE 2000: 364-371 |
| 88 | EE | G. Biasoli,
Fabrizio Ferrandi,
Donatella Sciuto,
Alessandro Fin,
Franco Fummi:
BIST Architectures Selection Based on Behavioral Testing.
DFT 2000: 292-298 |
| 87 | | Mariagiovanna Sami,
Donatella Sciuto,
Cristina Silvano,
Vittorio Zaccaria:
Power Exploration for Embedded VLIW Architectures.
ICCAD 2000: 498-503 |
| 86 | EE | Fabrizio Ferrandi,
Donatella Sciuto,
Alessandro Fin,
Franco Fummi:
An Application of Genetic Algorithms and BDDs to Functional Testing.
ICCD 2000: 48- |
| 85 | | Giacomo Buonanno,
Stefano Gramignoli,
Aurelio Ravarini,
Marco Tagliavini,
Donatella Sciuto:
ICT diffusion and strategic role within Italian SMEs.
IRMA Conference 2000: 373-378 |
| 84 | EE | Carlo Brandolese,
William Fornaciari,
Luigi Pomante,
Fabio Salice,
Donatella Sciuto:
A Multi-Level Strategy for Software Power Estimation.
ISSS 2000: 187-192 |
| 83 | EE | Fabrizio Ferrandi,
G. Fornara,
Donatella Sciuto,
G. Ferrara,
Franco Fummi:
Testability Alternatives Exploration through Functional Testing.
VTS 2000: 423-430 |
| 82 | | Donatella Sciuto:
Guest Editor's Introduction: Design Tools for Embedded Systems.
IEEE Design & Test of Computers 17(2): 11-13 (2000) |
| 81 | EE | Franco Fummi,
Donatella Sciuto:
A Hierarchical Test Generation Approach for Large Controllers.
IEEE Trans. Computers 49(4): 289-302 (2000) |
| 80 | EE | Cristiana Bolchini,
R. Montandon,
Fabio Salice,
Donatella Sciuto:
Design of VHDL-based totally self-checking finite-state machine and data-path descriptions.
IEEE Trans. VLSI Syst. 8(1): 98-103 (2000) |
| 79 | EE | Fabrizio Ferrandi,
Franco Fummi,
Enrico Macii,
Massimo Poncino,
Donatella Sciuto:
Symbolic optimization of interacting controllers based onredundancy identification and removal.
IEEE Trans. on CAD of Integrated Circuits and Systems 19(7): 760-772 (2000) |
| 1999 |
|---|
| 78 | EE | William Fornaciari,
Donatella Sciuto:
HW/SW Co-design of Embedded Systems.
Ada-Europe 1999: 344-355 |
| 77 | EE | William Fornaciari,
Donatella Sciuto,
Cristina Silvano:
Power estimation for architectural exploration of HW/SW communication on system-level buses.
CODES 1999: 152-156 |
| 76 | EE | Fabrizio Ferrandi,
Franco Fummi,
Luca Gerli,
Donatella Sciuto:
Symbolic Functional Vector Generation for VHDL Specifications.
DATE 1999: 442- |
| 75 | EE | William Fornaciari,
Donatella Sciuto,
Cristina Silvano:
Influence of Caching and Encoding on Power Dissipation of System-Level Buses for Embedded Systems.
DATE 1999: 762-763 |
| 74 | EE | Marco Brera,
Fabrizio Ferrandi,
Donatella Sciuto,
Franco Fummi:
Increase the Behavioral Fault Model Accuracy Using High-Level Synthesis Information.
DFT 1999: 174-180 |
| 73 | EE | Cristiana Bolchini,
Luigi Pomante,
Donatella Sciuto,
Fabio Salice:
A Synthesis Methodology Aimed at Improving the Quality of TSC Devices.
DFT 1999: 247-255 |
| 72 | EE | William Fornaciari,
Donatella Sciuto,
Cristina Silvano:
Power Estimation of System-Level Buses for Microprocessor-Based Architectures: A Case Study.
ICCD 1999: 131- |
| 71 | EE | Franco Fummi,
Donatella Sciuto,
Micaela Serra:
Synthesis for Testability of Highly Complex Controllers by Functional Redundancy Removal.
IEEE Trans. Computers 48(12): 1305-1323 (1999) |
| 1998 |
|---|
| 70 | EE | Alberto Allara,
William Fornaciari,
Fabio Salice,
Donatella Sciuto:
A Model for System-Level Timed Analysis and Profiling.
DATE 1998: 204-210 |
| 69 | EE | Luca Benini,
Giovanni De Micheli,
Donatella Sciuto,
Enrico Macii,
Cristina Silvano:
Address Bus Encoding Techniques for System-Level Power Optimization.
DATE 1998: 861- |
| 68 | EE | Cristiana Bolchini,
Fabio Salice,
Donatella Sciuto:
Fault Analysis in Networks with Concurrent Error Detection Properties.
DATE 1998: 957-958 |
| 67 | EE | Donatella Sciuto,
Cristina Silvano,
Renato Stefanelli:
Systematic AUED Codes for Self-Checking Architectures.
DFT 1998: 183-191 |
| 66 | EE | F. S. Bietti,
Fabrizio Ferrandi,
Franco Fummi,
Donatella Sciuto:
VHDL Testability Analysis Based on Fault Clustering and Implicit Fault Injection.
Great Lakes Symposium on VLSI 1998: 237-242 |
| 65 | EE | Cristiana Bolchini,
William Fornaciari,
Fabio Salice,
Donatella Sciuto:
Concurrent Error Detection at Architectural Level.
ISSS 1998: 72-75 |
| 64 | EE | Fabrizio Ferrandi,
Franco Fummi,
Donatella Sciuto:
Implicit test generation for behavioral VHDL models.
ITC 1998: 587- |
| 63 | EE | Cristiana Bolchini,
Fabio Salice,
Donatella Sciuto:
Fault Analysis for Networks with Concurrent Error Detection.
IEEE Design & Test of Computers 15(4): 66-74 (1998) |
| 62 | EE | William Fornaciari,
P. Gubian,
Donatella Sciuto,
Cristina Silvano:
Power estimation of embedded systems: a hardware/software codesign approach.
IEEE Trans. VLSI Syst. 6(2): 266-275 (1998) |
| 61 | EE | Franco Fummi,
Donatella Sciuto,
Cristina Silvano:
Automatic generation of error control codes for computer applications.
IEEE Trans. VLSI Syst. 6(3): 502-506 (1998) |
| 60 | EE | Cesare Alippi,
Franco Fummi,
Vincenzo Piuri,
Mariagiovanna Sami,
Donatella Sciuto:
Testability analysis and behavioral testing of the Hopfield neural paradigm.
IEEE Trans. VLSI Syst. 6(3): 507-511 (1998) |
| 59 | EE | Alessandro Balboni,
Claudio Costi,
Massimo Pellencin,
Andrea Quadrini,
Donatella Sciuto:
Clock skew reduction in ASIC logic design: a methodology for clock tree management.
IEEE Trans. on CAD of Integrated Circuits and Systems 17(4): 344-356 (1998) |
| 1997 |
|---|
| 58 | EE | Alberto Allara,
S. Filipponi,
Fabio Salice,
William Fornaciari,
Donatella Sciuto:
A Flexible Model for Evaluating the Behavior of Hardware/Software Systems.
CODES 1997: 109-114 |
| 57 | EE | Cristiana Bolchini,
Giacomo Buonanno,
M. Cozzini,
Donatella Sciuto,
Renato Stefanelli:
Designing Ad-Hoc Codes for the Realization of Fault Tolerant CMOS Networks.
DFT 1997: 204-211 |
| 56 | EE | Cristiana Bolchini,
Donatella Sciuto,
Fabio Salice:
Designing Networks with Error Detection Properties through the Fault-Error Relation.
DFT 1997: 290-297 |
| 55 | EE | Cristiana Bolchini,
Fabio Salice,
Donatella Sciuto:
A novel methodology for designing TSC networks based on the parity bit code.
ED&TC 1997: 440-444 |
| 54 | EE | Giacomo Buonanno,
Fabrizio Ferrandi,
L. Ferrandi,
Franco Fummi,
Donatella Sciuto:
How an "Evolving" Fault Model Improves the Behavioral Test Generation.
Great Lakes Symposium on VLSI 1997: 124- |
| 53 | EE | Cristiana Bolchini,
Fabio Salice,
Donatella Sciuto:
Parity Bit Code: Achieving a Complete Fault Coverage in the Design of TSC Combinational Networks.
Great Lakes Symposium on VLSI 1997: 32- |
| 52 | EE | Luca Benini,
Giovanni De Micheli,
Enrico Macii,
Donatella Sciuto,
Cristina Silvano:
Asymptotic Zero-Transition Activity Encoding for Address Busses in Low-Power Microprocessor-Based Systems.
Great Lakes Symposium on VLSI 1997: 77-82 |
| 51 | | Alberto Allara,
S. Filipponi,
William Fornaciari,
Fabio Salice,
Donatella Sciuto:
Improving Design Turnaround Time via Two-Levels Hw/Sw Co-Simulation.
ICCD 1997: 400-405 |
| 50 | | Cristiana Bolchini,
Donatella Sciuto,
Fabio Salice:
A TSC Evaluation Function for Combinational Circuits.
ICCD 1997: 555-560 |
| 49 | | M. Bacis,
Giacomo Buonanno,
Fabrizio Ferrandi,
Franco Fummi,
Luca Gerli,
Donatella Sciuto:
Application of a Testing Framework to VHDL Descriptions at Different Abstraction Levels.
ICCD 1997: 654-658 |
| 48 | EE | Franco Fummi,
Donatella Sciuto:
Implicit test pattern generation constrained to cellular automata embedding.
VTS 1997: 54-59 |
| 47 | EE | Franco Fummi,
U. Rovati,
Donatella Sciuto:
Functional design for testability of control-dominated architectures.
ACM Trans. Design Autom. Electr. Syst. 2(2): 98-122 (1997) |
| 46 | | William Fornaciari,
Donatella Sciuto:
A Two-Level Cosimulation Environment.
IEEE Computer 30(6): 109-111 (1997) |
| 45 | EE | Fabrizio Ferrandi,
Franco Fummi,
Donatella Sciuto,
Enrico Macii,
Massimo Poncino:
Testing Core-Based Systems: A Symbolic Methodology.
IEEE Design & Test of Computers 14(4): 69-77 (1997) |
| 44 | EE | Franco Fummi,
Donatella Sciuto:
A complete testing strategy based on interacting and hierarchical FSMs.
Integration 23(1): 75-93 (1997) |
| 1996 |
|---|
| 43 | EE | Alessandro Balboni,
William Fornaciari,
Donatella Sciuto:
Partitioning and Exploration Strategies in the TOSCA Co-Design Flow.
CODES 1996: 62-69 |
| 42 | EE | Fabrizio Ferrandi,
Franco Fummi,
Enrico Macii,
Massimo Poncino,
Donatella Sciuto:
Symbolic Optimization of FSM Networks Based on Sequential ATPG Techniques.
DAC 1996: 467-470 |
| 41 | EE | Fabrizio Ferrandi,
Franco Fummi,
Enrico Macii,
Massimo Poncino,
Donatella Sciuto:
Test Generation for Networks of Interacting FSMs Using Symbolic Techniques.
Great Lakes Symposium on VLSI 1996: 208-213 |
| 40 | EE | Alessandro Balboni,
William Fornaciari,
M. Vincenzi,
Donatella Sciuto:
The Use of a Virtual Instruction Set for the Software Synthesis of HW/SW Embedded Systems.
ISSS 1996: 77-82 |
| 1995 |
|---|
| 39 | EE | Franco Fummi,
U. Rovati,
Donatella Sciuto:
Testable synthesis of high complex control devices.
EURO-DAC 1995: 117-122 |
| 38 | EE | Franco Fummi,
Donatella Sciuto,
M. Serro:
Synthesis for testability of large complexity controllers.
ICCD 1995: 180- |
| 37 | | Giacomo Buonanno,
Fabio Salice,
Donatella Sciuto:
Behavior of Self-Checking Checkers for 1-out-of-3 Codes Based on Pass-Transistor Logic.
ISCAS 1995: 1924-1927 |
| 36 | | Giacomo Buonanno,
Fabrizio Ferrandi,
Donatella Sciuto:
Data Path Testability Analysis Based on BDDs.
ISCAS 1995: 2012-2014 |
| 35 | | Cristiana Bolchini,
Donatella Sciuto:
An Output/State Encoding for Self-Checking Finite State Machine.
ISCAS 1995: 2136-2139 |
| 34 | | Luca Penzo,
Donatella Sciuto,
Cristina Silvano:
GECO: A Tool for Automatic Generation of Error Control Codes for Computer Applications.
ISCAS 1995: 912-915 |
| 33 | EE | Cristiana Bolchini,
Giacomo Buonanno,
Donatella Sciuto,
Renato Stefanelli:
A new switching-level approach to multiple-output functions synthesis.
VLSI Design 1995: 125-129 |
| 32 | EE | Luca Penzo,
Donatella Sciuto,
Cristina Silvano:
VLSI design of systematic odd-weight-column byte error detecting SEC-DED codes.
VLSI Design 1995: 156-160 |
| 31 | | Luca Penzo,
Donatella Sciuto,
Cristina Silvano:
Construction techniques for systematic SEC-DED codes with single byte error detection and partial correction capability for computer memory systems.
IEEE Transactions on Information Theory 41(2): 584-591 (1995) |
| 30 | EE | Vincenzo Piuri,
Mariagiovanna Sami,
Donatella Sciuto:
Testability of artificial neural networks: A behavioral approach.
J. Electronic Testing 6(2): 179-190 (1995) |
| 29 | EE | Giacomo Buonanno,
Franco Fummi,
Donatella Sciuto:
TIES: A testability increase expert system for VLSI design.
J. Electronic Testing 6(2): 203-217 (1995) |
| 28 | EE | Claudio Costi,
Micaela Serra,
Donatella Sciuto:
A new DFT methodology for sequential circuits.
J. Electronic Testing 7(3): 223-240 (1995) |
| 1994 |
|---|
| 27 | EE | Stefano Antoniazzi,
Alessandro Balboni,
William Fornaciari,
Donatella Sciuto:
A methodology for control-dominated systems codesign.
CODES 1994: 2-9 |
| 26 | | Cristiana Bolchini,
Giacomo Buonanno,
Donatella Sciuto,
Renato Stefanelli:
A CMOS Fault Tolerant Architecture for Swith-Level Faults.
DFT 1994: 10-18 |
| 25 | | Fabio Salice,
Mariagiovanna Sami,
Donatella Sciuto:
Synthesis of Multi-level Self-Checking Logic.
DFT 1994: 115-123 |
| 24 | | Franco Fummi,
Donatella Sciuto,
Micaela Serra:
Test Generation for Stuck-at and Gate-Delay Faults in Sequential Circuits: A Mixed Functional/Structural Method.
DFT 1994: 254-262 |
| 23 | | Franco Fummi,
Donatella Sciuto,
Micaela Serra:
A Functional Approach to Delay Faults Test Generation for Sequential Circuits.
EDAC-ETC-EUROASIC 1994: 51-57 |
| 22 | | Alessandro Balboni,
Claudio Costi,
Franco Fummi,
Donatella Sciuto:
From Behavioral Description to Systolic Array Based Architectures.
EDAC-ETC-EUROASIC 1994: 657 |
| 21 | EE | Donatella Sciuto,
Stefano Antoniazzi,
Alessandro Balboni,
William Fornaciari:
The role of VHDL within the TOSCA hardware/software codesign framework.
EURO-DAC 1994: 612-617 |
| 20 | | Stefano Antoniazzi,
Alessandro Balboni,
William Fornaciari,
Donatella Sciuto:
HW/SW Codesign for Embedded Telecom Systems.
ICCD 1994: 278-281 |
| 19 | | Margherita Pillan,
Donatella Sciuto:
Constraint Generation & Placement for Automatic Layout Design of Analog Integrated Circuits.
ISCAS 1994: 355-358 |
| 18 | | Cristiana Bolchini,
Franco Fummi,
Donatella Sciuto:
Two-Dimensional Sequential Array Architectures: Design for Testability Approaches.
ISCAS 1994: 81-84 |
| 17 | | Cristiana Bolchini,
Giacomo Buonanno,
Donatella Sciuto,
Renato Stefanelli:
CMOS Reliability Improvements Through a New Fault Tolerant Technique.
ISCAS 1994: 83-86 |
| 16 | | Giacomo Buonanno,
Donatella Sciuto,
Renato Stefanelli:
Innovative Structures for CMOS Combinational Gates Synthesis.
IEEE Trans. Computers 43(4): 385-399 (1994) |
| 15 | EE | Massimo Bombana,
Giacomo Buonanno,
Patrizia Cavalloro,
Fabrizio Ferrandi,
Donatella Sciuto,
Giuseppe Zaza:
ALADIN: a multilevel testability analyzer for VLSI system design.
IEEE Trans. VLSI Syst. 2(2): 157-171 (1994) |
| 1993 |
|---|
| 14 | | Giacomo Buonanno,
Franco Fummi,
Donatella Sciuto:
Fault Detection in Sequential Circuits through Functional Testing.
DFT 1993: 191-198 |
| 13 | | Massimo Bombana,
Giacomo Buonanno,
Patrizia Cavalloro,
Fabrizio Ferrandi,
Donatella Sciuto,
Giuseppe Zaza:
Reduction of Fault Detection Costs through Testable Design of Sequential Architectures with Signal Feedbacks.
DFT 1993: 223-230 |
| 12 | | Giacomo Buonanno,
Franco Fummi,
Donatella Sciuto:
Functional Fault Models and Gate Level Coverage for Sequential Architectures.
ICCD 1993: 572-575 |
| 11 | | Giacomo Buonanno,
Franco Fummi,
Donatella Sciuto:
Functional Testing and Constrained Synthesis of Sequential Architectures.
ISCAS 1993: 1523-1526 |
| 10 | | Massimo Bombana,
Giacomo Buonanno,
Patrizia Cavalloro,
Fabrizio Ferrandi,
Donatella Sciuto,
Giuseppe Zaza:
An Expert Solution to Functional Testability Analysis of VLSI Circuits.
SEKE 1993: 263-265 |
| 9 | | Giacomo Buonanno,
Donatella Sciuto,
Renato Stefanelli:
New CMOS Structures for the Synthesis of Dominant Functions.
VLSI Design 1993: 367-370 |
| 1992 |
|---|
| 8 | EE | Fabrizio Lombardi,
Donatella Sciuto:
Constant testability of combinational cellular tree structures.
J. Electronic Testing 3(2): 139-148 (1992) |
| 1991 |
|---|
| 7 | | X. Sun,
Yinan N. Shen,
Fabrizio Lombardi,
Donatella Sciuto:
Protocol Conformance Testing by Discriminating UIO Sequences.
PSTV 1991: 349-364 |
| 6 | EE | Anna Antola,
Mariagiovanna Sami,
Donatella Sciuto:
Testing and diagnosis ofFFT arrays.
VLSI Signal Processing 3(3): 225-236 (1991) |
| 1990 |
|---|
| 5 | | Peter Koo,
Fabrizio Lombardi,
Donatella Sciuto:
A Routing Algorithm for Harvesting Multipipeline Arrays with Small Intercell and Pipeline Delays.
ICCAD 1990: 2-5 |
| 4 | EE | Yinan N. Shen,
Fabrizio Lombardi,
Donatella Sciuto:
Evaluation and improvement of fault coverage for verification and validation of protocols.
SPDP 1990: 200-207 |
| 1988 |
|---|
| 3 | | Donatella Sciuto,
Fabrizio Lombardi:
On Functional Testing of Array Processors.
IEEE Trans. Computers 37(11): 1480-1484 (1988) |
| 2 | EE | Fabrizio Lombardi,
Donatella Sciuto,
Renato Stefanelli:
An algorithm for functional reconfiguration of fixed-size arrays.
IEEE Trans. on CAD of Integrated Circuits and Systems 7(10): 1114-1118 (1988) |
| 1987 |
|---|
| 1 | | Fabrizio Lombardi,
Donatella Sciuto,
Renato Stefanelli:
A Technique for Reconfiguring Two Dimensional VLSI Arrays.
IEEE Real-Time Systems Symposium 1987: 44-53 |
