Matteo Monchiero

2008
22	EE	Antonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto: Lightweight DMA management mechanisms for multiprocessors on FPGA. ASAP 2008: 275-280
21	EE	Antonino Tumeo, Marco Branca, Lorenzo Camerini, Marco Ceriani, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto: A Dual-Priority Real-Time Multiprocessor System on FPGA for Automotive Applications. DATE 2008: 1039-1044
20	EE	Dana Vantrease, Robert Schreiber, Matteo Monchiero, Moray McLaren, Norman P. Jouppi, Marco Fiorentino, Al Davis, Nathan L. Binkert, Raymond G. Beausoleil, Jung Ho Ahn: Corona: System Implications of Emerging Nanophotonic Technology. ISCA 2008: 153-164
19	EE	Shyamkumar Thoziyoor, Jung Ho Ahn, Matteo Monchiero, Jay B. Brockman, Norman P. Jouppi: A Comprehensive Memory Modeling Tool and Its Application to the Design and Analysis of Future Memory Hierarchies. ISCA 2008: 51-62
18	EE	Matteo Monchiero, Ramon Canal, Antonio González: Power/Performance/Thermal Design-Space Exploration for Multicore Architectures. IEEE Trans. Parallel Distrib. Syst. 19(5): 666-681 (2008)
2007
17	EE	Antonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto: A design kit for a fully working shared memory multiprocessor on FPGA. ACM Great Lakes Symposium on VLSI 2007: 219-222
16	EE	Antonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto: A Self-Reconfigurable Implementation of the JPEG Encoder. ASAP 2007: 24-29
15	EE	Antonino Tumeo, Marco Branca, Lorenzo Camerini, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto: An Interrupt Controller for FPGA-based Multiprocessors. ICSAMOS 2007: 82-87
14	EE	Antonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto: A Pipelined Fast 2D-DCT Accelerator for FPGA-based SoCs. ISVLSI 2007: 331-336
13	EE	Antonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto: An Internal Partial Dynamic Reconfiguration Implementation of the JPEG Encoder for Low-Cost FPGAsb. ISVLSI 2007: 449-450
12	EE	Oreste Villa, Patrick Schaumont, Ingrid Verbauwhede, Matteo Monchiero, Gianluca Palermo: Fast Dynamic Memory Integration in Co-Simulation Frameworks for Multiprocessor System on-Chip CoRR abs/0710.4646: (2007)
11	EE	Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa: Exploration of distributed shared memory architectures for NoC-based multiprocessors. Journal of Systems Architecture 53(10): 719-732 (2007)
2006
10	EE	Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa: Power/performance hardware optimization for synchronization intensive applications in MPSoCs. DATE 2006: 606-611
9	EE	Matteo Monchiero, Ramon Canal, Antonio González: Design space exploration for multicore architectures: a power/performance/thermal view. ICS 2006: 177-186
8	EE	Simone Borgio, Davide Bosisio, Fabrizio Ferrandi, Matteo Monchiero, Marco D. Santambrogio, Donatella Sciuto, Antonino Tumeo: Hardware DWT accelerator for MultiProcessor System-on-Chip on FPGA. ICSAMOS 2006: 107-114
7	EE	Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa: Exploration of Distributed Shared Memory Architectures for NoC-based Multiprocessors. ICSAMOS 2006: 144-151
6	EE	Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa: Efficient Synchronization for Embedded On-Chip Multiprocessors. IEEE Trans. VLSI Syst. 14(10): 1049-1062 (2006)
2005
5	EE	Oreste Villa, Patrick Schaumont, Ingrid Verbauwhede, Matteo Monchiero, Gianluca Palermo: Fast Dynamic Memory Integration in Co-Simulation Frameworks for Multiprocessor System on-Chip. DATE 2005: 804-805
4	EE	Matteo Monchiero, Gianluca Palermo: The Combined Perceptron Branch Predictor. Euro-Par 2005: 487-496
3	EE	Guido Bertoni, Vittorio Zaccaria, Luca Breveglieri, Matteo Monchiero, Gianluca Palermo: AES Power Attack Based on Induced Cache Miss and Countermeasure. ITCC (1) 2005: 586-591
2	EE	Matteo Monchiero, Gianluca Palermo, Mariagiovanna Sami, Cristina Silvano, Vittorio Zaccaria, Roberto Zafalon: Low-power branch prediction techniques for VLIW architectures: a compiler-hints based approach. Integration 38(3): 515-524 (2005)
2004
1	EE	Matteo Monchiero, Gianluca Palermo, Mariagiovanna Sami, Cristina Silvano, Vittorio Zaccaria, Roberto Zafalon: Power-aware branch prediction techniques: a compiler-hints based approach for VLIW processors. ACM Great Lakes Symposium on VLSI 2004: 440-443

Coauthor Index

1	Jung Ho Ahn	[19] [20]
2	Raymond G. Beausoleil	[20]
3	Guido Bertoni (Guido Marco Bertoni)	[3]
4	Nathan L. Binkert	[20]
5	Simone Borgio	[8]
6	Davide Bosisio	[8]
7	Marco Branca	[15] [21]
8	Luca Breveglieri	[3]
9	Jay B. Brockman	[19]
10	Lorenzo Camerini	[15] [21]
11	Ramon Canal	[9] [18]
12	Marco Ceriani	[21]
13	Al Davis	[20]
14	Fabrizio Ferrandi	[8] [13] [14] [15] [16] [17] [21] [22]
15	Marco Fiorentino	[20]
16	Antonio González	[9] [18]
17	Norman P. Jouppi	[19] [20]
18	Moray McLaren	[20]
19	Gianluca Palermo	[1] [2] [3] [4] [5] [6] [7] [10] [11] [12] [13] [14] [15] [16] [17] [21] [22]
20	Mariagiovanna Sami	[1] [2]
21	Marco D. Santambrogio	[8]
22	Patrick Schaumont	[5] [12]
23	Robert Schreiber	[20]
24	Donatella Sciuto	[8] [13] [14] [15] [16] [17] [21] [22]
25	Cristina Silvano	[1] [2] [6] [7] [10] [11]
26	Shyamkumar Thoziyoor	[19]
27	Antonino Tumeo	[8] [13] [14] [15] [16] [17] [21] [22]
28	Dana Vantrease	[20]
29	Ingrid Verbauwhede	[5] [12]
30	Oreste Villa	[5] [6] [7] [10] [11] [12]
31	Vittorio Zaccaria	[1] [2] [3]
32	Roberto Zafalon	[1] [2]

Colors in the list of coauthors