2007 |
19 | EE | Thuyen Le,
Tilman Glökler,
Jason Baumgartner:
Formal verification of a pervasive interconnect bus system in a high-performance microprocessor.
DATE 2007: 219-224 |
2006 |
18 | EE | Tilman Glökler,
Jason Baumgartner,
Devi Shanmugam,
A. E. (Rick) Seigler,
Gary A. Van Huben,
Barinjato Ramanandray,
Hari Mony,
Paul Roessler:
Enabling Large-Scale Pervasive Logic Verification through Multi-Algorithmic Formal Reasoning.
FMCAD 2006: 3-10 |
17 | EE | Jason Baumgartner,
Hari Mony,
Viresh Paruthi,
Robert Kanzelman,
Geert Janssen:
Scalable Sequential Equivalence Checking across Arbitrary Design Transformations .
ICCD 2006 |
2005 |
16 | EE | Jason Baumgartner,
Hari Mony:
Maximal Input Reduction of Sequential Netlists via Synergistic Reparameterization and Localization Strategies.
CHARME 2005: 222-237 |
15 | EE | Hari Mony,
Jason Baumgartner,
Adnan Aziz:
Exploiting Constraints in Transformation-Based Verification.
CHARME 2005: 269-284 |
14 | EE | Hari Mony,
Jason Baumgartner,
Viresh Paruthi,
Robert Kanzelman:
Exploiting suspected redundancy without proving it.
DAC 2005: 463-466 |
13 | EE | Christian Jacobi,
Kai Weber,
Viresh Paruthi,
Jason Baumgartner:
Automatic Formal Verification of Fused-Multiply-Add FPUs.
DATE 2005: 1298-1303 |
12 | | Fadi A. Zaraket,
Jason Baumgartner,
Adnan Aziz:
Scalable compositional minimization via static analysis.
ICCAD 2005: 1060-1067 |
11 | EE | Rebecca M. Gott,
Jason Baumgartner,
Paul Roessler,
S. I. Joe:
Functional formal verification on designs of pSeries microprocessors and communication subsystems.
IBM Journal of Research and Development 49(4-5): 565-580 (2005) |
2004 |
10 | EE | Jason Baumgartner,
Andreas Kuehlmann:
Enhanced Diameter Bounding via Structural.
DATE 2004: 36-41 |
9 | EE | Hari Mony,
Jason Baumgartner,
Viresh Paruthi,
Robert Kanzelman,
Andreas Kuehlmann:
Scalable Automated Verification via Expert-System Guided Transformations.
FMCAD 2004: 159-173 |
2003 |
8 | EE | Jason Baumgartner,
Tamir Heyman,
Vigyan Singhal,
Adnan Aziz:
An Abstraction Algorithm for the Verification of Level-Sensitive Latch-Based Netlists.
Formal Methods in System Design 23(1): 39-65 (2003) |
2002 |
7 | EE | Jason Baumgartner,
Andreas Kuehlmann,
Jacob A. Abraham:
Property Checking via Structural Analysis.
CAV 2002: 151-165 |
6 | EE | John M. Ludden,
Wolfgang Roesner,
Gerry M. Heiling,
John R. Reysa,
Jonathan R. Jackson,
Bing-Lun Chu,
Michael L. Behm,
Jason Baumgartner,
Richard D. Peterson,
Jamee Abdulhafiz,
William E. Bucy,
John H. Klaus,
Danny J. Klema,
Tien N. Le,
F. Danette Lewis,
Philip E. Milling,
Lawrence A. McConville,
Bradley S. Nelson,
Viresh Paruthi,
Travis W. Pouarz,
Audre D. Romonosky,
Jeff Stuecheli,
Kent D. Thompson,
Dave W. Victor,
Bruce Wile:
Functional verification of the POWER4 microprocessor and POWER4 multiprocessor system.
IBM Journal of Research and Development 46(1): 53-76 (2002) |
2001 |
5 | EE | Andreas Kuehlmann,
Jason Baumgartner:
Transformation-Based Verification Using Generalized Retiming.
CAV 2001: 104-117 |
4 | EE | Jason Baumgartner,
Andreas Kuehlmann:
Min-Area Retiming on Dynamic Circuit Structures.
ICCAD 2001: 176-182 |
2000 |
3 | | Jason Baumgartner,
Anson Tripp,
Adnan Aziz,
Vigyan Singhal,
Flemming Andersen:
An Abstraction Algorithm for the Verification of Generalized C-Slow Designs.
CAV 2000: 5-19 |
1999 |
2 | EE | Jason Baumgartner,
Tamir Heyman,
Vigyan Singhal,
Adnan Aziz:
Model Checking the IBM Gigahertz Processor: An Abstraction Algorithm for High-Performance Netlists.
CAV 1999: 72-83 |
1 | EE | Nadeem Malik,
Jason Baumgartner,
S. Roberts,
R. Dobson:
A toolset for assisted formal verification.
IPCCC 1999: 489-492 |