2008 |
29 | EE | Yifan He,
Zoran Zivkovic,
Richard P. Kleihorst,
Alexander Danilin,
Henk Corporaal,
Bart Mesman:
Real-Time Hough Transform on 1-D SIMD Processors: Implementation and Architecture Exploration.
ACIVS 2008: 254-265 |
28 | EE | Ahsan Shabbir,
Akash Kumar,
Bart Mesman,
Henk Corporaal:
Enabling MPSoC Design Space Exploration on FPGAs.
IMTIC 2008: 412-421 |
27 | EE | Raymond Frijns,
Hamed Fatemi,
Bart Mesman,
Henk Corporaal:
DC-SIMD : Dynamic communication for SIMD processors.
IPDPS 2008: 1-10 |
26 | EE | Akash Kumar,
Shakith Fernando,
Yajun Ha,
Bart Mesman,
Henk Corporaal:
Multiprocessor systems synthesis for multiple use-cases of multiple applications on FPGA.
ACM Trans. Design Autom. Electr. Syst. 13(3): (2008) |
25 | EE | Akash Kumar,
Bart Mesman,
Bart D. Theelen,
Henk Corporaal,
Yajun Ha:
Analyzing composability of applications on MPSoC platforms.
Journal of Systems Architecture - Embedded Systems Design 54(3-4): 369-383 (2008) |
2007 |
24 | EE | Akash Kumar,
Bart Mesman,
Henk Corporaal,
Bart D. Theelen,
Yajun Ha:
A Probabilistic Approach to Model Resource Contention for Performance Estimation of Multi-featured Media Devices.
DAC 2007: 726-731 |
23 | EE | Akash Kumar,
Shakith Fernando,
Yajun Ha,
Bart Mesman,
Henk Corporaal:
Multi-processor System-level Synthesis for Multiple Applications on Platform FPGA.
FPL 2007: 92-97 |
2006 |
22 | EE | Bart Mesman,
Hamed Fatemi,
Henk Corporaal,
Twan Basten:
Dynamic-SIMD for lens distortion compensation.
ASAP 2006: 261-264 |
21 | EE | Akash Kumar,
Bart Mesman,
Henk Corporaal,
Jef L. van Meerbergen,
Yajun Ha:
Global Analysis of Resource Arbitration for MPSoC.
DSD 2006: 71-78 |
20 | EE | Akash Kumar,
Bart Mesman,
Bart D. Theelen,
Henk Corporaal,
Yajun Ha:
Resource Manager for Non-preemptive Heterogeneous Multiprocessor System-on-chip.
ESTImedia 2006: 33-38 |
19 | EE | Hamed Fatemi,
Bart Mesman,
Henk Corporaal,
Twan Basten,
Pieter P. Jonker:
Run-time reconfiguration of communication in SIMD architectures.
IPDPS 2006 |
18 | EE | Hamed Fatemi,
Bart Mesman,
Henk Corporaal,
Twan Basten,
Richard P. Kleihorst:
RC-SIMD: Reconfigurable communication SIMD architecture for image processing applications.
J. Embedded Computing 2(2): 167-179 (2006) |
2005 |
17 | EE | Sander Stuijk,
Twan Basten,
Bart Mesman,
Marc Geilen:
Predictable Embedding of Large Data Structures in Multiprocessor Networks-on-Chip.
DATE 2005: 254-255 |
16 | EE | Sander Stuijk,
Twan Basten,
Bart Mesman,
Marc Geilen:
Predictable embedding of large data structures in multiprocessor networks-on-chip.
DSD 2005: 388-396 |
2004 |
15 | EE | Marco Bekooij,
Orlando Moreira,
Peter Poplavko,
Bart Mesman,
Milan Pastrnak,
Jef L. van Meerbergen:
Predictable Embedded Multiprocessor System Design.
SCOPES 2004: 77-91 |
2003 |
14 | EE | Peter Poplavko,
Twan Basten,
Marco Bekooij,
Jef L. van Meerbergen,
Bart Mesman:
Task-level timing models for guaranteed performance in multiprocessor networks-on-chip.
CASES 2003: 63-72 |
13 | EE | Qin Zhao,
Bart Mesman,
Henk Corporaal:
Limited Address Range Architecture for Reducing Code Size in Embedded Processors.
SCOPES 2003: 2-16 |
12 | EE | Qin Zhao,
Bart Mesman,
Twan Basten:
Static resource models for code-size efficient embedded processors.
ACM Trans. Embedded Comput. Syst. 2(2): 219-250 (2003) |
11 | EE | Bart Mesman,
Qin Zhao,
Natalino G. Busá,
Katarzyna Leijten-Nowak:
Reconfigurable Instruction-Set Application-Tuning for DSP.
Journal of Circuits, Systems, and Computers 12(3): 333-352 (2003) |
2002 |
10 | EE | Qin Zhao,
Bart Mesman,
Twan Basten:
Practical Instruction Set Design and Compiler Retargetability Using Static Resource Models.
DATE 2002: 1021-1027 |
2001 |
9 | EE | Carlos A. Alba Pinto,
Bart Mesman,
Koen Van Eijk,
Jochen A. G. Jess:
Constraint satisfaction for storage files with Fifos or stacks during scheduling.
DATE 2001: 824 |
8 | EE | Carlos A. Alba Pinto,
Bart Mesman,
Jochen A. G. Jess:
Constraint Satisfaction for Relative Location Assignment and Scheduling.
ICCAD 2001: 384-390 |
7 | | Qin Zhao,
Twan Basten,
Bart Mesman,
C. A. J. van Eijk,
Jochen A. G. Jess:
Static resource models of instruction sets.
ISSS 2001: 159-164 |
2000 |
6 | EE | Koen Van Eijk,
Bart Mesman,
Carlos A. Alba Pinto,
Qin Zhao,
Marco Bekooij,
Jef L. van Meerbergen,
Jochen A. G. Jess:
Constraint analysis for code generation: basic techniques and applications in FACTS.
ACM Trans. Design Autom. Electr. Syst. 5(4): 774-793 (2000) |
1999 |
5 | EE | C. A. J. van Eijk,
E. T. A. F. Jacobs,
Bart Mesman,
Adwin H. Timmer:
Identification and Exploitation of Symmetries in DSP Algorithms.
DATE 1999: 602-608 |
4 | EE | Bart Mesman,
Carlos A. Alba Pinto,
Koen Van Eijk:
Efficient Scheduling of DSP Code on Processors with Distributed Register Files.
ISSS 1999: 100-106 |
3 | EE | Bart Mesman,
Adwin H. Timmer,
Jef L. van Meerbergen,
Jochen A. G. Jess:
Constraint analysis for DSP code generation.
IEEE Trans. on CAD of Integrated Circuits and Systems 18(1): 44-57 (1999) |
1998 |
2 | EE | Bart Mesman,
Marino T. J. Strik,
Adwin H. Timmer,
Jef L. van Meerbergen,
Jochen A. G. Jess:
A Constraint Driven Approach to Loop Pipelining and Register Binding.
DATE 1998: 377-383 |
1997 |
1 | EE | Bart Mesman,
Marino T. J. Strik,
Adwin H. Timmer,
Jef L. van Meerbergen,
Jochen A. G. Jess:
Constraint Analysis for DSP Code Generation.
ISSS 1997: 33-40 |