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Norbert Wehn

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2008
59EETimo Vogt, Norbert Wehn: A Reconfigurable Application Specific Instruction Set Processor for Convolutional and Turbo Decoding in a SDR Environment. DATE 2008: 38-43
58EEMatthias May, Matthias Alles, Norbert Wehn: A Case Study in Reliability-Aware Design: A Resilient LDPC Code Decoder. DATE 2008: 456-461
57EEHeiko Hinkelmann, Peter Zipf, Manfred Glesner, Matthias Alles, Timo Vogt, Norbert Wehn, Götz Kappen, Tobias G. Noll: Application-specific reconfigurable processors. FPL 2008: 350
56EEMuhammad Anis, Reinhard Tielert, Norbert Wehn: 3.1-to-7GHz UWB impulse radio transceiver front-end based on statistical correlation technique. ISCAS 2008: 664-667
55EESacha Loitz, Markus Wedler, Christian Brehm, Timo Vogt, Norbert Wehn, Wolfgang Kunz: Proving Functional Correctness of Weakly Programmable IPs - A Case Study with Formal Property Checking. SASP 2008: 48-54
54EEFrank Kienle, Norbert Wehn: Macro Interleaver Design for Bit Interleaved Coded Modulation with Low-Density Parity-Check Codes. VTC Spring 2008: 763-766
53EEAkin Tanatmis, Stefan Ruzika, Horst W. Hamacher, Mayur Punekar, Frank Kienle, Norbert Wehn: A Separation Algorithm for Improved LP-Decoding of Linear Block Codes CoRR abs/0812.2559: (2008)
52EETimo Vogt, Norbert Wehn: A Reconfigurable ASIP for Convolutional and Turbo Decoding in an SDR Environment. IEEE Trans. VLSI Syst. 16(10): 1309-1320 (2008)
51EEChristian Neeb, Norbert Wehn: Designing efficient irregular networks for heterogeneous systems-on-chip. Journal of Systems Architecture - Embedded Systems Design 54(3-4): 384-396 (2008)
2007
50EETorben Brack, Matthias Alles, Timo Lehnigk-Emden, Frank Kienle, Norbert Wehn, Nicola E. L'Insalata, Francesco Rossi, Massimo Rovini, Luca Fanucci: Low complexity LDPC code decoders for next generation standards. DATE 2007: 331-336
49EEMatthias May, Christian Neeb, Norbert Wehn: Evaluation of High Throughput Turbo-Decoder Architectures. ISCAS 2007: 2770-2773
48EEZoltán Herczeg, Ákos Kiss, Daniel Schmidt, Norbert Wehn, Tibor Gyimóthy: XEEMU: An Improved XScale Power Simulator. PATMOS 2007: 300-309
47EEMatthias Alles, Torben Brack, Norbert Wehn: A Reliability-Aware LDPC Code Decoding Algorithm. VTC Spring 2007: 1544-1548
46EETorben Brack, Matthias Alles, Timo Lehnigk-Emden, Frank Kienle, Norbert Wehn, Friedbert Berens, Andreas Ruegg: A Survey on LDPC Codes and Decoders for OFDM-based UWB Systems. VTC Spring 2007: 1549-1553
2006
45EETorben Brack, Frank Kienle, Norbert Wehn: Disclosing the LDPC code decoder design space. DATE 2006: 200-205
44EEChristian Neeb, Norbert Wehn: Designing Efficient Irregular Networks for Heterogeneous Systems-on-Chip. DSD 2006: 665-672
43EENorbert Wehn, Timo Vogt, Christian Neeb: A Reconfigurable Outer Modem Platform for Future Communications Systems. Dynamically Reconfigurable Architectures 2006
42EENorbert Wehn: Advanced Channel Decoding Algorithms and Their Implementation for Future Communication Systems. ISVLSI 2006: 3
41 Timo Vogt, Christian Neeb, Norbert Wehn: A Reconfigurable Multi-Processor Platform for Convolutional and Turbo Decoding. ReCoSoC 2006: 16-23
40EEFrank Kienle, Timo Lehnigk-Emden, Norbert Wehn: Fast convergence algorithm for LDPC Codes. VTC Spring 2006: 2393-2397
2005
39EEFrank Kienle, Torben Brack, Norbert Wehn: A Synthesizable IP Core for DVB-S2 LDPC Code Decoding. DATE 2005: 100-105
38 Christian Neeb, Norbert Wehn: Energieminimierung von Basisbandsignalverarbeitungsalgorithmen auf programmierbaren Plattformen. GI Jahrestagung (1) 2005: 442
37EEChristian Neeb, Michael J. Thul, Norbert Wehn: Network-on-chip-centric approach to interleaving in high throughput channel decoders. ISCAS (2) 2005: 1766-1769
36EENorbert Wehn: Power Optimization in advanced Channel Coding. Power-aware Computing Systems 2005
35EEFrank Gilbert, Timo Vogt, Norbert Wehn: Architecture-driven voltage scaling for high-throughput turbo-decoders. J. Embedded Computing 1(3): 391-402 (2005)
34EEMichael J. Thul, Frank Gilbert, Timo Vogt, Gerd Kreiselmaier, Norbert Wehn: A Scalable System Architecture for High-Throughput Turbo-Decoders. VLSI Signal Processing 39(1-2): 63-77 (2005)
2004
33EEFrank Kienle, Norbert Wehn: Design methodology for IRA codes. ASP-DAC 2004: 459-462
32EEFriedbert Berens, Gerd Kreiselmaier, Norbert Wehn: Channel Decoder Architecture for 3G Mobile Wireless Terminals. DATE 2004: 192-197
31EEArmin Wellig, Julien Zory, Norbert Wehn: Energy- and Area-Efficient Deinterleaving Architecture for High-Throughput Wireless Applications. PATMOS 2004: 218-227
30EETimo Vogt, Norbert Wehn, Philippe Alves: A multi-standard channel-decoder for base-station applications. SBCCI 2004: 192-197
29EEMichael J. Thul, Norbert Wehn: FPGA implementation of parallel turbo-decoders. SBCCI 2004: 198-203
2003
28EEFrank Gilbert, Michael J. Thul, Norbert Wehn: Communication Centric Architectures for Turbo-Decoding on Embedded Multiprocessors . DATE 2003: 10356-10363
27EEFrank Gilbert, Norbert Wehn: Architecture-Driven Voltage Scaling for High-Throughput Turbo-Decoders. PATMOS 2003: 379-388
26EENorbert Wehn: System-on-Chip - Ein Sonderheft anlässlich des 60. Geburtstages von Prof. Dr. Dr. h.c. mult. Manfred Glesner. it - Information Technology 45(6): (2003)
25EENorbert Wehn: Vergleich von Hardware- und Software-Implementierungen in der digitalen Kommunikation am Beispiel der Kanalcodierung. it - Information Technology 45(6): (2003)
2002
24EEHeiko Michel, Alexander Worm, Norbert Wehn, Michael Münch: Hardware/Software Trade-Offs for Advanced 3G Channel Coding. DATE 2002: 396-401
23EEMichael J. Thul, Norbert Wehn, L. P. Rao: Enabling high-speed turbo-decoding through concurrent interleaving. ISCAS (1) 2002: 897-900
2001
22EEFrank Gilbert, Alexander Worm, Norbert Wehn: Low power implementation of a turbo-decoder on programmable architectures. ASP-DAC 2001: 400-403
21EEAlexander Worm, Holger Lamm, Norbert Wehn: Design of low-power high-speed maximum a priori decoder architectures. DATE 2001: 258-267
20EEAlexander Worm, Holger Lamm, Norbert Wehn: Vlsi Architectures For High-Speed Map Decoders. VLSI Design 2001: 446-453
19 Doris Keitel-Schulz, Norbert Wehn, Francky Catthoor, Preeti Ranjan Panda: Embedded Memories in System Design: Technology, Application, Design and Tools. VLSI Design 2001: 5-6
18EEDoris Keitel-Schulz, Norbert Wehn: Embedded DRAM Development: Technology, Physical Design, and Application Issues. IEEE Design & Test of Computers 18(3): 7-15 (2001)
2000
17EEMichael Münch, Norbert Wehn, Bernd Wurth, Renu Mehra, Jim Sproch: Automating RT-Level Operand Isolation to Minimize Power Consumption in Datapaths. DATE 2000: 624-
1998
16EENorbert Wehn, Søren Hein: Embedded DRAM Architectural Trade-Offs. DATE 1998: 704-708
15EEDoris Keitel-Schulz, Norbert Wehn: Issues in Embedded DRAM Development and Applications. ISSS 1998: 23-30
1997
14EEMichael Münch, Norbert Wehn, Manfred Glesner: An efficient ILP-based scheduling algorithm for control-dominated VHDL descriptions. ACM Trans. Design Autom. Electr. Syst. 2(4): 344-364 (1997)
1996
13EEMichael Münch, Manfred Glesner, Norbert Wehn: An Efficient ILP-Based Scheduling Algorithm for Control-Dominated VHDL Descriptions. ISSS 1996: 45-50
1995
12 U. Zahm, Thomas Hollstein, Hans-Jürgen Herpel, Norbert Wehn, Manfred Glesner: Advanced Method for Industry Related Education with an FPGA Design Self-Learning Kit. FPL 1995: 241-250
1994
11 Bernd Wurth, Norbert Wehn: Efficient Calculation of Boolean Relations for Multi-Level Logic Optimization. EDAC-ETC-EUROASIC 1994: 630-634
10EENorbert Wehn, J. Biesenack, Peter Duzy, T. Langmaier, Michael Münch, Michael Pilsl, S. Rumler: Scheduling of behavioral VHDL by retiming techniques. EURO-DAC 1994: 546-551
9 Régis Leveugle, Zahava Koren, Israel Koren, Gabriele Saucier, Norbert Wehn: The Hyeti Defect Tolerant Microprocessor: A Practical Experiment and its Cost-Effectiveness Analysis. IEEE Trans. Computers 43(12): 1398-1406 (1994)
1993
8 Norbert Wehn, Manfred Glesner, C. Vielhauer: Estimating lower hardware bounds in high-level synthesis. VLSI 1993: 261-270
7EEJ. Biesenack, M. Koster, A. Langmaier, S. Ledeux, S. Marz, Michael Payer, Michael Pilsl, S. Rumler, H. Soukup, Norbert Wehn, Peter Duzy: The Siemens high-level synthesis system CALLAS. IEEE Trans. VLSI Syst. 1(3): 244-253 (1993)
1992
6 J. Biesenack, Norbert Wehn, A. Stoll, Michael Payer: Data Part Optimizations in the CALLAS Synthesis Environment. Synthesis for Control Dominated Circuits 1992: 263-274
1991
5 Norbert Wehn, J. Biesenack, Michael Pilsl: A New Approach to Multiplexer Minimisation in the CALLAS Synthesis Environment. VLSI 1991: 203-213
4 A. Laudenbach, Manfred Glesner, Norbert Wehn: A VLSI System Design for the Control of High Performance Combustion Engines. VLSI 1991: 247-256
1990
3 Norbert Wehn, Manfred Glesner, A. Kister, S. Kastner: Timing Driven Partitioning of Combinational Logic. Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme 1990: 42-51
1988
2EENorbert Wehn, Manfred Glesner, K. Caesar, P. Mann, A. Roth: A Defect-Tolerant and Fully Testable PLA. DAC 1988: 22-33
1987
1EEJohannes Schuck, Norbert Wehn, Manfred Glesner, G. Kamp: The ALGIC Silicon Compiler System: Implementation, Design Experience and Results. DAC 1987: 370-375

Coauthor Index

1Matthias Alles [46] [47] [50] [57] [58]
2Philippe Alves [30]
3Muhammad Anis [56]
4Friedbert Berens [32] [46]
5J. Biesenack [5] [6] [7] [10]
6Torben Brack [39] [45] [46] [47] [50]
7Christian Brehm [55]
8K. Caesar [2]
9Francky Catthoor [19]
10Peter Duzy [7] [10]
11Luca Fanucci [50]
12Frank Gilbert [22] [27] [28] [34] [35]
13Manfred Glesner [1] [2] [3] [4] [8] [12] [13] [14] [57]
14Tibor Gyimóthy [48]
15Horst W. Hamacher [53]
16Søren Hein [16]
17Zoltán Herczeg [48]
18Hans-Jürgen Herpel [12]
19Heiko Hinkelmann [57]
20Thomas Hollstein [12]
21G. Kamp [1]
22Götz Kappen [57]
23S. Kastner [3]
24Doris Keitel-Schulz [15] [18] [19]
25Frank Kienle [33] [39] [40] [45] [46] [50] [53] [54]
26Ákos Kiss [48]
27A. Kister [3]
28Israel Koren [9]
29Zahava Koren [9]
30M. Koster [7]
31Gerd Kreiselmaier [32] [34]
32Wolfgang Kunz [55]
33Nicola E. L'Insalata [50]
34Holger Lamm [20] [21]
35A. Langmaier [7]
36T. Langmaier [10]
37A. Laudenbach [4]
38S. Ledeux [7]
39Timo Lehnigk-Emden [40] [46] [50]
40Régis Leveugle [9]
41Sacha Loitz [55]
42P. Mann [2]
43S. Marz [7]
44Matthias May [49] [58]
45Renu Mehra [17]
46Heiko Michel [24]
47Michael Münch [10] [13] [14] [17] [24]
48Christian Neeb [37] [38] [41] [43] [44] [49] [51]
49Tobias G. Noll [57]
50Preeti Ranjan Panda [19]
51Michael Payer [6] [7]
52Michael Pilsl [5] [7] [10]
53Mayur Punekar [53]
54L. P. Rao [23]
55Francesco Rossi [50]
56A. Roth [2]
57Massimo Rovini [50]
58Andreas Ruegg [46]
59S. Rumler [7] [10]
60Stefan Ruzika [53]
61Gabriele Saucier [9]
62Daniel Schmidt [48]
63Johannes Schuck [1]
64H. Soukup [7]
65Jim Sproch [17]
66A. Stoll [6]
67Akin Tanatmis [53]
68Michael J. Thul [23] [28] [29] [34] [37]
69Reinhard Tielert [56]
70C. Vielhauer [8]
71Timo Vogt [30] [34] [35] [41] [43] [52] [55] [57] [59]
72Markus Wedler [55]
73Armin Wellig [31]
74Alexander Worm [20] [21] [22] [24]
75Bernd Wurth [11] [17]
76U. Zahm [12]
77Peter Zipf [57]
78Julien Zory [31]

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Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)