Sebastià A. Bota

2009
16	EE	Eugeni García-Moreno, Kay Suenaga, Rodrigo Picos, Sebastià A. Bota, Miquel Roca, Eugeni Isern: Predictive test strategy for CMOS RF mixers. Integration 42(1): 95-102 (2009)
2007
15	EE	José Luis Rosselló, Carol de Benito, Sebastià A. Bota, Jaume Segura: Dynamic critical resistance: a timing-based critical resistance model for statistical delay testing of nanometer ICs. DATE 2007: 1271-1276
14	EE	X. Cano, Sebastià A. Bota, R. Graciani, D. Gascón, A. Herms, A. Comerma, Jaume Segura, L. Garrido: Heavy Ion Test Results in a CMOS triple Voting Register for a High-Energy Physics Experiment. IOLTS 2007: 183-184
13	EE	José Luis Rosselló, Vicens Canals, Sebastià A. Bota, Ali Keshavarzi, Jaume Segura: A Fast Concurrent Power-Thermal Model for Sub-100nm Digital ICs CoRR abs/0710.4759: (2007)
12	EE	Kay Suenaga, Rodrigo Picos, Sebastià A. Bota, Miquel Roca, Eugeni Isern, Eugenio García: A Module for BiST of CMOS RF Receivers. J. Electronic Testing 23(6): 605-612 (2007)
2006
11	EE	José Luis Rosselló, Sebastià A. Bota, Vicens Canals, Ivan de Paúl, Jaume Segura: A Fully CMOS Low-Cost Chaotic Neural Network. IJCNN 2006: 659-663
10	EE	José Luis Rosselló, Carol de Benito, Sebastià A. Bota, Jaume Segura: Leakage Power Characterization Considering Process Variations. PATMOS 2006: 66-74
9	EE	Sebastià A. Bota, M. Rosales, José Luis Rosselló, Jaume Segura: Low V_D_D vs. Delay: Is it Really a Good Correlation Metric for Nanometer ICs?. VTS 2006: 358-363
8	EE	Sebastià A. Bota, José Luis Rosselló, Carol de Benito, Ali Keshavarzi, Jaume Segura: Impact of Thermal Gradients on Clock Skew and Testing. IEEE Design & Test of Computers 23(5): 414-424 (2006)
2005
7	EE	José Luis Rosselló, Vicens Canals, Sebastià A. Bota, Ali Keshavarzi, Jaume Segura: A Fast Concurrent Power-Thermal Model for Sub-100nm Digital ICs. DATE 2005: 206-211
6	EE	Sebastià A. Bota, M. Rosales, José Luis Rosselló, Jaume Segura: Smart Temperature Sensor for Thermal Testing of Cell-Based ICs. DATE 2005: 464-465
5	EE	B. Alorda, Sebastià A. Bota, Jaume Segura: A Non-Intrusive Built-In Sensor for Transient Current Testing of Digital VLSI Circuits. IOLTS 2005: 177-182
4	EE	José Luis Rosselló, Sebastià A. Bota, Jaume Segura: Compact Static Power Model of Complex CMOS Gates. PATMOS 2005: 348-354
2004
3		Raimon Casanova, José Luis Merino, Ángel Dieguez, Sebastià A. Bota, Josep Samitier: A mixed-mode temperature control circuit for gas sensors. ISCAS (4) 2004: 896-909
2	EE	Sebastià A. Bota, M. Rosales, José Luis Rosselló, Jaume Segura, Ali Keshavarzi: Within Die Thermal Gradient Impact on Clock-Skew: A New Type of Delay-Fault Mechanism. ITC 2004: 1276-1284
2001
1	EE	José Luis Merino, Sebastià A. Bota, A. Herms, Josep Samitier, Enric Cabruja, X. Jordà, M. Vellvehí, J. Bausells, A. Ferré, J. Bigorr: Smart Temperature Sensor for On-Line Monitoring in Automotive Applications. IOLTW 2001: 122-126

Coauthor Index

1	B. Alorda	[5]
2	J. Bausells	[1]
3	Carol de Benito	[8] [10] [15]
4	J. Bigorr	[1]
5	Enric Cabruja	[1]
6	Vicens Canals	[7] [11] [13]
7	X. Cano	[14]
8	Raimon Casanova	[3]
9	A. Comerma	[14]
10	Ángel Dieguez	[3]
11	A. Ferré	[1]
12	Eugenio García	[12]
13	Eugeni García-Moreno	[16]
14	L. Garrido	[14]
15	D. Gascón	[14]
16	R. Graciani	[14]
17	A. Herms	[1] [14]
18	Eugeni Isern	[12] [16]
19	X. Jordà	[1]
20	Ali Keshavarzi	[2] [7] [8] [13]
21	José Luis Merino	[1] [3]
22	Ivan de Paúl	[11]
23	Rodrigo Picos	[12] [16]
24	Miquel Roca	[12] [16]
25	M. Rosales	[2] [6] [9]
26	José Luis Rosselló	[2] [4] [6] [7] [8] [9] [10] [11] [13] [15]
27	Josep Samitier	[1] [3]
28	Jaume Segura	[2] [4] [5] [6] [7] [8] [9] [10] [11] [13] [14] [15]
29	Kay Suenaga	[12] [16]
30	M. Vellvehí	[1]