2009 |
49 | EE | Behnam Amelifard,
Farzan Fallah,
Massoud Pedram:
Low-Power Fanout Optimization Using Multi Threshold Voltages and Multi Channel Lengths.
IEEE Trans. on CAD of Integrated Circuits and Systems 28(4): 478-489 (2009) |
2008 |
48 | EE | Behnam Amelifard,
Farzan Fallah,
Massoud Pedram:
Leakage Minimization of SRAM Cells in a Dual-Vt and Dual-Tox Technology.
IEEE Trans. VLSI Syst. 16(7): 851-860 (2008) |
47 | EE | Ehsan Pakbaznia,
Farzan Fallah,
Massoud Pedram:
Charge Recycling in Power-Gated CMOS Circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(10): 1798-1811 (2008) |
2007 |
46 | EE | Ehsan Pakbaznia,
Farzan Fallah,
Massoud Pedram:
Sizing and placement of charge recycling transistors in MTCMOS circuits.
ICCAD 2007: 791-796 |
45 | EE | Tohru Ishihara,
Farzan Fallah:
A Way Memoization Technique for Reducing Power Consumption of Caches in Application Specific Integrated Processors
CoRR abs/0710.4703: (2007) |
44 | EE | Afshin Abdollahi,
Farzan Fallah,
Massoud Pedram:
A Robust Power Gating Structure and Power Mode Transition Strategy for MTCMOS Design.
IEEE Trans. VLSI Syst. 15(1): 80-89 (2007) |
43 | EE | Anup Hosangadi,
Farzan Fallah,
Ryan Kastner:
Algebraic Methods for Optimizing Constant Multiplications in Linear Systems.
VLSI Signal Processing 49(1): 31-50 (2007) |
2006 |
42 | EE | Ehsan Pakbaznia,
Farzan Fallah,
Massoud Pedram:
Charge recycling in MTCMOS circuits: concept and analysis.
DAC 2006: 97-102 |
41 | EE | Anup Hosangadi,
Farzan Fallah,
Ryan Kastner:
Optimizing high speed arithmetic circuits using three-term extraction.
DATE 2006: 1294-1299 |
40 | EE | Behnam Amelifard,
Farzan Fallah,
Massoud Pedram:
Reducing the sub-threshold and gate-tunneling leakage of SRAM cells using Dual-Vt and Dual-Tox assignment.
DATE 2006: 995-1000 |
39 | EE | Donghoon Lee,
Tohru Ishihara,
Masanori Muroyama,
Hiroto Yasuura,
Farzan Fallah:
An Energy Characterization Framework for Software-Based Embedded Systems.
ESTImedia 2006: 59-64 |
38 | EE | Behnam Amelifard,
Farzan Fallah,
Massoud Pedram:
Low-power fanout optimization using MTCMOS and multi-Vt techniques.
ISLPED 2006: 334-337 |
37 | EE | Behnam Amelifard,
Massoud Pedram,
Farzan Fallah:
Low-leakage SRAM Design with Dual V_t Transistors.
ISQED 2006: 729-734 |
36 | EE | Anup Hosangadi,
Farzan Fallah,
Ryan Kastner:
Optimizing Polynomial Expressions by Algebraic Factorization and Common Subexpression Elimination.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 2012-2022 (2006) |
2005 |
35 | EE | Anup Hosangadi,
Farzan Fallah,
Ryan Kastner:
Reducing hardware complexity of linear DSP systems by iteratively eliminating two-term common subexpressions.
ASP-DAC 2005: 523-528 |
34 | EE | Afshin Abdollahi,
Farzan Fallah,
Massoud Pedram:
An effective power mode transition technique in MTCMOS circuits.
DAC 2005: 37-42 |
33 | EE | Tohru Ishihara,
Farzan Fallah:
A Way Memoization Technique for Reducing Power Consumption of Caches in Application Specific Integrated Processors.
DATE 2005: 358-363 |
32 | | Tohru Ishihara,
Farzan Fallah:
A cache-defect-aware code placement algorithm for improving the performance of processors.
ICCAD 2005: 995-1001 |
31 | EE | Tohru Ishihara,
Farzan Fallah:
A non-uniform cache architecture for low power system design.
ISLPED 2005: 363-368 |
30 | EE | Behnam Amelifard,
Farzan Fallah,
Massoud Pedram:
Low-power fanout optimization using multiple threshold voltage inverters.
ISLPED 2005: 95-98 |
29 | EE | Behnam Amelifard,
Farzan Fallah,
Massoud Pedram:
Closing the Gap between Carry Select Adder and Ripple Carry Adder: A New Class Closing the Gap between Carry Select Adder and Ripple Carry Adder: A New Class of Low-Power High-Performance Adders.
ISQED 2005: 148-152 |
28 | EE | Afshin Abdollahi,
Farzan Fallah,
Massoud Pedram:
Analysis and Optimization of Static Power Considering Transition Dependency of Leakage Current in VLSI Circuits.
ISQED 2005: 77-82 |
27 | EE | Anup Hosangadi,
Farzan Fallah,
Ryan Kastner:
Energy Efficient Hardware Synthesis of Polynomial Expressions.
VLSI Design 2005: 653-658 |
26 | EE | Farzan Fallah,
Massoud Pedram:
Standby and Active Leakage Current Control and Minimization in CMOS VLSI Circuits.
IEICE Transactions 88-C(4): 509-519 (2005) |
2004 |
25 | EE | Anup Hosangadi,
Farzan Fallah,
Ryan Kastner:
Common Subexpression Elimination Involving Multiple Variables for Linear DSP Synthesis.
ASAP 2004: 202-212 |
24 | EE | Anup Hosangadi,
Farzan Fallah,
Ryan Kastner:
Factoring and eliminating common subexpressions in polynomial expressions.
ICCAD 2004: 169-174 |
23 | | Afshin Abdollahi,
Farzan Fallah,
Massoud Pedram:
Leakage current reduction in CMOS VLSI circuits by input vector control.
IEEE Trans. VLSI Syst. 12(2): 140-154 (2004) |
22 | EE | Yazdan Aghaghiri,
Farzan Fallah,
Massoud Pedram:
Transition reduction in memory buses using sector-based encoding techniques.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(8): 1164-1174 (2004) |
2003 |
21 | EE | Afshin Abdollahi,
Massoud Pedram,
Farzan Fallah,
Indradeep Ghosh:
Precomputation-based Guarding for Dynamic and Leakage Power Reduction.
ICCD 2003: 90-97 |
20 | EE | Afshin Abdollahi,
Farzan Fallah,
Massoud Pedram:
Leakage Current Reduction in Sequential Circuits by Modifying the Scan Chains.
ISQED 2003: 49-54 |
2002 |
19 | EE | Yazdan Aghaghiri,
Massoud Pedram,
Farzan Fallah:
EZ Encoding: A Class of Irredundant Low Power Codes for Data Address and Multiplexed Address Buses.
DATE 2002: 1102 |
18 | EE | Farzan Fallah:
Binary time-frame expansion.
ICCAD 2002: 458-464 |
17 | EE | Seda Ogrenci Memik,
Farzan Fallah:
Accelerated SAT-based Scheduling of Control/Data Flow Graphs.
ICCD 2002: 395- |
16 | EE | Yazdan Aghaghiri,
Massoud Pedram,
Farzan Fallah:
Reducing transitions on memory buses using sector-based encoding technique.
ISLPED 2002: 190-195 |
15 | EE | Afshin Abdollahi,
Massoud Pedram,
Farzan Fallah:
Runtime mechanisms for leakage current reduction in CMOS VLSI circuits1, 2.
ISLPED 2002: 213-218 |
14 | EE | Yazdan Aghaghiri,
Farzan Fallah,
Massoud Pedram:
ALBORZ: Address Level Bus Power Optimization.
ISQED 2002: 470- |
13 | | Farzan Fallah:
Binary Time Frame Expansion.
IWLS 2002: 314-319 |
12 | | Afshin Abdollahi,
Farzan Fallah:
Runtime Mechanisms for Leakage Current Reduction in CMOS VLSI Circuits.
IWLS 2002: 419-424 |
11 | EE | Farzan Fallah,
Pranav Ashar,
Srinivas Devadas:
Functional vector generation for sequential HDL models under an observability-based code coverage metric.
IEEE Trans. VLSI Syst. 10(6): 919-923 (2002) |
10 | EE | Yazdan Aghaghiri,
Farzan Fallah,
Massoud Pedram:
A Class of Irredundant Encoding Techniques for Reducing Bus Power.
Journal of Circuits, Systems, and Computers 11(5): 445-458 (2002) |
2001 |
9 | | Farzan Fallah,
Koichiro Takayama:
A New Functional Test Program Generation Methodology.
ICCD 2001: 76-81 |
8 | | Serdar Tasiran,
Farzan Fallah,
David G. Chinnery,
Scott J. Weber,
Kurt Keutzer:
A Functional Validation Technique: Biased-Random Simulation Guided by Observability-Based Coverage.
ICCD 2001: 82-88 |
7 | EE | Yazdan Aghaghiri,
Farzan Fallah,
Massoud Pedram:
Irredundant address bus encoding for low power.
ISLPED 2001: 182-187 |
6 | EE | Farzan Fallah,
Srinivas Devadas,
Kurt Keutzer:
OCCOM-efficient computation of observability-based code coveragemetrics for functional verification.
IEEE Trans. on CAD of Integrated Circuits and Systems 20(8): 1003-1015 (2001) |
5 | EE | Farzan Fallah,
Srinivas Devadas,
Kurt Keutzer:
Functional vector generation for HDL models using linearprogramming and Boolean satisfiability.
IEEE Trans. on CAD of Integrated Circuits and Systems 20(8): 994-1002 (2001) |
2000 |
4 | EE | Farzan Fallah,
Stan Y. Liao,
Srinivas Devadas:
Solving covering problems using LPR-based lower bounds.
IEEE Trans. VLSI Syst. 8(1): 9-17 (2000) |
1999 |
3 | EE | Farzan Fallah,
Pranav Ashar,
Srinivas Devadas:
Simulation Vector Generation from HDL Descriptions for Observability-Enhanced Statement Coverage.
DAC 1999: 666-671 |
1998 |
2 | EE | Farzan Fallah,
Srinivas Devadas,
Kurt Keutzer:
OCCOM: Efficient Computation of Observability-Based Code Coverage Metrics for Functional Verification.
DAC 1998: 152-157 |
1 | EE | Farzan Fallah,
Srinivas Devadas,
Kurt Keutzer:
Functional Vector Generation for HDL Models Using Linear Programming and 3-Satisfiability.
DAC 1998: 528-533 |