| 2009 |
|---|
| 272 | | Mary Lou Soffa,
Mary Jane Irwin:
Proceedings of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2009, Washington, DC, USA, March 7-11, 2009
ACM 2009 |
| 271 | EE | Yang Ding,
Mahmut T. Kandemir,
Mary Jane Irwin,
Padma Raghavan:
Adapting Application Mapping to Systematic Within-Die Process Variations on Chip Multiprocessors.
HiPEAC 2009: 231-247 |
| 270 | EE | Aditya Yanamandra,
Mary Jane Irwin,
Vijaykrishnan Narayanan,
Mahmut T. Kandemir,
Sri Hari Krishna Narayanan:
In-Network Caching for Chip Multiprocessors.
HiPEAC 2009: 373-388 |
| 2008 |
|---|
| 269 | EE | Prasanth Mangalagiri,
Karthik Sarpatwari,
Aditya Yanamandra,
Vijaykrishnan Narayanan,
Yuan Xie,
Mary Jane Irwin,
Osama Awadel Karim:
A low-power phase change memory based hybrid cache architecture.
ACM Great Lakes Symposium on VLSI 2008: 395-398 |
| 268 | EE | Shekhar Srikantaiah,
Mahmut T. Kandemir,
Mary Jane Irwin:
Adaptive set pinning: managing shared caches in chip multiprocessors.
ASPLOS 2008: 135-144 |
| 267 | EE | Niranjan Soundararajan,
Aditya Yanamandra,
Chrysostomos Nicopoulos,
Narayanan Vijaykrishnan,
Anand Sivasubramaniam,
Mary Jane Irwin:
Analysis and solutions to issue queue process variation.
DSN 2008: 11-21 |
| 266 | EE | Taylan Yemliha,
Shekhar Srikantaiah,
Mahmut T. Kandemir,
Mustafa Karaköy,
Mary Jane Irwin:
Integrated code and data placement in two-dimensional mesh based chip multiprocessors.
ICCAD 2008: 583-588 |
| 265 | EE | Sayaka Akioka,
Feihui Li,
Konrad Malkowski,
Padma Raghavan,
Mahmut T. Kandemir,
Mary Jane Irwin:
Ring data location prediction scheme for Non-Uniform Cache Architectures.
ICCD 2008: 693-698 |
| 264 | EE | Aditya Yanamandra,
Bryan Cover,
Padma Raghavan,
Mary Jane Irwin,
Mahmut T. Kandemir:
Evaluating the role of scratchpad memories in chip multiprocessors for sparse matrix computations.
IPDPS 2008: 1-10 |
| 263 | EE | Yang Ding,
Mahmut T. Kandemir,
Padma Raghavan,
Mary Jane Irwin:
A helper thread based EDP reduction scheme for adapting application execution in CMPs.
IPDPS 2008: 1-14 |
| 262 | EE | Padma Raghavan,
Mahmut T. Kandemir,
Mary Jane Irwin,
Konrad Malkowski:
Managing power, performance and reliability trade-offs.
IPDPS 2008: 1-5 |
| 261 | EE | Krishnan Ramakrishnan,
R. Rajaraman,
Narayanan Vijaykrishnan,
Yuan Xie,
Mary Jane Irwin,
K. Unlu:
Hierarchical Soft Error Estimation Tool (HSEET).
ISQED 2008: 680-683 |
| 260 | EE | Mahmut T. Kandemir,
Feihui Li,
Mary Jane Irwin,
Seung Woo Son:
A novel migration-based NUCA design for chip multiprocessors.
SC 2008: 28 |
| 259 | EE | Feihui Li,
Mahmut T. Kandemir,
Mary Jane Irwin:
Implementation and evaluation of a migration-based NUCA design for chip multiprocessors.
SIGMETRICS 2008: 449-450 |
| 258 | EE | Suresh Srinivasan,
Krishnan Ramakrishnan,
Prasanth Mangalagiri,
Yuan Xie,
Vijaykrishnan Narayanan,
Mary Jane Irwin,
Karthik Sarpatwari:
Toward Increasing FPGA Lifetime.
IEEE Trans. Dependable Sec. Comput. 5(2): 115-127 (2008) |
| 257 | EE | Yuh-Fang Tsai,
Feng Wang,
Yuan Xie,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Design Space Exploration for 3-D Cache.
IEEE Trans. VLSI Syst. 16(4): 444-455 (2008) |
| 2007 |
|---|
| 256 | EE | Konrad Malkowski,
Padma Raghavan,
Mary Jane Irwin:
Memory Optimizations For Fast Power-Aware Sparse Computations.
IPDPS 2007: 1-6 |
| 255 | EE | S. Conner,
Sayaka Akioka,
Mary Jane Irwin,
Padma Raghavan:
Link Shutdown Opportunities During Collective Communications in 3-D Torus Nets.
IPDPS 2007: 1-8 |
| 254 | EE | Konrad Malkowski,
Greg M. Link,
Padma Raghavan,
Mary Jane Irwin:
Load Miss Prediction - Exploiting Power Performance Trade-offs.
IPDPS 2007: 1-8 |
| 253 | EE | Konrad Malkowski,
Padma Raghavan,
Mahmut T. Kandemir,
Mary Jane Irwin:
Phase-aware adaptive hardware selection for power-efficient scientific computations.
ISLPED 2007: 403-406 |
| 252 | EE | Amol Mupid,
Madhu Mutyam,
Narayanan Vijaykrishnan,
Yuan Xie,
Mary Jane Irwin:
Variation Analysis of CAM Cells.
ISQED 2007: 333-338 |
| 251 | EE | Krishnan Ramakrishnan,
R. Rajaraman,
S. Suresh,
Narayanan Vijaykrishnan,
Yuan Xie,
Mary Jane Irwin:
Variation Impact on SER of Combinational Circuits.
ISQED 2007: 911-916 |
| 250 | EE | Andrew J. Ricketts,
Madhu Mutyam,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Investigating Simple Low Latency Reliable Multiported Register Files.
ISVLSI 2007: 375-382 |
| 249 | EE | Sayaka Akioka,
Feihui Li,
Mahmut T. Kandemir,
Padma Raghavan,
Mary Jane Irwin:
Ring Prediction for Non-Uniform Cache Architectures.
PACT 2007: 401 |
| 248 | EE | Balaji Vaidyanathan,
Wei-Lun Hung,
Feng Wang,
Yuan Xie,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Architecting Microprocessor Components in 3D Design Space.
VLSI Design 2007: 103-108 |
| 247 | EE | Krishnan Ramakrishnan,
S. Suresh,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Impact of NBTI on FPGAs.
VLSI Design 2007: 717-722 |
| 246 | EE | Wei-Lun Hung,
Yuan Xie,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin:
Thermal-Aware Task Allocation and Scheduling for Embedded Systems
CoRR abs/0710.4660: (2007) |
| 245 | EE | Yuh-Fang Tsai,
Vijaykrishnan Narayanan,
Yuan Xie,
Mary Jane Irwin:
Leakage-Aware Interconnect for On-Chip Network
CoRR abs/0710.4731: (2007) |
| 244 | EE | Ronald F. Boisvert,
Mary Jane Irwin,
Holly E. Rushmeier:
Evolving the ACM journal distribution program.
Commun. ACM 50(9): 19-20 (2007) |
| 243 | EE | Soontae Kim,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Reducing non-deterministic loads in low-power caches via early cache set resolution.
Microprocessors and Microsystems 31(5): 293-301 (2007) |
| 242 | EE | Yuan Xie,
Lin Li,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Reliability-aware Co-synthesis for Embedded Systems.
VLSI Signal Processing 49(1): 87-99 (2007) |
| 2006 |
|---|
| 241 | | Mary Jane Irwin,
Koen De Bosschere:
Proceedings of the 2006 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'06), Ottawa, Ontario, Canada, June 14-16, 2006
ACM 2006 |
| 240 | EE | Guilin Chen,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Object duplication for improving reliability.
ASP-DAC 2006: 140-145 |
| 239 | EE | Andrew J. Ricketts,
Kevin M. Irick,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Priority scheduling in digital microfluidics-based biochips.
DATE 2006: 329-334 |
| 238 | EE | Mahmut T. Kandemir,
Guangyu Chen,
Feihui Li,
Mary Jane Irwin,
Ibrahim Kolcu:
Activity clustering for leakage management in SPMs.
DATE 2006: 696-697 |
| 237 | EE | Feng Wang,
Yuan Xie,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
On-chip bus thermal analysis and optimization.
DATE 2006: 850-855 |
| 236 | EE | Ozcan Ozturk,
Mahmut T. Kandemir,
Mary Jane Irwin,
Suleyman Tosun:
Multi-Level On-Chip Memory Hierarchy Design for Embedded Chip Multiprocessors.
ICPADS (1) 2006: 383-390 |
| 235 | EE | Konrad Malkowski,
Ingyu Lee,
Padma Raghavan,
Mary Jane Irwin:
Conjugate gradient sparse solvers: performance-power characteristics.
IPDPS 2006 |
| 234 | EE | Chun Liu,
Anand Sivasubramaniam,
Mahmut T. Kandemir,
Mary Jane Irwin:
Enhancing L2 organization for CMPs with a center cell.
IPDPS 2006 |
| 233 | EE | Konrad Malkowski,
Ingyu Lee,
Padma Raghavan,
Mary Jane Irwin:
On improving performance and energy profiles of sparse scientific applications.
IPDPS 2006 |
| 232 | EE | Wei-Lun Hung,
Greg M. Link,
Yuan Xie,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Interconnect and Thermal-aware Floorplanning for 3D Microprocessors.
ISQED 2006: 98-104 |
| 231 | EE | Theo Theocharides,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
A Parallel Architecture for Hardware Face Detection.
ISVLSI 2006: 452-453 |
| 230 | EE | Sayaka Akioka,
Konrad Malkowski,
Padma Raghavan,
Mary Jane Irwin,
Lois C. McInnes,
Boyana Norris:
Characterizing the Performance and Energy Attributes of Scientific Simulations.
International Conference on Computational Science (1) 2006: 242-249 |
| 229 | EE | Madhu Mutyam,
Feihui Li,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin:
Compiler-directed thermal management for VLIW functional units.
LCTES 2006: 163-172 |
| 228 | EE | Guangyu Chen,
Feihui Li,
Mahmut T. Kandemir,
Mary Jane Irwin:
Reducing NoC energy consumption through compiler-directed channel voltage scaling.
PLDI 2006: 193-203 |
| 227 | EE | S. Conner,
Greg M. Link,
S. Tobita,
Mary Jane Irwin,
Padma Raghavan:
Poster reception - Energy/performance modeling for collective communication in 3-D torus cluster networks.
SC 2006: 138 |
| 226 | EE | Konrad Malkowski,
Padma Raghavan,
Mary Jane Irwin:
Poster reception - Toward a power efficient computer architecture for Barnes-Hut N-body simulations.
SC 2006: 146 |
| 225 | EE | R. Rajaraman,
J. S. Kim,
Narayanan Vijaykrishnan,
Yuan Xie,
Mary Jane Irwin:
SEAT-LA: A Soft Error Analysis Tool for Combinational Logic.
VLSI Design 2006: 499-502 |
| 224 | EE | Wei Zhang,
Yuh-Fang Tsai,
David Duarte,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin:
Reducing dynamic and leakage energy in VLIW architectures.
ACM Trans. Embedded Comput. Syst. 5(1): 1-28 (2006) |
| 223 | EE | Guilin Chen,
Mahmut T. Kandemir,
Mary Jane Irwin,
J. Ramanujam:
Reducing code size through address register assignment.
ACM Trans. Embedded Comput. Syst. 5(1): 225-258 (2006) |
| 222 | EE | Ronald F. Boisvert,
Mary Jane Irwin:
Plagiarism on the rise.
Commun. ACM 49(6): 23-24 (2006) |
| 221 | EE | Jooheung Lee,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Wayne Wolf:
An efficient architecture for motion estimation and compensation in the transform domain.
IEEE Trans. Circuits Syst. Video Techn. 16(2): 191-201 (2006) |
| 220 | EE | Jooheung Lee,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Inverse discrete cosine transform architecture exploiting sparseness and symmetry properties.
IEEE Trans. Circuits Syst. Video Techn. 16(5): 655-662 (2006) |
| 2005 |
|---|
| 219 | EE | Ozcan Ozturk,
Mahmut T. Kandemir,
Mary Jane Irwin:
Using data compression in an MPSoC architecture for improving performance.
ACM Great Lakes Symposium on VLSI 2005: 353-356 |
| 218 | EE | Narayanan Vijaykrishnan,
Yuan Xie,
Mary Jane Irwin:
Designing reliable circuit in the presence of soft errors.
ASP-DAC 2005: 1 |
| 217 | EE | G. Chen,
Mahmut T. Kandemir,
Mary Jane Irwin,
Gokhan Memik:
Compiler-directed selective data protection against soft errors.
ASP-DAC 2005: 713-716 |
| 216 | EE | Ozcan Ozturk,
Mahmut T. Kandemir,
G. Chen,
Mary Jane Irwin,
Mustafa Karaköy:
Customized on-chip memories for embedded chip multiprocessors.
ASP-DAC 2005: 743-748 |
| 215 | EE | Feihui Li,
Guangyu Chen,
Mahmut T. Kandemir,
Mary Jane Irwin:
Compiler-directed proactive power management for networks.
CASES 2005: 137-146 |
| 214 | EE | Ozcan Ozturk,
Mahmut T. Kandemir,
Mary Jane Irwin:
Increasing on-chip memory space utilization for embedded chip multiprocessors through data compression.
CODES+ISSS 2005: 87-92 |
| 213 | EE | Aman Gayasen,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Exploring technology alternatives for nano-scale FPGA interconnects.
DAC 2005: 921-926 |
| 212 | EE | Ozcan Ozturk,
Mahmut T. Kandemir,
Mary Jane Irwin:
BB-GC: Basic-Block Level Garbage Collection.
DATE 2005: 1032-1037 |
| 211 | EE | Jie S. Hu,
Feihui Li,
Vijay Degalahal,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Compiler-Directed Instruction Duplication for Soft Error Detection.
DATE 2005: 1056-1057 |
| 210 | EE | Yuh-Fang Tsai,
Narayanan Vijaykrishnan,
Yuan Xie,
Mary Jane Irwin:
Leakage-Aware Interconnect for On-Chip Network.
DATE 2005: 230-231 |
| 209 | EE | Wei-Lun Hung,
Yuan Xie,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin:
Thermal-Aware Task Allocation and Scheduling for Embedded Systems.
DATE 2005: 898-899 |
| 208 | EE | Yuh-Fang Tsai,
Yuan Xie,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Three-Dimensional Cache Design Exploration Using 3DCacti.
ICCD 2005: 519-524 |
| 207 | EE | Padma Raghavan,
Mary Jane Irwin,
Lois C. McInnes,
Boyana Norris:
Adaptive Software for Scientific Computing: Co-Managing Quality-Performance-Power Tradeoffs.
IPDPS 2005 |
| 206 | EE | Chun Liu,
Anand Sivasubramaniam,
Mahmut T. Kandemir,
Mary Jane Irwin:
Exploiting Barriers to Optimize Power Consumption of CMPs.
IPDPS 2005 |
| 205 | EE | Guiling Wang,
Mary Jane Irwin,
Piotr Berman,
Haoying Fu,
Thomas F. La Porta:
Optimizing sensor movement planning for energy efficiency.
ISLPED 2005: 215-220 |
| 204 | EE | Wei-Lun Hung,
Yuan Xie,
Narayanan Vijaykrishnan,
Charles Addo-Quaye,
Theo Theocharides,
Mary Jane Irwin:
Thermal-Aware Floorplanning Using Genetic Algorithms.
ISQED 2005: 634-639 |
| 203 | EE | J. Lee,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
High Performance Array Processor for Video Decoding.
ISVLSI 2005: 28-33 |
| 202 | EE | Guangyu Chen,
Mahmut T. Kandemir,
Mary Jane Irwin:
Exploiting frequent field values in java objects for reducing heap memory requirements.
VEE 2005: 68-78 |
| 201 | EE | Theo Theocharides,
Greg M. Link,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Implementing LDPC Decoding on Network-on-Chip.
VLSI Design 2005: 134-137 |
| 200 | EE | Kevin M. Irick,
Wei Xu,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
A Nanosensor Array-Based VLSI Gas Discriminator.
VLSI Design 2005: 241-246 |
| 199 | EE | Yuh-Fang Tsai,
Narayanan Vijaykrishnan,
Yuan Xie,
Mary Jane Irwin:
Influence of Leakage Reduction Techniques on Delay/Leakage Uncertainty.
VLSI Design 2005: 374-379 |
| 198 | EE | Ismail Kadayif,
Mahmut T. Kandemir,
Guilin Chen,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Anand Sivasubramaniam:
Compiler-directed high-level energy estimation and optimization.
ACM Trans. Embedded Comput. Syst. 4(4): 819-850 (2005) |
| 197 | EE | J. Hu,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Analyzing data reuse for cache reconfiguration.
ACM Trans. Embedded Comput. Syst. 4(4): 851-876 (2005) |
| 196 | | Theocharis Theocharides,
Greg M. Link,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Networks on Chip (NoC): Interconnects of Next Generation Systems on Chip.
Advances in Computers 63: 36-92 (2005) |
| 195 | EE | Srinivasan Murali,
Theo Theocharides,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Luca Benini,
Giovanni De Micheli:
Analysis of Error Recovery Schemes for Networks on Chips.
IEEE Design & Test of Computers 22(5): 434-442 (2005) |
| 194 | EE | Eun Jung Kim,
Greg M. Link,
Ki Hwan Yum,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin,
Chita R. Das:
A Holistic Approach to Designing Energy-Efficient Cluster Interconnects.
IEEE Trans. Computers 54(6): 660-671 (2005) |
| 193 | EE | Mahmut T. Kandemir,
Mary Jane Irwin,
Guangyu Chen,
Ibrahim Kolcu:
Compiler-guided leakage optimization for banked scratch-pad memories.
IEEE Trans. VLSI Syst. 13(10): 1136-1146 (2005) |
| 192 | EE | Vijay Degalahal,
Lin Li,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin:
Soft errors issues in low-power caches.
IEEE Trans. VLSI Syst. 13(10): 1157-1166 (2005) |
| 191 | EE | Eric J. Swankoski,
Narayanan Vijaykrishnan,
Richard R. Brooks,
Mahmut T. Kandemir,
Mary Jane Irwin:
Symmetric encryption in reconfigurable and custom hardware.
IJES 1(3/4): 205-217 (2005) |
| 190 | EE | Ismail Kadayif,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
An integer linear programming-based tool for wireless sensor networks.
J. Parallel Distrib. Comput. 65(3): 247-260 (2005) |
| 189 | EE | Mary Jane Irwin,
Narayanan Vijaykrishnan:
Editorial.
JETC 1(1): 1-6 (2005) |
| 2004 |
|---|
| 188 | | Mary Jane Irwin,
Wei Zhao,
Luciano Lavagno,
Scott A. Mahlke:
Proceedings of the 2004 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2004, Washington DC, USA, September 22 - 25, 2004
ACM 2004 |
| 187 | EE | Ozcan Ozturk,
Mahmut T. Kandemir,
Mary Jane Irwin,
Ibrahim Kolcu:
Tuning data replication for improving behavior of MPSoC applications.
ACM Great Lakes Symposium on VLSI 2004: 170-173 |
| 186 | EE | Wei Xu,
Narayanan Vijaykrishnan,
Yuan Xie,
Mary Jane Irwin:
Design of a nanosensor array architecture.
ACM Great Lakes Symposium on VLSI 2004: 298-303 |
| 185 | EE | Yuan Xie,
Lin Li,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Reliability-Aware Co-Synthesis for Embedded Systems.
ASAP 2004: 41-50 |
| 184 | EE | Guilin Chen,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Anand Sivasubramaniam,
Mary Jane Irwin:
Analyzing heap error behavior in embedded JVM environments.
CODES+ISSS 2004: 230-235 |
| 183 | EE | Ozcan Ozturk,
Mahmut T. Kandemir,
I. Demirkiran,
Guangyu Chen,
Mary Jane Irwin:
Data compression for improving SPM behavior.
DAC 2004: 401-406 |
| 182 | EE | Lin Li,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin:
A Crosstalk Aware Interconnect with Variable Cycle Transmission.
DATE 2004: 102-107 |
| 181 | EE | Jie S. Hu,
Narayanan Vijaykrishnan,
Soontae Kim,
Mahmut T. Kandemir,
Mary Jane Irwin:
Scheduling Reusable Instructions for Power Reduction.
DATE 2004: 148-155 |
| 180 | EE | Mahmut T. Kandemir,
Ozcan Ozturk,
Mary Jane Irwin,
Ibrahim Kolcu:
Using Data Compression to Increase Energy Savings in Multi-bank Memories.
Euro-Par 2004: 310-317 |
| 179 | EE | Victor De La Luz,
Mahmut T. Kandemir,
Anand Sivasubramaniam,
Mary Jane Irwin:
Exploring the Possibility of Operating in the Compressed Domain.
Euro-Par 2004: 507-515 |
| 178 | EE | Aman Gayasen,
Yuh-Fang Tsai,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin,
Tim Tuan:
Reducing leakage energy in FPGAs using region-constrained placement.
FPGA 2004: 51-58 |
| 177 | EE | Aman Gayasen,
K. Lee,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin,
Tim Tuan:
A Dual-VDD Low Power FPGA Architecture.
FPL 2004: 145-157 |
| 176 | EE | Jie S. Hu,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Exploring Wakeup-Free Instruction Scheduling.
HPCA 2004: 232-243 |
| 175 | EE | Suresh Srinivasan,
Aman Gayasen,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Yuan Xie,
Mary Jane Irwin:
Improving soft-error tolerance of FPGA configuration bits.
ICCAD 2004: 107-110 |
| 174 | EE | Mahmut T. Kandemir,
Mary Jane Irwin,
Guilin Chen,
Ibrahim Kolcu:
Banked scratch-pad memory management for reducing leakage energy consumption.
ICCAD 2004: 120-124 |
| 173 | EE | Frank Ghenassia,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Analyzing software influences on substrate noise: an ADC perspective.
ICCAD 2004: 916-922 |
| 172 | EE | Wei-Lun Hung,
Charles Addo-Quaye,
Theo Theocharides,
Yuan Xie,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Thermal-Aware IP Virtualization and Placement for Networks-on-Chip Architecture.
ICCD 2004: 430-437 |
| 171 | EE | Eric J. Swankoski,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin:
A Parallel Architecture for Secure FPGA Symmetric Encryption.
IPDPS 2004 |
| 170 | EE | Lin Li,
Vijay Degalahal,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin:
Soft error and energy consumption interactions: a data cache perspective.
ISLPED 2004: 132-137 |
| 169 | EE | Guangyu Chen,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Field level analysis for heap space optimization in embedded java environments.
ISMM 2004: 131-142 |
| 168 | EE | Vijay Degalahal,
R. Ramanarayanan,
Narayanan Vijaykrishnan,
Yuan Xie,
Mary Jane Irwin:
The Effect of Threshold Voltages on the Soft Error Rate.
ISQED 2004: 503-508 |
| 167 | EE | Matthew Pirretti,
Greg M. Link,
Richard R. Brooks,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin:
Fault Tolerant Algorithms for Network-On-Chip Interconnect.
ISVLSI 2004: 46-51 |
| 166 | EE | Theo Theocharides,
Greg M. Link,
Eric J. Swankoski,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Herman Schmit:
Evaluating Alternative Implementations for LDPC Decoder Check Node Function.
ISVLSI 2004: 77-82 |
| 165 | EE | Hendra Saputra,
Guangyu Chen,
Richard R. Brooks,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin:
Code protection for resource-constrained embedded devices.
LCTES 2004: 240-248 |
| 164 | EE | J. Lee,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Wayne Wolf:
An Architecture for Motion Estimation in the Transform Domain.
VLSI Design 2004: 1077-1082 |
| 163 | EE | Theo Theocharides,
Greg M. Link,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Wayne Wolf:
Embedded Hardware Face Detection.
VLSI Design 2004: 133- |
| 162 | EE | M. DeRenzo,
Mary Jane Irwin,
Narayanan Vijaykrishnan:
Designing Leakage Aware Multipliers.
VLSI Design 2004: 654-657 |
| 161 | EE | Guangyu Chen,
Byung-Tae Kang,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Rajarathnam Chandramouli:
Studying Energy Trade Offs in Offloading Computation/Compilation in Java-Enabled Mobile Devices.
IEEE Trans. Parallel Distrib. Syst. 15(9): 795-809 (2004) |
| 160 | EE | Yuh-Fang Tsai,
D. E. Duarte,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Characterization and modeling of run-time techniques for leakage power reduction.
IEEE Trans. VLSI Syst. 12(11): 1221-1233 (2004) |
| 159 | EE | Mahmut T. Kandemir,
J. Ramanujam,
Mary Jane Irwin,
Narayanan Vijaykrishnan,
Ismail Kadayif,
Amisha Parikh:
A compiler-based approach for dynamically managing scratch-pad memories in embedded systems.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(2): 243-260 (2004) |
| 158 | EE | Wei Zhang,
Jie S. Hu,
Vijay Degalahal,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Reducing instruction cache energy consumption using a compiler-based strategy.
TACO 1(1): 3-33 (2004) |
| 157 | EE | Amisha Parikh,
Soontae Kim,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Instruction Scheduling for Low Power.
VLSI Signal Processing 37(1): 129-149 (2004) |
| 2003 |
|---|
| 156 | EE | Guilin Chen,
Mahmut T. Kandemir,
Hendra Saputra,
Mary Jane Irwin:
Exploiting bank locality in multi-bank memories.
CASES 2003: 287-297 |
| 155 | EE | Wei Zhang,
Mahmut T. Kandemir,
Anand Sivasubramaniam,
Mary Jane Irwin:
Performance, energy, and reliability tradeoffs in replicating hot cache lines.
CASES 2003: 309-317 |
| 154 | EE | Mahmut T. Kandemir,
Mary Jane Irwin,
Guilin Chen,
J. Ramanujam:
Address Register Assignment for Reducing Code Size.
CC 2003: 273-289 |
| 153 | EE | Ananth Hegde,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin:
VL-CDRAM: variable line sized cached DRAMs.
CODES+ISSS 2003: 132-137 |
| 152 | EE | Guangyu Chen,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin,
Mario Wolczko:
Tracking object life cycle for leakage energy optimization.
CODES+ISSS 2003: 213-218 |
| 151 | EE | Yuh-Fang Tsai,
David Duarte,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Implications of technology scaling on leakage reduction techniques.
DAC 2003: 187-190 |
| 150 | EE | Hendra Saputra,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin,
Richard R. Brooks,
Soontae Kim,
Wei Zhang:
Masking the Energy Behavior of DES Encryption.
DATE 2003: 10084-10089 |
| 149 | EE | Wei Zhang,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Vivek De:
Compiler Support for Reducing Leakage Energy Consumption.
DATE 2003: 11146-11147 |
| 148 | EE | Lin Li,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin,
Ismail Kadayif:
CCC: Crossbar Connected Caches for Reducing Energy Consumption of On-Chip Multiprocessors.
DSD 2003: 41-49 |
| 147 | EE | Lin Li,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin:
Adapative Error Protection for Energy Efficiency.
ICCAD 2003: 2-7 |
| 146 | EE | Victor Delaluz,
Mahmut T. Kandemir,
Anand Sivasubramaniam,
Mary Jane Irwin,
Narayanan Vijaykrishnan:
Reducing dTLB Energy Through Dynamic Resizing.
ICCD 2003: 358-363 |
| 145 | EE | Sudhanva Gurumurthi,
Ning An,
Anand Sivasubramaniam,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin:
Energy and Performance Considerations in Work Partitioning for Mobile Spatial Queries.
IPDPS 2003: 33 |
| 144 | EE | Guilin Chen,
Byung-Tae Kang,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Rajarathnam Chandramouli:
Energy-Aware Compilation and Execution in Java-Enabled Mobile Devices.
IPDPS 2003: 34 |
| 143 | EE | Soontae Kim,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Lizy Kurian John:
On load latency in low-power caches.
ISLPED 2003: 258-261 |
| 142 | EE | Hyun Suk Kim,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Erik Brockmeyer,
Francky Catthoor,
Mary Jane Irwin:
Estimating influence of data layout optimizations on SDRAM energy consumption.
ISLPED 2003: 40-43 |
| 141 | EE | Jie S. Hu,
A. Nadgir,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Mahmut T. Kandemir:
Exploiting program hotspots and code sequentiality for instruction cache leakage management.
ISLPED 2003: 402-407 |
| 140 | EE | Eun Jung Kim,
Ki Hwan Yum,
Greg M. Link,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin,
Mazin S. Yousif,
Chita R. Das:
Energy optimization techniques in cluster interconnects.
ISLPED 2003: 459-464 |
| 139 | EE | Sudhanva Gurumurthi,
Jianyong Zhang,
Anand Sivasubramaniam,
Mahmut T. Kandemir,
Hubertus Franke,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Interplay of energy and performance for disk arrays running transaction processing workloads.
ISPASS 2003: 123-132 |
| 138 | EE | Jie S. Hu,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Mahmut T. Kandemir:
Using Dynamic Branch Behavior for Power-Efficient Instruction Fetch.
ISVLSI 2003: 127-132 |
| 137 | EE | Hyun Suk Kim,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin:
Adapting instruction level parallelism for optimizing leakage in VLIW architectures.
LCTES 2003: 275-283 |
| 136 | EE | Guangyu Chen,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Bernd Mathiske,
Mario Wolczko:
Heap compression for memory-constrained Java environments.
OOPSLA 2003: 282-301 |
| 135 | EE | Vijay Degalahal,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Analyzing Soft Errors in Leakage Optimized SRAM Design.
VLSI Design 2003: 227-233 |
| 134 | EE | Soontae Kim,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Anand Sivasubramaniam,
Mary Jane Irwin:
Partitioned instruction cache architecture for energy efficiency.
ACM Trans. Embedded Comput. Syst. 2(2): 163-185 (2003) |
| 133 | EE | Nam Sung Kim,
Todd M. Austin,
David Blaauw,
Trevor N. Mudge,
Krisztián Flautner,
Jie S. Hu,
Mary Jane Irwin,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan:
Leakage Current: Moore's Law Meets Static Power.
IEEE Computer 36(12): 68-75 (2003) |
| 132 | | Mary Jane Irwin:
Power-Aware Designers at Odds with Power Grid Designers?
IEEE Design & Test of Computers 20(3): 120- (2003) |
| 131 | EE | Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin,
Hyun Suk Kim,
Wu Ye,
David Duarte:
Evaluating Integrated Hardware-Software Optimizations Using a Unified Energy Estimation Framework.
IEEE Trans. Computers 52(1): 59-76 (2003) |
| 130 | EE | Lin Li,
Ismail Kadayif,
Yuh-Fang Tsai,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin,
Anand Sivasubramaniam:
Managing Leakage Energy in Cache Hierarchies.
J. Instruction-Level Parallelism 5: (2003) |
| 2002 |
|---|
| 129 | | Vivek De,
Mary Jane Irwin,
Ingrid Verbauwhede,
Christian Piguet:
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002, Monterey, California, USA, August 12-14, 2002
ACM 2002 |
| 128 | EE | Guangyu Chen,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Wayne Wolf:
Energy savings through compression in embedded Java environments.
CODES 2002: 163-168 |
| 127 | EE | Victor Delaluz,
Anand Sivasubramaniam,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Scheduler-based DRAM energy management.
DAC 2002: 697-702 |
| 126 | EE | Jie S. Hu,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin:
Power-Efficient Trace Caches.
DATE 2002: 1091 |
| 125 | EE | David Duarte,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
A Complete Phase-Locked Loop Power Consumption Model.
DATE 2002: 1108 |
| 124 | EE | Ismail Kadayif,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Anand Sivasubramaniam:
EAC: A Compiler Framework for High-Level Energy Estimation and Optimization.
DATE 2002: 436-442 |
| 123 | EE | Sudhanva Gurumurthi,
Anand Sivasubramaniam,
Mary Jane Irwin,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Tao Li,
Lizy Kurian John:
Using Complete Machine Simulation for Software Power Estimation: The SoftWatt Approach.
HPCA 2002: 141-150 |
| 122 | EE | Guangyu Chen,
R. Shetty,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Mario Wolczko:
Tuning Garbage Collection in an Embedded Java Environment.
HPCA 2002: 92- |
| 121 | EE | David Duarte,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Hyun Suk Kim,
G. McFarland:
Impact of Scaling on the Effectiveness of Dynamic Power Reduction Schemes.
ICCD 2002: 382-387 |
| 120 | EE | Lin Li,
Ismail Kadayif,
Yuh-Fang Tsai,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin,
Anand Sivasubramaniam:
Leakage Energy Management in Cache Hierarchies.
IEEE PACT 2002: 131-140 |
| 119 | EE | Anand Sivasubramaniam,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Designing Energy-Efficient Software.
IPDPS 2002 |
| 118 | EE | Ismail Kadayif,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Hardware-Software Co-Adaptation for Data-Intensive Embedded Applications.
ISVLSI 2002: 20-25 |
| 117 | EE | David Duarte,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Impact of Technology Scaling in the Clock System Power.
ISVLSI 2002: 59-64 |
| 116 | EE | Guangyu Chen,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Mario Wolczko:
Adaptive Garbage Collection for Battery-Operated Environments.
Java™ Virtual Machine Research and Technology Symposium 2002: 1-12 |
| 115 | EE | Jie S. Hu,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Hendra Saputra,
Wei Zhang:
Compiler-directed cache polymorphism.
LCTES-SCOPES 2002: 165-174 |
| 114 | EE | Hendra Saputra,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Jie S. Hu,
Chung-Hsing Hsu,
Ulrich Kremer:
Energy-conscious compilation based on voltage scaling.
LCTES-SCOPES 2002: 2-11 |
| 113 | EE | Wei Zhang,
Jie S. Hu,
Vijay Degalahal,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Compiler-directed instruction cache leakage optimization.
MICRO 2002: 208-218 |
| 112 | EE | Victor Delaluz,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Anand Sivasubramaniam,
Ibrahim Kolcu:
Compiler-Directed Array Interleaving for Reducing Energy in Multi-Bank Memories.
VLSI Design 2002: 288- |
| 111 | EE | David Duarte,
Yuh-Fang Tsai,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Evaluating Run-Time Techniques for Leakage Power Reduction.
VLSI Design 2002: 31-38 |
| 110 | EE | Guangyu Chen,
R. Shetty,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Mario Wolczko:
Tuning garbage collection for reducing memory system energy in an embedded java environment.
ACM Trans. Embedded Comput. Syst. 1(1): 27-55 (2002) |
| 109 | EE | D. E. Duarte,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
A clock power model to evaluate impact of architectural and technology optimizations.
IEEE Trans. VLSI Syst. 10(6): 844-855 (2002) |
| 108 | EE | Guangyu Chen,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Wayne Wolf:
Using Memory Compression for Energy Reduction in an Embedded Java System.
Journal of Circuits, Systems, and Computers 11(5): 537-556 (2002) |
| 107 | EE | Ning An,
Sudhanva Gurumurthi,
Anand Sivasubramaniam,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin:
Energy-performance trade-offs for spatial access methods on memory-resident data.
VLDB J. 11(3): 179-197 (2002) |
| 2001 |
|---|
| 106 | | Enrico Macii,
Vivek De,
Mary Jane Irwin:
Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001, Huntington Beach, California, USA, 2001
ACM 2001 |
| 105 | EE | Hyun Suk Kim,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin:
Energy-efficient instruction cache using page-based placement.
CASES 2001: 229-237 |
| 104 | EE | Mahmut T. Kandemir,
J. Ramanujam,
Mary Jane Irwin,
Narayanan Vijaykrishnan,
Ismail Kadayif,
Amisha Parikh:
Dynamic Management of Scratch-Pad Memory Space.
DAC 2001: 690-695 |
| 103 | EE | Victor Delaluz,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Anand Sivasubramaniam,
Mary Jane Irwin:
DRAM Energy Management Using Software and Hardware Directed Power Mode Control.
HPCA 2001: 159-170 |
| 102 | | Hyun Suk Kim,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin:
A Framework for Energy Estimation of VLIW Architecture.
ICCD 2001: 40-45 |
| 101 | | Samarjeet Singh Tomar,
Hyun Suk Kim,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin:
Use of Local Memory for Efficient Java Execution.
ICCD 2001: 468-476 |
| 100 | | R. Athavale,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin:
Influence of Array Allocation Mechanisms on Memory System Energy.
IPDPS 2001: 3 |
| 99 | EE | Soontae Kim,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Anand Sivasubramaniam,
Mary Jane Irwin,
E. Geethanjali:
Power-aware partitioned cache architectures.
ISLPED 2001: 64-67 |
| 98 | EE | Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Soontae Kim,
Samarjeet Singh Tomar,
Anand Sivasubramaniam,
Mary Jane Irwin:
Energy Behavior of Java Applications from the Memory Perspective.
Java™ Virtual Machine Research and Technology Symposium 2001: 207-220 |
| 97 | | Ismail Kadayif,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
J. Ramanujam:
Morphable Cache Architectures: Potential Benefits.
LCTES/OM 2001: 128-137 |
| 96 | EE | Wei Zhang,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin,
David Duarte,
Yuh-Fang Tsai:
Exploiting VLIW schedule slacks for dynamic and leakage energy reduction.
MICRO 2001: 102-113 |
| 95 | EE | Pradeep K. Khosla,
Herman Schmit,
Mary Jane Irwin,
Narayanan Vijaykrishnan,
Tom Cain,
Steven P. Levitan,
Dave Landis:
SoC Design Skills: Collaboration Builds a Stronger SoC Design Team.
MSE 2001: 42-43 |
| 94 | EE | Ismail Kadayif,
T. Chinoda,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Anand Sivasubramaniam:
vEC: virtual energy counters.
PASTE 2001: 28-31 |
| 93 | EE | Ning An,
Anand Sivasubramaniam,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin,
Sudhanva Gurumurthi:
Analyzing energy behavior of spatial access methods for memory-resident data.
VLDB 2001: 411-420 |
| 92 | EE | David Duarte,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Mahmut T. Kandemir:
Formulation and Validation of an Energy Dissipation Model for the Clock Generation Circuitry and Distribution Networks.
VLSI Design 2001: 248-253 |
| 91 | EE | Rita Yu Chen,
Mary Jane Irwin,
Raminder Singh Bajwa:
Architecture-level power estimation and design experiments.
ACM Trans. Design Autom. Electr. Syst. 6(1): 50-66 (2001) |
| 90 | EE | Victor Delaluz,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Anand Sivasubramaniam,
Mary Jane Irwin:
Hardware and Software Techniques for Controlling DRAM Power Modes.
IEEE Trans. Computers 50(11): 1154-1173 (2001) |
| 89 | EE | Benjamin Bishop,
V. Lyuboslavsky,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Design considerations for databus charge recovery.
IEEE Trans. VLSI Syst. 9(1): 104-106 (2001) |
| 88 | EE | Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Wu Ye:
Influence of compiler optimizations on system power.
IEEE Trans. VLSI Syst. 9(6): 801-804 (2001) |
| 2000 |
|---|
| 87 | EE | Jeyran Hezavei,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
A comparative study of power efficient SRAM designs.
ACM Great Lakes Symposium on VLSI 2000: 117-122 |
| 86 | EE | Benjamin Bishop,
Thomas P. Kelliher,
Mary Jane Irwin:
SPARTA: Simulation of Physics on a Real-Time Architecture.
ACM Great Lakes Symposium on VLSI 2000: 177-182 |
| 85 | EE | Victor Delaluz,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Energy-oriented compiler optimizations for partitioned memory architectures.
CASES 2000: 138-147 |
| 84 | EE | Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Wu Ye:
Influence of compiler optimizations on system power.
DAC 2000: 304-307 |
| 83 | EE | Wu Ye,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin:
The design and use of simplepower: a cycle-accurate energy estimation tool.
DAC 2000: 340-345 |
| 82 | EE | Amisha Parikh,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin:
Energy-Aware Instruction Scheduling.
HiPC 2000: 335-344 |
| 81 | | Benjamin Bishop,
Thomas P. Kelliher,
Mary Jane Irwin:
Hardware/Software Co-design for Real-Time Physical Modeling.
IEEE International Conference on Multimedia and Expo (III) 2000: 1363-1366 |
| 80 | EE | Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin,
Hyun Suk Kim,
Wu Ye:
Energy-driven integrated hardware-software optimizations using SimplePower.
ISCA 2000: 95-106 |
| 79 | EE | G. Esakkimuthu,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Mary Jane Irwin:
Memory system energy (poster session): influence of hardware-software optimizations.
ISLPED 2000: 244-246 |
| 78 | EE | Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Hyun Suk Kim:
Experimental Evaluation of Energy Behavior of Iteration Space Tiling.
LCPC 2000: 142-157 |
| 77 | EE | Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Mary Jane Irwin,
Hyun Suk Kim:
Towards Energy-Aware Iteration Space Tiling.
LCTES 2000: 211-215 |
| 76 | EE | Mary Jane Irwin,
Mahmut T. Kandemir,
Narayanan Vijaykrishnan,
Anand Sivasubramaniam:
A Holistic Approach to System Level Energy Optimization.
PATMOS 2000: 88-107 |
| 75 | EE | Mary Jane Irwin:
Editorial.
ACM Trans. Design Autom. Electr. Syst. 5(3): 265-266 (2000) |
| 74 | EE | Gayles Gayles,
Thomas P. Kelliher,
Robert Michael Owens,
Mary Jane Irwin:
The design of the MGAP-2: a micro-grained massively parallel array.
IEEE Trans. VLSI Syst. 8(6): 709-716 (2000) |
| 1999 |
|---|
| 73 | EE | Benjamin Bishop,
Thomas P. Kelliher,
Mary Jane Irwin:
The Design of a Register Renaming Unit.
Great Lakes Symposium on VLSI 1999: 34-37 |
| 72 | EE | Benjamin Bishop,
Mary Jane Irwin:
Databus charge recovery: practical considerations.
ISLPED 1999: 85-87 |
| 71 | EE | Manjit Borah,
Robert Michael Owens,
Mary Jane Irwin:
A Fast and Simple Steiner Routing Heuristic.
Discrete Applied Mathematics 90(1-3): 51-67 (1999) |
| 70 | EE | Benjamin Bishop,
Thomas P. Kelliher,
Robert Michael Owens,
Mary Jane Irwin:
Aggressive Dynamic Execution of Decoded Traces.
VLSI Signal Processing 22(1): 65-75 (1999) |
| 1998 |
|---|
| 69 | EE | Rita Yu Chen,
Robert Michael Owens,
Mary Jane Irwin,
Raminder Singh Bajwa:
Validation of an Architectural Level Power Analysis Technique.
DAC 1998: 242-245 |
| 68 | EE | Benjamin Bishop,
Robert Michael Owens,
Mary Jane Irwin:
Aggressive Dynamic Execution of Multimedia Kernel Traces.
IPPS/SPDP 1998: 640-646 |
| 67 | EE | John R. Sacha,
Mary Jane Irwin:
The logarithmic number system for strength reduction in adaptive filtering.
ISLPED 1998: 256-261 |
| 66 | EE | Mary Jane Irwin,
S. Y. Kung,
Earl E. Swartzlander Jr.:
Editorial Message.
VLSI Signal Processing 18(1): 7-8 (1998) |
| 65 | EE | Kevin P. Acken,
Mary Jane Irwin,
Robert Michael Owens:
A Parallel ASIC Architecture for Efficient Fractal Image Coding.
VLSI Signal Processing 19(2): 97-113 (1998) |
| 1997 |
|---|
| 64 | EE | Kevin P. Acken,
Eric Gayles,
Thomas P. Kelliher,
Robert Michael Owens,
Mary Jane Irwin:
The MGAP Family of Processor Arrays.
Great Lakes Symposium on VLSI 1997: 105- |
| 63 | EE | Eric Gayles,
Kevin P. Acken,
Robert Michael Owens,
Mary Jane Irwin:
A Clocked, Static Circuit Technique for Building Efficient High Frequency Pipelines.
Great Lakes Symposium on VLSI 1997: 182- |
| 62 | EE | Atul Kalambur,
Mary Jane Irwin:
An extended addressing mode for low power.
ISLPED 1997: 208-213 |
| 61 | EE | Huzefa Mehta,
Robert Michael Owens,
Mary Jane Irwin,
Rita Yu Chen,
Debashree Ghosh:
Techniques for low energy software.
ISLPED 1997: 72-75 |
| 60 | EE | Huzefa Mehta,
Robert Michael Owens,
Mary Jane Irwin:
A Simulation Methodology for Software Energy Evaluation.
VLSI Design 1997: 509-510 |
| 59 | EE | Manjit Borah,
Robert Michael Owens,
Mary Jane Irwin:
A fast algorithm for minimizing the Elmore delay to identified critical sinks.
IEEE Trans. on CAD of Integrated Circuits and Systems 16(7): 753-759 (1997) |
| 58 | EE | Heung-Nam Kim,
Mary Jane Irwin,
Robert Michael Owens:
Motion Analysis on the Micro Grained Array Processor.
Real-Time Imaging 3(2): 101-110 (1997) |
| 1996 |
|---|
| 57 | EE | Kevin P. Acken,
Heung-Nam Kim,
Mary Jane Irwin,
Robert Michael Owens:
An Architectural Design For Parallel Fractal Compression.
ASAP 1996: 3-11 |
| 56 | EE | Kevin P. Acken,
Mary Jane Irwin,
Robert Michael Owens,
Amulya K. Garga:
Architectural Optimizations For A Floating Point Multiply-Accumulate Unit In A Graphics Pipeline.
ASAP 1996: 65-71 |
| 55 | EE | Huzefa Mehta,
Robert Michael Owens,
Mary Jane Irwin:
Energy Characterization based on Clustering.
DAC 1996: 702-707 |
| 54 | EE | Manjit Borah,
Robert Michael Owens,
Mary Jane Irwin:
Recent Developments in Performance Driven Steiner Routing: An Overview.
Great Lakes Symposium on VLSI 1996: 137-142 |
| 53 | EE | Huzefa Mehta,
Robert Michael Owens,
Mary Jane Irwin:
Some Issues in Gray Code Addressing.
Great Lakes Symposium on VLSI 1996: 178-181 |
| 52 | EE | Kevin P. Acken,
Mary Jane Irwin,
Robert Michael Owens:
Power comparisons for barrel shifters.
ISLPED 1996: 209-212 |
| 51 | EE | Chetana Nagendra,
Robert Michael Owens,
Mary Jane Irwin:
Design tradeoffs in high speed multipliers and FIR filters.
VLSI Design 1996: 29-32 |
| 50 | EE | Manjit Borah,
Robert Michael Owens,
Mary Jane Irwin:
Transistor sizing for low power CMOS circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 15(6): 665-671 (1996) |
| 49 | EE | Manjit Borah,
Chetana Nagendra,
Mohan Vishwanath,
Robert Michael Owens,
Mary Jane Irwin:
An optimal time multiplication free algorithm for edge detection on a mesh.
VLSI Signal Processing 13(1): 67-75 (1996) |
| 1995 |
|---|
| 48 | EE | Raminder Singh Bajwa,
Robert Michael Owens,
Mary Jane Irwin:
The MGAP's programming environment and the *C++ language.
ASAP 1995: 121-124 |
| 47 | EE | Heung-Nam Kim,
Mary Jane Irwin,
Robert Michael Owens:
Motion Estimation Algorithms on Fine Grain Array Processor.
ASAP 1995: 204-213 |
| 46 | EE | Huzefa Mehta,
Manjit Borah,
Robert Michael Owens,
Mary Jane Irwin:
Accurate Estimation of Combinational Circuit Activity.
DAC 1995: 618-622 |
| 45 | EE | Manjit Borah,
Robert Michael Owens,
Mary Jane Irwin:
Fast algorithm for performance-oriented Steiner routing.
Great Lakes Symposium on VLSI 1995: 198-203 |
| 44 | EE | Robert Michael Owens,
Raminder Singh Bajwa,
Mary Jane Irwin:
Reducing the number of counters needed for integer multiplication.
IEEE Symposium on Computer Arithmetic 1995: 38-41 |
| 43 | EE | Manjit Borah,
Robert Michael Owens,
Mary Jane Irwin:
High-throughput and low-power DSP using clocked-CMOS circuitry.
ISLPD 1995: 139-144 |
| 42 | EE | Chetana Nagendra,
Robert Michael Owens,
Mary Jane Irwin:
Unifying carry-sum and signed-digital number representations for low power.
ISLPD 1995: 15-20 |
| 41 | EE | Manjit Borah,
Robert Michael Owens,
Mary Jane Irwin:
Transistor sizing for minimizing power consumption of CMOS circuits under delay constraint.
ISLPD 1995: 167-172 |
| 40 | EE | Manjit Borah,
Mary Jane Irwin,
Robert Michael Owens:
Minimizing power consumption of static CMOS circuits by transistor sizing and input reordering.
VLSI Design 1995: 294-298 |
| 39 | EE | Chetana Nagendra,
Robert Michael Owens,
Mary Jane Irwin:
Digit pipelined arithmetic on fine-grain array processors.
VLSI Signal Processing 9(3): 193-209 (1995) |
| 1994 |
|---|
| 38 | | Manjit Borah,
Chetana Nagendra,
Robert Michael Owens,
Mary Jane Irwin:
The MGAP: A High Performance, User Programmable, Multifunctional Architecture for DS.
HICSS (1) 1994: 96-104 |
| 37 | | Heung-Nam Kim,
Mary Jane Irwin,
Robert Michael Owens,
Chen-Mi Wu:
Dynamic Space Warping Algorithms on Fine-Graln Array Processors.
IPPS 1994: 921-925 |
| 36 | | Raminder Singh Bajwa,
Robert Michael Owens,
Mary Jane Irwin:
Area Time Trade-Offs in Micro-Grain VLSI Array Architectures.
IEEE Trans. Computers 43(10): 1121-1128 (1994) |
| 35 | | Gueesang Lee,
Mary Jane Irwin,
Robert Michael Owens:
Polynomial Time Testability of Circuits Generated by Input Decomposition.
IEEE Trans. Computers 43(2): 201-210 (1994) |
| 34 | EE | Chetana Nagendra,
Robert Michael Owens,
Mary Jane Irwin:
Power-delay characteristics of CMOS adders.
IEEE Trans. VLSI Syst. 2(3): 377-381 (1994) |
| 33 | EE | TingTing Hwang,
Robert Michael Owens,
Mary Jane Irwin,
Kuo-Hua Wang:
Logic synthesis for field-programmable gate arrays.
IEEE Trans. on CAD of Integrated Circuits and Systems 13(10): 1280-1287 (1994) |
| 32 | EE | Manjit Borah,
Robert Michael Owens,
Mary Jane Irwin:
An edge-based heuristic for Steiner routing.
IEEE Trans. on CAD of Integrated Circuits and Systems 13(12): 1563-1568 (1994) |
| 1993 |
|---|
| 31 | | Earl E. Swartzlander Jr.,
Mary Jane Irwin,
Graham A. Jullien:
11th Symposium on Computer Arithmetic, 29 June - 2 July 1993, Windsor, Canada, Proceedings.
IEEE Computer Society/ 1993 |
| 30 | | Raminder Singh Bajwa,
Robert Michael Owens,
Mary Jane Irwin:
Image Processing with the MGAP: A Cost Effective Solution.
IPPS 1993: 439-443 |
| 29 | | Raminder Singh Bajwa,
Robert Michael Owens,
Mary Jane Irwin:
A Massively Parallel, Micro-Grained VLSI Architecture.
VLSI Design 1993: 250-255 |
| 28 | EE | Robert Michael Owens,
Thomas P. Kelliher,
Mary Jane Irwin,
Mohan Vishwanath,
Raminder Singh Bajwa,
W.-L. Yang:
The design and implementation of the Arithmetic Cube II, a VLSI signal processing system.
IEEE Trans. VLSI Syst. 1(4): 491-502 (1993) |
| 1992 |
|---|
| 27 | EE | Soohong Kim,
Robert Michael Owens,
Mary Jane Irwin:
Experiments with a Performance Driven Module Generator.
DAC 1992: 687-690 |
| 26 | | Thomas P. Kelliher,
Robert Michael Owens,
Mary Jane Irwin,
TingTing Hwang:
ELM-A Fast Addition Algorithm Discovered by a Program.
IEEE Trans. Computers 41(9): 1181-1184 (1992) |
| 25 | EE | TingTing Hwang,
Robert Michael Owens,
Mary Jane Irwin:
Efficiently computing communication complexity for multilevel logic synthesis.
IEEE Trans. on CAD of Integrated Circuits and Systems 11(5): 545-554 (1992) |
| 1991 |
|---|
| 24 | | Mary Jane Irwin,
Robert Michael Owens:
A Two-Dimensional, Distributed Logic Architecture.
IEEE Trans. Computers 40(10): 1094-1101 (1991) |
| 23 | | Poras T. Balsara,
Robert Michael Owens,
Mary Jane Irwin:
Digit Serial Multipliers.
J. Parallel Distrib. Comput. 11(2): 156-162 (1991) |
| 22 | EE | Poras T. Balsara,
Mary Jane Irwin:
Image processing on a memory array architecture.
VLSI Signal Processing 2(4): 313-324 (1991) |
| 1990 |
|---|
| 21 | | Robert Michael Owens,
Mary Jane Irwin:
Being Stingy with Multipliers.
IEEE Trans. Computers 39(6): 809-818 (1990) |
| 20 | EE | TingTing Hwang,
Robert Michael Owens,
Mary Jane Irwin:
Exploiting communication complexity for multilevel logic synthesis.
IEEE Trans. on CAD of Integrated Circuits and Systems 9(10): 1017-1027 (1990) |
| 19 | EE | Mary Jane Irwin,
Robert Michael Owens:
A case for digit serial VLSI signal processors.
VLSI Signal Processing 1(4): 321-334 (1990) |
| 1989 |
|---|
| 18 | EE | TingTing Hwang,
Robert Michael Owens,
Mary Jane Irwin:
Multi-Level Logic Synthesis Using Communication Complexity.
DAC 1989: 215-220 |
| 17 | EE | Mary Jane Irwin,
Robert Michael Owens:
A Comparison of Four Two-dimensional Gate Matrix Layout Tools.
DAC 1989: 698-701 |
| 16 | | Tsang-Ling Sheu,
Woei Lin,
Chita R. Das,
Mary Jane Irwin:
Distributed Fault Diagnosis in the Butterfly Parallel Processor.
ICPP (1) 1989: 172-175 |
| 1988 |
|---|
| 15 | EE | Pao-Po Hou,
Robert Michael Owens,
Mary Jane Irwin:
DECOMPOSER: A Synthesizer for Systolic Systems.
DAC 1988: 650-653 |
| 14 | | Mary Jane Irwin:
Special Issue on Parallelism in Computer Arithmetic.
J. Parallel Distrib. Comput. 5(3): 205-208 (1988) |
| 1987 |
|---|
| 13 | EE | J. A. Beekman,
Robert Michael Owens,
Mary Jane Irwin:
Mesh Arrays and LOGICIAN: A Tool for Their Efficient Generation.
DAC 1987: 357-362 |
| 12 | EE | Robert Michael Owens,
Mary Jane Irwin:
An Overview of the Penn State Design System.
DAC 1987: 516-522 |
| 11 | | Mary Jane Irwin,
Robert Michael Owens:
Digit-Pipelined Arithmetic as Illustrated By the Paste-Up System: A Tutorial.
IEEE Computer 20(4): 61-73 (1987) |
| 10 | | Robert Michael Owens,
Mary Jane Irwin:
The Arithmetic Cube.
IEEE Trans. Computers 36(11): 1342-1348 (1987) |
| 9 | EE | Douglas S. Reeves,
Mary Jane Irwin:
Fast Methods for Switch-Level Verification of MOS Circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 6(5): 766-779 (1987) |
| 1986 |
|---|
| 8 | EE | Robert Michael Owens,
Mary Jane Irwin:
A System for Designing, Simulating, and Testing High Performance VLSI Signal Processors.
IEEE Trans. on CAD of Integrated Circuits and Systems 5(3): 420-428 (1986) |
| 7 | | Tin-Fook Ngai,
Mary Jane Irwin,
Shishpal Rawat:
Regular Area-Time Efficient Carry-Lookahead Adders.
J. Parallel Distrib. Comput. 3(1): 92-105 (1986) |
| 1983 |
|---|
| 6 | | Mary Jane Irwin,
Robert Michael Owens:
Fully Digit On-Line Networks.
IEEE Trans. Computers 32(4): 402-406 (1983) |
| 1982 |
|---|
| 5 | | Bryan Gerard Mackay,
Mary Jane Irwin:
A digit online arithmetic simulator.
ICPP 1982: 304-306 |
| 1980 |
|---|
| 4 | | Mary Jane Irwin,
Don Heller:
Online Pipeline Systems for Recursive Numeric Computations.
ISCA 1980: 292-299 |
| 1979 |
|---|
| 3 | | Robert Michael Owens,
Mary Jane Irwin:
On-Line Algorithms for the Design of Pipeline Architectures.
ISCA 1979: 12-19 |
| 1978 |
|---|
| 2 | EE | Mary Jane Irwin:
Reconfigurable Pipeline Systems.
ACM Annual Conference (1) 1978: 86-92 |
| 1 | | Mary Jane Irwin:
A Pipelined Processing Unit for On-Line Division.
ISCA 1978: 24-30 |
