dblp.uni-trier.dewww.uni-trier.de

Armin Tajalli

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeer - CSB - Google - MSN - Yahoo

2008
19EEArmin Tajalli, Frank K. Gürkaynak, Yusuf Leblebici, Massimo Alioto, Elizabeth J. Brauer: Improving the power-delay product in SCL circuits using source follower output stage. ISCAS 2008: 145-148
18EEArmin Tajalli, Massimo Alioto, Elizabeth J. Brauer, Yusuf Leblebici: Improving the Power-Delay Performance in Subthreshold Source-Coupled Logic Circuits. PATMOS 2008: 21-30
2007
17EERamin Zanbaghi, Seyed Mojtaba Atarodi, Armin Tajalli: A Power Optimized Base-Band Circuitry for the Low-IF Receivers. ISCAS 2007: 1693-1696
16EEPaul Muller, Armin Tajalli, Seyed Mojtaba Atarodi, Yusuf Leblebici: Top-Down Design of a Low-Power Multi-Channel 2.5-Gbit/s/Channel Gated Oscillator Clock-Recovery Circuit CoRR abs/0710.4727: (2007)
2006
15EEM. Saffari, Seyed Mojtaba Atarodi, Armin Tajalli: A 1/4 rate linear phase detector for PLL-based CDR circuits. ISCAS 2006
14EEH. Adrang, Reza Lotfi, K. Mafinejhad, Armin Tajalli, Saeid Mehrmanesh: A low-power CMOS Gm-C filter for wireless receiver applications with on-chip automatic tuning system. ISCAS 2006
13EESaeed Saeedi, Saeid Mehrmanesh, Armin Tajalli, Seyed Mojtaba Atarodi: A technique to suppress tail current flicker noise in CMOS LC VCOs. ISCAS 2006
12EEArmin Tajalli, Paul Muller, Seyed Mojtaba Atarodi, Yusuf Leblebici: Analysis and modeling of jitter and frequency tolerance in gated oscillator based CDRs. ISCAS 2006
2005
11EEPooya Torkzadeh, Armin Tajalli, Seyed Mojtaba Atarodi: A fractional delay-locked loop for on chip clock generation applications. ASP-DAC 2005: 1300-1309
10EEPaul Muller, Armin Tajalli, Seyed Mojtaba Atarodi, Yusuf Leblebici: Top-Down Design of a Low-Power Multi-Channel 2.5-Gbit/s/Channel Gated Oscillator Clock-Recovery Circuit. DATE 2005: 258-263
9EEPooya Torkzadeh, Armin Tajalli, Seyed Mojtaba Atarodi: Analysis of jitter peaking and jitter accumulation in re-circulating delay-locked loops. ISCAS (3) 2005: 2255-2258
8EEPooya Torkzadeh, Armin Tajalli, Seyed Mojtaba Atarodi: A wide tuning range, 1 GHz-2.5 GHz DLL-based fractional frequency synthesizer. ISCAS (5) 2005: 5031-5034
7EEArmin Tajalli, Paul Muller, Seyed Mojtaba Atarodi, Yusuf Leblebici: A low-power, multichannel gated oscillator-based CDR for short-haul applications. ISLPED 2005: 107-110
2004
6EEArmin Tajalli, Seyed Mojtaba Atarodi, Abbas Khodaverdi, Farzad Sahandi Esfanjani: Design and optimization of a high PSRR CMOS bandgap voltage reference. ISCAS (1) 2004: 45-48
5EEArmin Tajalli, Saeid Mehrmanesh, Seyed Mojtaba Atarodi: A duty cycle control circuit for high speed applications. ISCAS (1) 2004: 781-784
2003
4EEArmin Tajalli, Seyed Mojtaba Atarodi: A compact biquadratic g/sub m/-C filter structure for low-voltage and high frequency applications. ISCAS (1) 2003: 501-504
3EEArmin Tajalli, Seyed Mojtaba Atarodi: Design considerations for a 1.5-V, 10.7-MHz bandpass gm-C filter in a 0.6µm standard CMOS technology. ISCAS (1) 2003: 521-524
2EEArmin Tajalli, Seyed Mojtaba Atarodi: Structured design of an integrated subscriber line interface system and circuit. ISCAS (2) 2003: 284-287
2002
1EEMohammad B. Vahidfar, Armin Tajalli, Seyed Mojtaba Atarodi: A low-power subscriber line interface circuit in a high-voltage CMOS technology. ISCAS (5) 2002: 409-412

Coauthor Index

1H. Adrang [14]
2Massimo Alioto [18] [19]
3Seyed Mojtaba Atarodi [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [15] [16] [17]
4Elizabeth J. Brauer [18] [19]
5Farzad Sahandi Esfanjani [6]
6Frank K. Gürkaynak [19]
7Abbas Khodaverdi [6]
8Yusuf Leblebici [7] [10] [12] [16] [18] [19]
9Reza Lotfi [14]
10K. Mafinejhad [14]
11Saeid Mehrmanesh [5] [13] [14]
12Paul Muller [7] [10] [12] [16]
13Saeed Saeedi [13]
14M. Saffari [15]
15Pooya Torkzadeh [8] [9] [11]
16Mohammad B. Vahidfar [1]
17Ramin Zanbaghi [17]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)