2008 |
44 | EE | Reinaldo A. Bergamaschi,
Guoling Han,
Alper Buyuktosunoglu,
Hiren D. Patel,
Indira Nair,
Gero Dittmann,
Geert Janssen,
Nagu R. Dhanwada,
Zhigang Hu,
Pradip Bose,
John A. Darringer:
Exploring power management in multi-core systems.
ASP-DAC 2008: 708-713 |
43 | EE | Ricardo P. Jacobi,
Reinaldo A. Bergamaschi:
Challenges of the nanoscale era.
SBCCI 2008: 9 |
2007 |
42 | EE | Reinaldo A. Bergamaschi,
Indira Nair,
Gero Dittmann,
Hiren D. Patel,
Geert Janssen,
Nagu R. Dhanwada,
Alper Buyuktosunoglu,
Emrah Acar,
Gi-Joon Nam,
Dorothy Kucar,
Pradip Bose,
John A. Darringer,
Guoling Han:
Performance modeling for early analysis of multi-core systems.
CODES+ISSS 2007: 209-214 |
41 | EE | Reinaldo A. Bergamaschi:
Embedded Systems Week.
IEEE Design & Test of Computers 24(1): 102-103 (2007) |
40 | EE | Hiren D. Patel,
Sandeep K. Shukla,
Reinaldo A. Bergamaschi:
Heterogeneous Behavioral Hierarchy Extensions for SystemC.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(4): 765-780 (2007) |
2006 |
39 | | Reinaldo A. Bergamaschi,
Kiyoung Choi:
Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2006, Seoul, Korea, October 22-25, 2006
ACM 2006 |
38 | EE | Hiren D. Patel,
Sandeep K. Shukla,
Reinaldo A. Bergamaschi:
Heterogeneous behavioral hierarchy for system level designs.
DATE 2006: 565-570 |
2005 |
37 | | Petru Eles,
Axel Jantsch,
Reinaldo A. Bergamaschi:
Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2005, Jersey City, NJ, USA, September 19-21, 2005
ACM 2005 |
36 | | Wolfgang Rosenstiel,
Reinaldo A. Bergamaschi,
Frank Ghenassia,
Thorsten Groetker,
Masamichi Kawarabayashi,
Marinus C. van Lier,
Albrecht Mayer,
Mike Meredith,
Mark Milligan,
Stuart Swan:
Is there a Market for SystemC Tools?
DATE 2005: 950 |
35 | EE | Martin Ohmacht,
Reinaldo A. Bergamaschi,
Subhrajit Bhattacharya,
Alan Gara,
Mark Giampapa,
Balaji Gopalsamy,
Ruud A. Haring,
Dirk Hoenicke,
David J. Krolak,
James A. Marcella,
Ben J. Nathanson,
Valentina Salapura,
Michael E. Wazlowski:
Blue Gene/L compute chip: Memory and Ethernet subsystem.
IBM Journal of Research and Development 49(2-3): 255-264 (2005) |
2004 |
34 | EE | Francine Bacchini,
Pierre G. Paulin,
Reinaldo A. Bergamaschi,
Raj Pawate,
Arie Bernstein,
Ramesh Chandra,
Mohamed Ben-Romdhane:
System level design: six success stories in search of an industry.
DAC 2004: 349-350 |
33 | EE | Reinaldo A. Bergamaschi:
Early and accurate analysis of SoCs: oxymoron or real?
SLIP 2004: 3-6 |
2003 |
32 | EE | Reinaldo A. Bergamaschi,
Youngsoo Shin,
Nagu R. Dhanwada,
Subhrajit Bhattacharya,
William E. Dougherty,
Indira Nair,
John A. Darringer,
Sarala Paliwal:
SEAS: a system for early analysis of SoCs.
CODES+ISSS 2003: 150-155 |
31 | EE | Reinaldo A. Bergamaschi,
Grant Martin,
Wayne Wolf,
Rolf Ernst,
Kees A. Vissers,
Jack Kouloheris:
The future of system-level design: can we find the right solutions to the right problems at the right time?
CODES+ISSS 2003: 231 |
30 | EE | Reinaldo A. Bergamaschi,
Grant Martin:
System-level design tools: who needs them, who has them, and how much should they cost?
CODES+ISSS 2003: 79-80 |
29 | EE | Reinaldo A. Bergamaschi,
Yunjian Jiang:
State-based power analysis for systems-on-chip.
DAC 2003: 638-641 |
28 | EE | Shaojie Wang,
Sharad Malik,
Reinaldo A. Bergamaschi:
Modeling and Integration of Peripheral Devices in Embedded Systems.
DATE 2003: 10136-10141 |
27 | EE | C. Ross Ogilvie,
Richard Ray,
Robert Devins,
Mark Kautzman,
Michael Hale,
Reinaldo A. Bergamaschi,
Bob Lynch,
Santosh Gaur:
Simplifying SoC design with the Customizable Control Processor Platform.
ICCD 2003: 402-403 |
2002 |
26 | EE | Reinaldo A. Bergamaschi,
John M. Cohn:
The A to Z of SoCs.
ICCAD 2002: 790-798 |
25 | EE | John A. Darringer,
Reinaldo A. Bergamaschi,
Subhrajit Bhattacharya,
Daniel Brand,
Andreas Herkersdorf,
Joseph K. Morrell,
Indira Nair,
Patricia Sagmeister,
Youngsoo Shin:
Early analysis tools for system-on-a-chip design.
IBM Journal of Research and Development 46(6): 691-708 (2002) |
24 | EE | Reinaldo A. Bergamaschi:
Bridging the domains of high-level and logic synthesis.
IEEE Trans. on CAD of Integrated Circuits and Systems 21(5): 582-596 (2002) |
2001 |
23 | EE | Reinaldo A. Bergamaschi,
Subhrajit Bhattacharya,
Ronoldo Wagner,
Colleen Fellenz,
Michael Muhlada,
William R. Lee,
Foster White,
Jean-Marc Daveau:
Automating the Design of SOCs Using Cores.
IEEE Design & Test of Computers 18(5): 32-45 (2001) |
2000 |
22 | EE | Reinaldo A. Bergamaschi,
William R. Lee:
Designing systems-on-chip using cores.
DAC 2000: 420-425 |
1999 |
21 | EE | Reinaldo A. Bergamaschi:
Behavioral Network Graph: Unifying the Domains of High-Level and Logic Synthesis.
DAC 1999: 213-218 |
20 | EE | Reinaldo A. Bergamaschi,
Brian M. Barry,
John Duimovich:
Embedded Java: techniques and applications (tutorial abstract).
ICCAD 1999: 613 |
19 | EE | Pradip K. Jha,
Steven Barnfield,
John B. Weaver,
Rudra Mukherjee,
Reinaldo A. Bergamaschi:
Synthesis of Arrays and Records.
ICCD 1999: 614-619 |
18 | EE | Daniel Gajski,
Reinaldo A. Bergamaschi:
Panel Statement.
ISSS 1999: 8-9 |
1998 |
17 | EE | Daniel Brand,
Reinaldo A. Bergamaschi,
Leon Stok:
Don't cares in synthesis: theoretical pitfalls and practical solutions.
IEEE Trans. on CAD of Integrated Circuits and Systems 17(4): 285-304 (1998) |
1997 |
16 | EE | Salil Raje,
Reinaldo A. Bergamaschi:
Generalized resource sharing.
ICCAD 1997: 326-332 |
15 | EE | Reinaldo A. Bergamaschi,
Salil Raje:
Observable Time Windows: Verifying High-Level Synthesis Results.
IEEE Design & Test of Computers 14(2): 40-50 (1997) |
14 | EE | Reinaldo A. Bergamaschi,
Salil Raje,
Indira Nair,
Louise Trevillyan:
Control-flow versus data-flow-based scheduling: combining both approaches in an adaptive scheduling system.
IEEE Trans. VLSI Syst. 5(1): 82-100 (1997) |
1995 |
13 | EE | Reinaldo A. Bergamaschi:
Productivity Issues in High-Level Design: Are Tools Solving the Real Problems?
DAC 1995: 674-677 |
12 | EE | Reinaldo A. Bergamaschi,
Daniel Brand,
Leon Stok,
Michel R. C. M. Berkelaar,
S. Prakash:
Efficient use of large don't cares in high-level and logic synthesis.
ICCAD 1995: 272-278 |
11 | EE | Daniel Brand,
Reinaldo A. Bergamaschi,
Leon Stok:
Be careful with don't cares.
ICCAD 1995: 83-86 |
10 | | Reinaldo A. Bergamaschi,
Richard A. O'Connor,
Leon Stok,
Michael Z. Moricz,
Shiv Prakash,
Andreas Kuehlmann,
D. Sreenivasa Rao:
High-level synthesis in an industrial environment.
IBM Journal of Research and Development 39(1-2): 131-148 (1995) |
1993 |
9 | EE | Reinaldo A. Bergamaschi,
Andreas Kuehlmann:
A system for production use of high-level synthesis.
IEEE Trans. VLSI Syst. 1(3): 233-243 (1993) |
1992 |
8 | EE | Reinaldo A. Bergamaschi,
Donald Lobo,
Andreas Kuehlmann:
Control Optimization in High-Level Synthesis Using Behavioral Don't Cares.
DAC 1992: 657-661 |
7 | EE | Andreas Kuehlmann,
Reinaldo A. Bergamaschi:
Timing analysis in high-level synthesis.
ICCAD 1992: 349-354 |
6 | | Andreas Kuehlmann,
Reinaldo A. Bergamaschi:
High-Level State Machine Specification and Synthesis.
ICCD 1992: 536-539 |
1991 |
5 | EE | Reinaldo A. Bergamaschi,
Raul Camposano,
Michael Payer:
Data-Path Synthesis Using Path Analysis.
DAC 1991: 591-596 |
4 | | Reinaldo A. Bergamaschi:
The Effects of False Paths in High-Level Synthesis.
ICCAD 1991: 80-83 |
3 | EE | Reinaldo A. Bergamaschi:
SKOL: a system for logic synthesis and technology mapping.
IEEE Trans. on CAD of Integrated Circuits and Systems 10(11): 1342-1355 (1991) |
1990 |
2 | EE | Raul Compasano,
Reinaldo A. Bergamaschi:
Synthesis Using Path-Based scheduling: algorithms and Exercises.
DAC 1990: 450-455 |
1 | EE | Raul Camposano,
Reinaldo A. Bergamaschi:
Redesign using state splitting.
EURO-DAC 1990: 157-161 |