| 2007 |
|---|
| 11 | EE | Changbo Long,
Lucanus J. Simonson,
Weiping Liao,
Lei He:
Microarchitecture Configurations and Floorplanning Co-Optimization.
IEEE Trans. VLSI Syst. 15(7): 830-841 (2007) |
| 2005 |
|---|
| 10 | EE | Jennifer L. Wong,
Weiping Liao,
Fei Li,
Lei He,
Miodrag Potkonjak:
Scheduling of Soft Real-Time Systems for Context-Aware Applications.
DATE 2005: 318-323 |
| 9 | EE | Weiping Liao,
Joseph M. Basile,
Lei He:
Microarchitecture-level leakage reduction with data retention.
IEEE Trans. VLSI Syst. 13(11): 1324-1328 (2005) |
| 8 | EE | Weiping Liao,
Lei He,
Kevin M. Lepak:
Temperature and supply Voltage aware performance and power modeling at microarchitecture level.
IEEE Trans. on CAD of Integrated Circuits and Systems 24(7): 1042-1053 (2005) |
| 7 | EE | Weiping Liao,
Lei He:
Microarchitecture Level Interconnect Modeling Considering Layout Optimization.
J. Low Power Electronics 1(3): 297-308 (2005) |
| 2004 |
|---|
| 6 | EE | Lei He,
Weiping Liao,
Mircea R. Stan:
System level leakage reduction considering the interdependence of temperature and leakage.
DAC 2004: 12-17 |
| 5 | EE | Changbo Long,
Lucanus J. Simonson,
Weiping Liao,
Lei He:
Floorplanning optimization with trajectory piecewise-linear model for pipelined interconnects.
DAC 2004: 640-645 |
| 2003 |
|---|
| 4 | EE | Weiping Liao,
Lei He:
Full-Chip Interconnect Power Estimation and Simulation Considering Concurrent Repeater and Flip-Flop Insertion.
ICCAD 2003: 574-580 |
| 3 | EE | Weiping Liao,
Fei Li,
Lei He:
Microarchitecture level power and thermal simulation considering temperature dependent leakage model.
ISLPED 2003: 211-216 |
| 2 | EE | Weiping Liao,
Lei He:
Coupled Power and Thermal Simulation with Active Cooling.
PACS 2003: 148-163 |
| 2002 |
|---|
| 1 | EE | Weiping Liao,
Joseph M. Basile,
Lei He:
Leakage power modeling and reduction with data retention.
ICCAD 2002: 714-719 |
