2008 |
6 | EE | Ilya Issenin,
Erik Brockmeyer,
Bart Durinck,
Nikil D. Dutt:
Data-Reuse-Driven Energy-Aware Cosynthesis of Scratch Pad Memory and Hierarchical Bus-Based Communication Architecture for Multiprocessor Streaming Applications.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(8): 1439-1452 (2008) |
2007 |
5 | EE | Minas Dasygenis,
Erik Brockmeyer,
Bart Durinck,
Francky Catthoor,
Dimitrios Soudris,
Antonios Thanailakis:
A Memory Hierarchical Layer Assigning and Prefetching Technique to Overcome the Memory Performance/Energy Bottleneck
CoRR abs/0710.4656: (2007) |
2006 |
4 | EE | Ilya Issenin,
Erik Brockmeyer,
Bart Durinck,
Nikil Dutt:
Multiprocessor system-on-chip data reuse analysis for exploring customized memory hierarchies.
DAC 2006: 49-52 |
3 | EE | Minas Dasygenis,
Erik Brockmeyer,
Bart Durinck,
Francky Catthoor,
Dimitrios Soudris,
Adonios Thanailakis:
A combined DMA and application-specific prefetching approach for tackling the memory latency bottleneck.
IEEE Trans. VLSI Syst. 14(3): 279-291 (2006) |
2005 |
2 | EE | Minas Dasygenis,
Erik Brockmeyer,
Bart Durinck,
Francky Catthoor,
Dimitrios Soudris,
Antonios Thanailakis:
A Memory Hierarchical Layer Assigning and Prefetching Technique to Overcome the Memory Performance/Energy Bottleneck.
DATE 2005: 946-947 |
2004 |
1 | EE | Minas Dasygenis,
Erik Brockmeyer,
Bart Durinck,
Francky Catthoor,
Dimitrios Soudris,
Antonios Thanailakis:
Power, Performance and Area Exploration for Data Memory Assignment of Multimedia Applications.
SAMOS 2004: 540-549 |