2009 |
63 | EE | Melina Demertzi,
Pedro C. Diniz,
Mary W. Hall,
Anna C. Gilbert,
Yi Wang:
Computation reuse in domain-specific optimization of signal recognition.
FPGA 2009: 281 |
62 | EE | André C. Santos,
Luís Tarrataca,
João M. P. Cardoso,
Diogo R. Ferreira,
Pedro C. Diniz,
Paulo Chainho:
Context Inference for Mobile Applications in the UPCASE Project.
MOBILWARE 2009: 352-365 |
61 | EE | Pedro C. Diniz:
Guest Editorial.
Concurrency and Computation: Practice and Experience 21(1): 1-3 (2009) |
2008 |
60 | | Roger F. Woods,
Katherine Compton,
Christos-Savvas Bouganis,
Pedro C. Diniz:
Reconfigurable Computing: Architectures, Tools and Applications, 4th International Workshop, ARC 2008, London, UK, March 26-28, 2008. Proceedings
Springer 2008 |
59 | EE | Pedro C. Diniz,
Diogo R. Ferreira:
Automatic Extraction of Process Control Flow from I/O Operations.
BPM 2008: 342-357 |
58 | EE | Melina Demertzi,
Pedro C. Diniz,
Mary W. Hall,
Anna C. Gilbert,
Yi Wang:
The potential of computation reuse in high-level optimization of a signal recognition system.
IPDPS 2008: 1-5 |
57 | EE | Nastaran Baradaran,
Pedro C. Diniz:
A compiler approach to managing storage and memory bandwidth in configurable architectures.
ACM Trans. Design Autom. Electr. Syst. 13(4): (2008) |
2007 |
56 | | Pedro C. Diniz,
Eduardo Marques,
Koen Bertels,
Marcio Merino Fernandes,
João M. P. Cardoso:
Reconfigurable Computing: Architectures, Tools and Applications, Third International Workshop, ARC 2007, Mangaratiba, Brazil, March 27-29, 2007.
Springer 2007 |
55 | EE | Joonseok Park,
Pedro C. Diniz:
Partial Data Reuse for Windowing Computations: Performance Modeling for FPGA Implementations.
ARC 2007: 97-109 |
54 | EE | Rui Rodrigues,
João M. P. Cardoso,
Pedro C. Diniz:
A Data-Driven Approach for Pipelining Sequences of Data-Dependent Loops.
FCCM 2007: 219-228 |
53 | EE | Melina Demertzi,
Pedro C. Diniz,
Mary W. Hall,
Anna C. Gilbert,
Yi Wang:
A Combined Hardware/Software Optimization Framework for Signal Representation and Recognition.
International Conference on Computational Science (1) 2007: 1230-1237 |
52 | EE | Nastaran Baradaran,
Pedro C. Diniz:
A Register Allocation Algorithm in the Presence of Scalar Replacement for Fine-Grain Configurable Architectures
CoRR abs/0710.4702: (2007) |
2006 |
51 | EE | Pedro C. Diniz,
Gokul Govindu:
Design of a Field-Programmable Dual-Precision Floating-Point Arithmetic Unit.
FPL 2006: 1-4 |
50 | EE | Nastaran Baradaran,
Pedro C. Diniz:
Memory Parallelism Using Custom Array Mapping to Heterogeneous Storage Structures.
FPL 2006: 1-6 |
49 | EE | Jacqueline Chame,
Chun Chen,
Pedro C. Diniz,
Mary W. Hall,
Yoon-Ju Lee,
Robert F. Lucas:
An overview of the ECO project.
IPDPS 2006 |
2005 |
48 | EE | Nastaran Baradaran,
Pedro C. Diniz:
A Register Allocation Algorithm in the Presence of Scalar Replacement for Fine-Grain Configurable Architectures.
DATE 2005: 6-11 |
47 | EE | Pedro C. Diniz:
Evaluation of Code Generation Strategies for Scalar Replaced Codes in Fine-Grain Configurable Architectures.
FCCM 2005: 73-82 |
46 | | Nastaran Baradaran,
Pedro C. Diniz:
Compiler-Directed Design Space Exploration for Caching and Prefetching Data in High-Level Synthesis.
FPT 2005: 233-240 |
45 | EE | Heidi E. Ziegler,
Priyadarshini L. Malusare,
Pedro C. Diniz:
Array Replication to Increase Parallelism in Applications Mapped to Configurable Architectures.
LCPC 2005: 62-75 |
44 | EE | Yoon-Ju Lee,
Pedro C. Diniz,
Mary W. Hall,
Robert F. Lucas:
Empirical Optimization for a Sparse Linear Solver: A Case Study.
International Journal of Parallel Programming 33(2-3): 165-181 (2005) |
43 | EE | Pedro C. Diniz,
Mary W. Hall,
Joonseok Park,
Byoungro So,
Heidi E. Ziegler:
Automatic mapping of C to FPGAs with the DEFACTO compilation and synthesis system.
Microprocessors and Microsystems 29(2-3): 51-62 (2005) |
2004 |
42 | EE | Nastaran Baradaran,
Joonseok Park,
Pedro C. Diniz:
Data Reuse in Configurable Architectures with RAM Blocks: Extended Abstract.
FPL 2004: 1113-1115 |
41 | EE | Pedro C. Diniz,
Yoon-Ju Lee,
Mary W. Hall,
Robert F. Lucas:
A Case Study Using Empirical Optimization for a Large, Engineering Application.
IPDPS Next Generation Software Program - NSFNGS - PI Workshop 2004 |
40 | EE | Nastaran Baradaran,
Pedro C. Diniz,
Joonseok Park:
Extending the Applicability of Scalar Replacement to Multiple Induction Variables.
LCPC 2004: 455-469 |
39 | EE | Pedro C. Diniz:
Design Space Exploration for Configurable Architectures and the Role of Modeling, High-Level Program Analysis and Learning Techniques.
SAMOS 2004: 213-223 |
38 | EE | João M. P. Cardoso,
Pedro C. Diniz:
Modeling Loop Unrolling: Approaches and Open Issues.
SAMOS 2004: 224-233 |
37 | EE | Joonseok Park,
Pedro C. Diniz,
K. R. Shesha Shayee:
Performance and Area Modeling of Complete FPGA Designs in the Presence of Loop Transformations.
IEEE Trans. Computers 53(11): 1420-1435 (2004) |
2003 |
36 | EE | Byoungro So,
Pedro C. Diniz,
Mary W. Hall:
Using estimates from behavioral synthesis tools in compiler-directed design space exploration.
DAC 2003: 514-519 |
35 | EE | Heidi E. Ziegler,
Mary W. Hall,
Pedro C. Diniz:
Compiler-generated communication for pipelined FPGA applications.
DAC 2003: 610-615 |
34 | EE | Pedro C. Diniz,
Joonseok Park:
Data Search and Reorganization Using FPGAs: Application to Spatial Pointer-based Data Structures.
FCCM 2003: 207-217 |
33 | EE | K. R. Shesha Shayee,
Joonseok Park,
Pedro C. Diniz:
Performance and Area Modeling of Complete FPGA Designs in the presence of Loop Transformations.
FCCM 2003: 296 |
32 | EE | Joonseok Park,
Pedro C. Diniz:
Synthesis and Estimation of Memory Interfaces for FPGA-based Reconfigurable Computing Engines.
FCCM 2003: 297-299 |
31 | EE | Pedro C. Diniz,
Joonseok Park:
Using FPGAs for data and reorganization engines: preliminary results for spatial pointer-based data structures.
FPGA 2003: 242 |
30 | EE | K. R. Shesha Shayee,
Joonseok Park,
Pedro C. Diniz:
Performance and Area Modeling of Cmplete FPGA Designs in the Presence of Loop Transformations.
FPL 2003: 313-323 |
29 | EE | Nastaran Baradaran,
Jacqueline Chame,
Chun Chen,
Pedro C. Diniz,
Mary W. Hall,
Yoon-Ju Lee,
Bing Liu,
Robert F. Lucas:
ECO: An Empirical-Based Compilation and Optimization System.
IPDPS 2003: 206 |
28 | EE | Pedro C. Diniz:
A Compiler Approach to Performance Prediction Using Empirical-Based Modeling.
International Conference on Computational Science 2003: 916-925 |
27 | EE | Pedro C. Diniz:
Increasing the Accuracy of Shape and Safety Analysis of Pointer-Based Codes.
LCPC 2003: 481-494 |
26 | EE | Martin C. Rinard,
Pedro C. Diniz:
Eliminating synchronization bottlenecks using adaptive replication.
ACM Trans. Program. Lang. Syst. 25(3): 316-359 (2003) |
2002 |
25 | EE | Heidi E. Ziegler,
Byoungro So,
Mary W. Hall,
Pedro C. Diniz:
Coarse-Grain Pipelining on Multiple FPGA Architectures.
FCCM 2002: 77- |
24 | EE | Pedro C. Diniz,
Joonseok Park:
Data reorganization engines for the next generation of system-on-a-chip FPGAs.
FPGA 2002: 237-244 |
23 | EE | Pedro C. Diniz,
Bing Liu:
Selector: A Language Construct for Developing Dynamic Applications.
LCPC 2002: 218-232 |
22 | EE | Byoungro So,
Mary W. Hall,
Pedro C. Diniz:
A Compiler Approach to Fast Hardware Design Space Exploration in FPGA-based Systems.
PLDI 2002: 165-176 |
2001 |
21 | EE | Pablo Moisset,
Pedro C. Diniz,
Joonseok Park:
Matching and searching analysis for parallel hardware implementation on FPGAs.
FPGA 2001: 125-133 |
20 | | Joonseok Park,
Pedro C. Diniz:
Synthesis of pipelined memory access controllers for streamed data applications on FPGA-based computing engines.
ISSS 2001: 221-226 |
19 | EE | Pedro C. Diniz,
Mary W. Hall,
Joonseok Park,
Byoungro So,
Heidi E. Ziegler:
Bridging the Gap between Compilation and Synthesis in the DEFACTO System.
LCPC 2001: 52-70 |
2000 |
18 | EE | Pedro C. Diniz,
Joonseok Park:
Automatic Synthesis of Data Storage and Control Structures for FPGA-Based Computing Engines.
FCCM 2000: 91-100 |
1999 |
17 | | Kiran Bondalapati,
Pedro C. Diniz,
Phillip Duncan,
John J. Granacki,
Mary W. Hall,
Rajeev Jain,
Heidi E. Ziegler:
DEFACTO: A Design Environment for Adaptive Computing Technology.
IPPS/SPDP Workshops 1999: 570-578 |
16 | EE | Martin C. Rinard,
Pedro C. Diniz:
Eliminating synchronization bottlenecks in object-based programs using adaptive replication.
International Conference on Supercomputing 1999: 83-92 |
15 | EE | Pedro C. Diniz,
Martin C. Rinard:
Eliminating Synchronization Overhead in Automatically Parallelized Programs Using Dynamic Feedback.
ACM Trans. Comput. Syst. 17(2): 89-132 (1999) |
14 | | Pedro C. Diniz,
Martin C. Rinard:
Synchronization transformations for parallel computing.
Concurrency - Practice and Experience 11(13): 773-802 (1999) |
1998 |
13 | | Pedro C. Diniz,
Martin C. Rinard:
Lock Coarsening: Eliminating Lock Overhead in Automatically Parallelized Object-Based Programs.
J. Parallel Distrib. Comput. 49(2): 218-244 (1998) |
1997 |
12 | | Pedro C. Diniz,
Martin C. Rinard:
Dynamic Feedback: An Effective Technique for Adaptive Computing.
PLDI 1997: 71-84 |
11 | EE | Pedro C. Diniz,
Martin C. Rinard:
Synchronization Transformations for Parallel Computing.
POPL 1997: 187-200 |
10 | EE | Martin C. Rinard,
Pedro C. Diniz:
Commutativity Analysis: A New Analysis Technique for Parallelizing Compilers.
ACM Trans. Program. Lang. Syst. 19(6): 942-991 (1997) |
9 | | Oscar H. Ibarra,
Pedro C. Diniz,
Martin C. Rinard:
On the Complexity of Commutativity Analysis.
Int. J. Found. Comput. Sci. 8(1): 81- (1997) |
1996 |
8 | | Oscar H. Ibarra,
Pedro C. Diniz,
Martin C. Rinard:
On the Complexity of Commutativity Analysis.
COCOON 1996: 323-332 |
7 | | Martin C. Rinard,
Pedro C. Diniz:
Semantic Foundations of Commutativity Analysis.
Euro-Par, Vol. I 1996: 414-423 |
6 | EE | Martin C. Rinard,
Pedro C. Diniz:
Commutativity Analysis: A Technique for Automatically Parallelizing Pointer-Based Computations.
IPPS 1996: 14-22 |
5 | | Pedro C. Diniz,
Martin C. Rinard:
Lock Coarsening: Eliminating Lock Overhead in Automatically Parallelized Object-Based Programs.
LCPC 1996: 285-299 |
4 | | Martin C. Rinard,
Pedro C. Diniz:
Commutativity Analysis: A New Analysis Framework for Parallelizing Compilers.
PLDI 1996: 54-67 |
1995 |
3 | | Pedro C. Diniz,
Tao Yang:
Efficient Parallelization of Relaxation Iterative Methods for Solving Banded Linear Systems on Multiprocessors.
PPSC 1995: 490-491 |
2 | | Tao Yang,
Pedro C. Diniz,
Apostolos Gerasoulis,
Vivek Sarkar:
Scheduling Iterative Task Computation on Message-Passing Architectures.
PPSC 1995: 581-586 |
1 | | Pedro C. Diniz,
Steve Plimpton,
Bruce Hendrickson,
Robert W. Leland:
Parallel Algorithms for Dynamically Partitioning Unstructured Grids.
PPSC 1995: 615-620 |