2008 |
41 | EE | Fabrizio Iacopetti,
Luca Fanucci,
Roberto Roncella,
David Giusti,
Andrea Scebba:
Game Console Controller Interface for People with Disability.
CISIS 2008: 757-762 |
40 | EE | Pierluigi Nuzzo,
Claudio Nani,
Sergio Saponara,
Luca Fanucci,
Geert Van der Plas:
Mixed-Signal Design Space Exploration of Time-Interleaved A/D Converters for Ultra-Wide Band Applications.
DATE 2008: 1390-1393 |
39 | EE | Massimiliano Melani,
Lorenzo Bertini,
Marco De Marinis,
Peter Lange,
Francesco D'Ascoli,
Luca Fanucci:
Hot Wire Anemometric MEMS Sensor for Water Flow Monitoring.
DATE 2008: 342-347 |
38 | EE | Francesco D'Ascoli,
L. Bacciarelli,
Massimiliano Melani,
Luca Fanucci,
G. Ricotti,
E. Pardi,
F. Vincis,
Massimiliano Forliti,
Marco De Marinis:
A Programmable and Low-EMI Integrated Half-Bridge Driver in BCD Technology.
DATE 2008: 879-884 |
37 | EE | F. Vitullo,
Nicola E. L'Insalata,
Esa Petri,
Sergio Saponara,
Luca Fanucci,
M. Casula,
Riccardo Locatelli,
Marcello Coppola:
Low-Complexity Link Microarchitecture for Mesochronous Communication in Networks-on-Chip.
IEEE Trans. Computers 57(9): 1196-1201 (2008) |
36 | EE | Nicola E. L'Insalata,
Sergio Saponara,
Luca Fanucci,
Pierangelo Terreni:
Automatic Synthesis of Cost Effective FFT/IFFT Cores for VLSI OFDM Systems.
IEICE Transactions 91-C(4): 487-496 (2008) |
2007 |
35 | EE | Torben Brack,
Matthias Alles,
Timo Lehnigk-Emden,
Frank Kienle,
Norbert Wehn,
Nicola E. L'Insalata,
Francesco Rossi,
Massimo Rovini,
Luca Fanucci:
Low complexity LDPC code decoders for next generation standards.
DATE 2007: 331-336 |
34 | EE | Sergio Saponara,
Esa Petri,
Marco Tonarelli,
Iacopo Del Corona,
Luca Fanucci:
FPGA-based networking systems for high data-rate and reliable in-vehicle communications.
DATE 2007: 480-485 |
33 | EE | Francesco D'Ascoli,
Francesco Iozzi,
Corrado Marino,
Massimiliano Melani,
Marco Tonarelli,
Luca Fanucci,
A. Giambastiani,
A. Rocchi,
Marco De Marinis:
Low-g accelerometer fast prototyping for automotive applications.
DATE 2007: 486-491 |
32 | EE | Nicola E. L'Insalata,
Sergio Saponara,
Luca Fanucci,
Pierangelo Terreni:
Automatic Generation of Low-Complexity FFT/IFFT Cores for Multi-Band OFDM Systems.
DSD 2007: 361-368 |
31 | EE | Giuseppe Gentile,
Massimo Rovini,
Luca Fanucci:
Low-Complexity Architectures of a Decoder for IEEE 802.16e LDPC Codes.
DSD 2007: 369-375 |
30 | EE | Massimo Rovini,
Giuseppe Gentile,
Francesco Rossi,
Luca Fanucci:
A Scalable Decoder Architecture for IEEE 802.11n LDPC Codes.
GLOBECOM 2007: 3270-3274 |
29 | EE | Massimo Rovini,
Giuseppe Gentile,
Francesco Rossi,
Luca Fanucci:
A minimum-latency block-serial architecture of a decoder for IEEE 802.11n LDPC codes.
VLSI-SoC 2007: 236-241 |
28 | EE | Luca Fanucci,
A. Giambastiani,
Francesco Iozzi,
Corrado Marino,
A. Rocchi:
Platform Based Design for Automotive Sensor Conditioning
CoRR abs/0710.4834: (2007) |
2006 |
27 | EE | Luca Fanucci,
Michele Cassiano,
Sergio Saponara,
David Kammler,
Ernst Martin Witte,
Oliver Schliebusch,
Gerd Ascheid,
Rainer Leupers,
Heinrich Meyr:
ASIP design and synthesis for non linear filtering in image processing.
DATE Designers' Forum 2006: 233-238 |
26 | EE | Gianluca Casarosa,
Michele Apuzzo,
Luca Fanucci,
Bruno Sarti:
Characterization of the EMC Performances of the CAN Bus in a Typical System Bus Architecture for Small Satellites.
DSD 2006: 338-345 |
25 | EE | Massimo Rovini,
Francesco Rossi,
Pasquale Ciao,
Nicola L'Insalat,
Luca Fanucci:
Layered Decoding of Non-Layered LDPC Codes.
DSD 2006: 537-544 |
24 | EE | Francesco Rossi,
Massimo Rovini,
Luca Fanucci:
Design and Validation of Digital Channels for a Galileo Receiver Prototype.
DSD 2006: 545-549 |
23 | EE | Luca Fanucci,
Pasquale Ciao,
Giulio Colavolpe:
VLSI Design of a Fully-Parallel High-Throughput Decoder for Turbo Gallager Codes.
IEICE Transactions 89-A(7): 1976-1986 (2006) |
2005 |
22 | EE | Luca Fanucci,
A. Giambastiani,
Francesco Iozzi,
Corrado Marino,
A. Rocchi:
Platform Based Design for Automotive Sensor Conditioning.
DATE 2005: 186-191 |
21 | EE | Massimo Rovini,
Nicola E. L'Insalata,
Francesco Rossi,
Luca Fanucci:
VLSI Design of a High-Throughput Multi-Rate Decoder for Structured LDPC Codes.
DSD 2005: 202-209 |
20 | EE | Sergio Saponara,
Michele Cassiano,
Stefano Marsi,
Riccardo Coen,
Luca Fanucci:
Cost-effective VLSI Design of Non Linear Image Processing Filters.
DSD 2005: 322-329 |
19 | EE | Corrado Marino,
Luca Fanucci,
Francesco Iozzi,
Massimiliano Forliti,
A. Rocchi,
A. Giambastiani,
Marco De Marinis:
VHDL-AMS Modelling and System Verification Flow.
FDL 2005: 189-196 |
18 | EE | Luca Fanucci,
Massimo Rovini,
Nicola E. L'Insalata,
Francesco Rossi:
High-Throughput Multi-Rate Decoding of Structured Low-Density Parity-Check Codes.
IEICE Transactions 88-A(12): 3539-3547 (2005) |
17 | EE | Luca Fanucci,
Sergio Saponara,
Alexander Morello:
Power Optimization of an 8051-Compliant IP Microcontroller.
IEICE Transactions 88-C(4): 597-600 (2005) |
16 | EE | Luca Fanucci,
Sergio Saponara,
Massimiliano Melani,
Pierangelo Terreni:
Self-Adaptive Algorithmic/Architectural Design for Real-Time, Low-Power Video Systems.
IEICE Transactions 88-D(7): 1538-1545 (2005) |
2004 |
15 | EE | Pasquale Ciao,
Giulio Colavolpe,
Luca Fanucci:
A Parallel VLSI Architecture for 1-Gb/s, 2048-b, Rate-1/2 Turbo Gallager Code Decoder.
DSD 2004: 174-181 |
14 | EE | Luca Fanucci,
Riccardo Locatelli,
Esa Petri:
VLSI Design of a Digital RFI Cancellation Scheme for VDSL Transceivers.
DSD 2004: 182-189 |
13 | | Sergio Saponara,
Luca Fanucci,
Pierangelo Terreni:
Context-Aware Algorithmic/Architectural Solutions for Real-time Embedded Video Systems.
WISES 2004: 79-90 |
2003 |
12 | EE | Marco De Marinis,
Luca Fanucci,
A. Giambastiani,
Alessandro Renieri,
A. Rocchi,
Christian Rosadini,
Claudio Sicilia,
Daniele Sicilia:
Sensor Platform Design for Automotive Applications.
DSD 2003: 346-355 |
11 | EE | Sergio Saponara,
Luca Fanucci,
L. Serafini:
Low-Power FFT/IFFT VLSI Macro Cell for Scalable Broadband VDSL Modem.
IWSOC 2003: 161-166 |
10 | EE | Armando Armaroli,
Marcello Coppola,
Mario Diaz-Nava,
Luca Fanucci:
High Level Modeling and Simulation of a VDSL Modem in SystemC 2.0 - IPsim.
IWSOC 2003: 175-180 |
9 | EE | Fernando De Bernardinis,
Luca Fanucci,
T. Ramacciotti,
Pierangelo Terreni:
A QoS Internet Protocol Scheduler on the IXP1200 Network Platform.
IWSOC 2003: 394-399 |
8 | EE | Sergio Saponara,
Luca Fanucci:
VLSI design investigation for low-cost, low-power FFT/IFFT processing in advanced VDSL transceivers.
Microelectronics Journal 34(2): 133-148 (2003) |
2002 |
7 | EE | Luca Fanucci,
Massimiliano Forliti,
Pierangelo Terreni:
FAST: FFT ASIC automated synthesis.
Integration 33(1-2): 23-37 (2002) |
2001 |
6 | EE | Luca Fanucci,
Roberto Roncella,
Roberto Saletti:
Non-linearity reduction technique for delay-locked delay-lines.
ISCAS (4) 2001: 430-433 |
5 | EE | Luca Fanucci,
G. D'Angelo,
A. Monterastelli,
M. Paparo,
B. Neri:
Fully integrated low-noise-amplifier with high quality factor L-C filter for 1.8 GHz wireless applications.
ISCAS (4) 2001: 462-465 |
4 | | Luca Fanucci,
Edoardo Letta,
Riccardo De Gaudenzi,
Filippo Giannetti,
Marco Luise:
VLSI implementation of a CDMA blind adaptive interference-mitigating detector.
IEEE Journal on Selected Areas in Communications 19(2): 179-190 (2001) |
3 | EE | Luca Fanucci,
Sergio Saponara,
Lorenzo Bertini:
A parametric VLSI architecture for video motion estimation.
Integration 31(1): 79-100 (2001) |
2000 |
2 | EE | Luca Fanucci,
Sergio Saponara,
Andrea Cenciotti:
IP Reuse VLSI Architecture for Low Complexity Fast Motion Estimation in Multimedia Applications.
EUROMICRO 2000: 1417-1424 |
1 | | Luca Fanucci,
Lorenzo Bertini,
Sergio Saponara:
Programmable and Low Power VLSI Architecture for Full Search Motion Estimation in Multimedia Communications.
IEEE International Conference on Multimedia and Expo (III) 2000: 1395-1398 |