2008 | ||
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33 | EE | Qing Su, Charles Chiang, Jamil Kawa: Hotspot Based Yield Prediction with Consideration of Correlations. ISQED 2008: 338-343 |
2007 | ||
32 | EE | Jamil Kawa, Charles Chiang: DFM issues for 65nm and beyond. ACM Great Lakes Symposium on VLSI 2007: 318-322 |
31 | EE | Subarna Sinha, Jianfeng Luo, Charles Chiang: Model Based Layout Pattern Dependent Metal Filling Algorithm for Improved Chip Surface Uniformity in the Copper Process. ASP-DAC 2007: 1-6 |
30 | EE | Jun Tao, Xuan Zeng, Wei Cai, Yangfeng Su, Dian Zhou, Charles Chiang: Stochastic Sparse-grid Collocation Algorithm (SSCA) for Periodic Steady-State Analysis of Nonlinear System with Process Variations. ASP-DAC 2007: 474-479 |
29 | EE | Subarna Sinha, Charles Chiang: A methodology for fast and accurate yield factor estimation during global routing. ICCAD 2007: 481-487 |
28 | EE | Jingyu Xu, Subarna Sinha, Charles Chiang: Accurate detection for process-hotspots with vias and incomplete specification. ICCAD 2007: 839-846 |
27 | EE | Subarna Sinha, Qing Su, Linni Wen, Frank Lee, Charles Chiang, Yi-Kan Cheng, Jin-Lien Lin, Yu-Chyi Harn: A New Flexible Algorithm for Random Yield Improvement. ISQED 2007: 795-800 |
26 | EE | Charles Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu, Alexander Zelikovsky: Bright-Field AAPSM Conflict Detection and Correction CoRR abs/0710.4661: (2007) |
25 | EE | Charles Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu, Alexander Zelikovsky: Fast and Efficient Bright-Field AAPSM Conflict Detection and Correction. IEEE Trans. on CAD of Integrated Circuits and Systems 26(1): 115-126 (2007) |
2006 | ||
24 | EE | Dan Page, Jamil Kawa, Charles Chiang: DFM: swimming upstream. ACM Great Lakes Symposium on VLSI 2006: 1 |
23 | EE | Charles Chiang, Jamil Kawa: Three DFM Challenges: Random Defects, Thickness Variation, and Printability Variation. APCCAS 2006: 1099-1102 |
22 | EE | Jianfeng Luo, Subarna Sinha, Qing Su, Jamil Kawa, Charles Chiang: An IC manufacturing yield model considering intra-die variations. DAC 2006: 749-754 |
21 | EE | Xuan Zeng, Lihong Feng, Yangfeng Su, Wei Cai, Dian Zhou, Charles Chiang: Time domain model order reduction by wavelet collocation method. DATE 2006: 21-26 |
20 | EE | Hailong Yao, Subarna Sinha, Charles Chiang, Xianlong Hong, Yici Cai: Efficient process-hotspot detection using range pattern matching. ICCAD 2006: 625-632 |
19 | EE | Jun Tao, Xuan Zeng, Fan Yang, Yangfeng Su, Lihong Feng, Wei Cai, Dian Zhou, Charles Chiang: A one-shot projection method for interconnects with process variations. ISCAS 2006 |
18 | EE | Qing Su, Jamil Kawa, Charles Chiang, Yehia Massoud: Accurate modeling of substrate resistive coupling for floating substrates. ACM Trans. Design Autom. Electr. Syst. 11(1): 44-51 (2006) |
2005 | ||
17 | EE | Bang Liu, Xuan Zeng, Yangfeng Su, Jun Tao, Zhaojun Bai, Charles Chiang, Dian Zhou: Block SAPOR: block Second-order Arnoldi method for Passive Order Reduction of multi-input multi-output RCS interconnect circuits. ASP-DAC 2005: 244-249 |
16 | EE | Xuan Zeng, Bank Liu, Jun Tao, Charles Chiang, Dian Zhou: A novel wavelet method for noise analysis of nonlinear circuits. ASP-DAC 2005: 471-476 |
15 | EE | Charles Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu, Alexander Zelikovsky: Bright-Field AAPSM Conflict Detection and Correction. DATE 2005: 908-913 |
14 | EE | Wen Yujie, Jiarong Tong, Charles Chiang: Domain Specific Non-Uniform Routing Architecture for Embedded Programmable IP Core (abstract only). FPGA 2005: 269 |
13 | Jianfeng Luo, Qing Su, Charles Chiang, Jamil Kawa: A layout dependent full-chip copper electroplating topography model. ICCAD 2005: 133-140 | |
12 | Charles Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu: Fast and efficient phase conflict detection and correction in standard-cell layouts. ICCAD 2005: 149-156 | |
11 | EE | Xin Wang, Charles Chiang, Jamil Kawa, Qing Su: A Min-Variance Iterative Method for Fast Smart Dummy Feature Density Assignment in Chemical-Mechanical Polishing. ISQED 2005: 258-263 |
2004 | ||
10 | EE | Jian Wang, Jun Tao, Xuan Zeng, Charles Chiang, Dian Zhou: Analog circuit behavioral modeling via wavelet collocation method with auto-companding. ASP-DAC 2004: 45-50 |
9 | EE | Lihong Feng, Xuan Zeng, Charles Chiang, Dian Zhou, Qiang Fang: Direct Nonlinear Order Reduction with Variational Analysis. DATE 2004: 1316-1321 |
8 | EE | Xin Zhou, Dian Zhou, Jin Liu, Ruiming Li, Xuan Zeng, Charles Chiang: Steady-State Analysis of Nonlinear Circuits Using Discrete Singular Convolution Method. DATE 2004: 1322-1326 |
7 | EE | Yangfeng Su, Jian Wang, Xuan Zeng, Zhaojun Bai, Charles Chiang, Dian Zhou: SAPOR: second-order Arnoldi method for passive order reduction of RCS circuits. ICCAD 2004: 74-79 |
6 | Lihong Feng, Xuan Zeng, Jiarong Tong, Charles Chiang, Dian Zhou: Two-sided projection method in variational equation model order reduction of nonlinear circuits. ISCAS (4) 2004: 816-819 | |
5 | Jian Wang, Xuan Zeng, Wei Cai, Charles Chiang, Jiarong Tong, Dian Zhou: Frequency domain wavelet method with GMRES for large-scale linear circuit simulation. ISCAS (5) 2004: 321-324 | |
4 | Bo-Kyung Choi, Charles Chiang, Jamil Kawa, Majid Sarrafzadeh: Routing resources consumption on M-arch and X-arch. ISCAS (5) 2004: 73-76 | |
2003 | ||
3 | EE | Charles Chiang, Qing Su, Ching-Shoei Chiang: Wirelength reduction by using diagonal wire. ACM Great Lakes Symposium on VLSI 2003: 104-107 |
1994 | ||
2 | EE | Charles Chiang, Chak-Kuen Wong, Majid Sarrafzadeh: A weighted Steiner tree-based global router with simultaneous length and density minimization. IEEE Trans. on CAD of Integrated Circuits and Systems 13(12): 1461-1469 (1994) |
1990 | ||
1 | EE | Charles Chiang, Majid Sarrafzadeh, Chak-Kuen Wong: Global routing based on Steiner min-max trees. IEEE Trans. on CAD of Integrated Circuits and Systems 9(12): 1318-1325 (1990) |