Karen Maex

2007
14	EE	Georges G. E. Gielen, Wim Dehaene, Phillip Christie, Dieter Draxelmayr, Edmond Janssens, Karen Maex, Ted Vucurevich: Analog and Digital Circuit Design in 65 nm CMOS: End of the Road? CoRR abs/0710.4709: (2007)
2006
13	EE	Evelyn Grossar, Michele Stucchi, Karen Maex, Wim Dehaene: Statistically Aware SRAM Memory Array Design. ISQED 2006: 25-30
12	EE	Mandeep Bamal, Youssef Travaly, Wenqi Zhang, Michele Stucchi, Karen Maex: Impact of interconnect resistance increase on system performance of low power and high performance designs. SLIP 2006: 85-90
2005
11	EE	Georges G. E. Gielen, Wim Dehaene, Phillip Christie, Dieter Draxelmayr, Edmond Janssens, Karen Maex, Ted Vucurevich: Analog and Digital Circuit Design in 65 nm CMOS: End of the Road? DATE 2005: 36-42
10	EE	Hua Wang, Miguel Miranda, Wim Dehaene, Francky Catthoor, Karen Maex: Systematic Analysis of Energy and Delay Impact of Very Deep Submicron Process Variability Effects in Embedded SRAM Modules. DATE 2005: 914-919
9	EE	Y.-L. Li, Zs. Tökei, Ph. Roussel, Guido Groeseneken, Karen Maex: Layout dependency induced deviation from Poisson area scaling in BEOL dielectric reliability. Microelectronics Reliability 45(9-11): 1299-1304 (2005)
2004
8	EE	Francky Catthoor, Andrea Cuomo, Grant Martin, Patrick Groeneveld, Rudy Lauwereins, Karen Maex, Patrick van de Steeg, Ron Wilson: How Can System-Level Design Solve the Interconnect Technology Scaling Problem? DATE 2004: 332-339
7	EE	Mandeep Bamal, Evelyn Grossar, Michele Stucchi, Karen Maex: Interconnect width selection for deep submicron designs using the table lookup method. SLIP 2004: 41-44
2003
6	EE	Antonis Papanikolaou, Miguel Miranda, Francky Catthoor, Henk Corporaal, Hugo De Man, David De Roest, Michele Stucchi, Karen Maex: Global interconnect trade-off for technology over memory modules to application level: case study. SLIP 2003: 125-132
2002
5	EE	Hasan Ymeri, Bart Nauwelaers, Karen Maex, David De Roest, Michele Stucchi, Servaas Vandenberghe: Simple and Efficient Approach for Shunt Admittance Parameters Calculations of VLSI On-Chip Interconnects on Semiconducting Substrate. DATE 2002: 1113
4	EE	Antonis Papanikolaou, Miguel Miranda, Francky Catthoor, Henk Corporaal, Hugo De Man, David De Roest, Michele Stucchi, Karen Maex: Interconnect exploration for future wire dominated technologies. SLIP 2002: 105-106
3	EE	Hasan Ymeri, Bart Nauwelaers, Karen Maex, Servaas Vandenberghe, David De Roest: A CAD-oriented analytical model for frequency-dependent series resistance and inductance of microstrip on-chip interconnect on silicon substrate. Microprocessors and Microsystems 26(1): 45-48 (2002)
2001
2	EE	Hasan Ymeri, Bart Nauwelaers, Karen Maex: Frequency-dependent mutual resistance and inductance formulas for coupled IC interconnects on an Si-SiO2 substrate. Integration 30(2): 133-141 (2001)
2000
1	EE	Hasan Ymeri, Bart Nauwelaers, Karen Maex: Computation of capacitance matrix for integrated circuit interconnects using semi-analytic Green's function method. Integration 30(1): 55-63 (2000)

Coauthor Index

1	Mandeep Bamal	[7] [12]
2	Francky Catthoor	[4] [6] [8] [10]
3	Phillip Christie	[11] [14]
4	Henk Corporaal	[4] [6]
5	Andrea Cuomo	[8]
6	Wim Dehaene	[10] [11] [13] [14]
7	Dieter Draxelmayr	[11] [14]
8	Georges G. E. Gielen	[11] [14]
9	Patrick Groeneveld	[8]
10	Guido Groeseneken	[9]
11	Evelyn Grossar	[7] [13]
12	Edmond Janssens	[11] [14]
13	Rudy Lauwereins	[8]
14	Y.-L. Li	[9]
15	Hugo De Man	[4] [6]
16	Grant Martin	[8]
17	Miguel Miranda	[4] [6] [10]
18	Bart Nauwelaers	[1] [2] [3] [5]
19	Antonis Papanikolaou	[4] [6]
20	David De Roest	[3] [4] [5] [6]
21	Ph. Roussel	[9]
22	Patrick van de Steeg	[8]
23	Michele Stucchi	[4] [5] [6] [7] [12] [13]
24	Zs. Tökei	[9]
25	Youssef Travaly	[12]
26	Servaas Vandenberghe	[3] [5]
27	Ted Vucurevich	[11] [14]
28	Hua Wang	[10]
29	Ron Wilson	[8]
30	Hasan Ymeri	[1] [2] [3] [5]
31	Wenqi Zhang	[12]