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Roberto Sarmiento

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2008
16EER. Arteaga, Félix Tobajas, Roberto Esper-Chaín, V. de Armas, Roberto Sarmiento: GMDS: Hardware implementation of novel real output queuing architecture. DATE 2008: 1450-1455
2007
15EEC. Arbelo, Andreas Kanstein, Sebastián López, José Francisco López, Mladen Berekovic, Roberto Sarmiento, Jean-Yves Mignolet: Mapping control-intensive video kernels onto a coarse-grain reconfigurable architecture: the H.264/AVC deblocking filter. DATE 2007: 177-182
14EESebastián López, Gustavo Marrero Callicó, José Francisco López, Roberto Sarmiento: A High Quality/Low Computational Cost Technique for Block Matching Motion Estimation CoRR abs/0710.4819: (2007)
2006
13 Félix Tobajas, Roberto Esper-Chaín, Raúl Regidor, O. Santana, Roberto Sarmiento: A Low Power 2.5 Gbps 1: 32 Deserializer in SiGe BiCMOS Technology. DDECS 2006: 21-26
2005
12EESebastián López, Gustavo Marrero Callicó, José Francisco López, Roberto Sarmiento: A High Quality/Low Computational Cost Technique for Block Matching Motion Estimation. DATE 2005: 2-7
11EESebastián López, Félix Tobajas, A. Villar, V. de Armas, José Francisco López, Roberto Sarmiento: Low cost efficient architecture for H.264 motion estimation. ISCAS (1) 2005: 412-415
10EEFélix Tobajas, Roberto Esper-Chaín, S. Tubio, R. Arteaga, V. de Armas, Roberto Sarmiento: Experimental gigabit multidrop serial backplane for high speed digital systems. ISCAS (4) 2005: 3821-3824
9EESebastián López, Gustavo Marrero Callicó, José Francisco López, Roberto Sarmiento, Antonio Núñez: Low-cost implementation of a super-resolution algorithm for real-time video applications. ISCAS (6) 2005: 6130-6133
2001
8EEJuan A. Montiel-Nelson, V. de Armas, Roberto Sarmiento, Antonio Núñez, Saeid Nooshabadi: A compact layout technique to minimize high frequency switching effects in high speed circuits. ISCAS (4) 2001: 96-99
7EEJuan A. Montiel-Nelson, V. de Armas, Roberto Sarmiento, Antonio Núñez: A Compact Layout Technique for Reducing Switching Current Effects in High Speed Circuits. ISQED 2001: 223-
2000
6EESaeid Nooshabadi, Juan A. Montiel-Nelson, Antonio Núñez, Roberto Sarmiento, J. Sosa: A Single Phase Latch for High Speed GaAs Domino Circuits. DATE 2000: 760
1999
5EEJuan A. Montiel-Nelson, Saeid Nooshabadi, V. de Armas, Roberto Sarmiento, Antonio Núñez: High Speed GaAs Subsystem Design using Feed Through Logic. DATE 1999: 509-
4EEJosé Francisco López, Roberto Sarmiento, Antonio Núñez, Kamran Eshraghian, Stefan Lachowicz, Derek Abbott: Low Power Techniques for Digital GaAs VLSI. Great Lakes Symposium on VLSI 1999: 321-324
1998
3EEJuan A. Montiel-Nelson, V. de Armas, Roberto Sarmiento, Antonio Núñez: A Cell and Macrocell Compiler for GaAs VLSI Full-Custom Design. DATE 1998: 947-948
2EERoberto Sarmiento, V. de Armas, José Francisco López, Juan A. Montiel-Nelson, Antonio Núñez: A CORDIC processor for FFT computation and its implementation using gallium arsenide technology. IEEE Trans. VLSI Syst. 6(1): 18-30 (1998)
1994
1 Roberto Sarmiento, Kamran Eshraghian: Implementation of a CORDIC Processor for CFFT Computation in Gallium Arsenide Technology. EDAC-ETC-EUROASIC 1994: 238-244

Coauthor Index

1Derek Abbott [4]
2C. Arbelo [15]
3V. de Armas [2] [3] [5] [7] [8] [10] [11] [16]
4R. Arteaga [10] [16]
5Mladen Berekovic [15]
6Gustavo Marrero Callicó [9] [12] [14]
7Kamran Eshraghian [1] [4]
8Roberto Esper-Chaín [10] [13] [16]
9Andreas Kanstein [15]
10Stefan Lachowicz [4]
11José Francisco López [2] [4] [9] [11] [12] [14] [15]
12Sebastián López [9] [11] [12] [14] [15]
13Jean-Yves Mignolet [15]
14Juan A. Montiel-Nelson [2] [3] [5] [6] [7] [8]
15Saeid Nooshabadi [5] [6] [8]
16Antonio Núñez [2] [3] [4] [5] [6] [7] [8] [9]
17Raúl Regidor [13]
18O. Santana [13]
19J. Sosa [6]
20Félix Tobajas [10] [11] [13] [16]
21S. Tubio [10]
22A. Villar [11]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)