Srikanth Venkataraman

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeer - CSB - Google - MSN - Yahoo

39EESrikanth Venkataraman, Nagesh Tamarapalli: DFM / DFT / SiliconDebug / Diagnosis. VLSI Design 2008: 5-6
38EEKing Leong Lee, Nadir Z. Basturkmen, Srikanth Venkataraman: Diagnosis of Scan Clock Failures. VTS 2008: 67-72
37EESrikanth Venkataraman, Ruchir Puri, Steve Griffith, Ankush Oberai, Robert Madge, Greg Yeric, Walter Ng, Yervant Zorian: Making Manufacturing Work For You. DAC 2007: 107-108
36EESrikanth Venkataraman: DFM, DFY, Debug and Diagnosis: The Loop to Ensure Yield. ISQED 2007: 5
35EESrikanth Venkataraman, Nagesh Nagapalli, Lech Józwiak: Quality Driven Manufacturing and SOC Designs. ISQED 2007: 5
34EEVishnu C. Vimjam, Enamul Amyeen, Ruifeng Guo, Srikanth Venkataraman, Michael S. Hsiao, Kai Yang: Using Scan-Dump Values to Improve Functional-Diagnosis Methodology. VTS 2007: 231-238
33EEIrith Pomeranz, Sudhakar M. Reddy, Srikanth Venkataraman: z-Diagnosis: A Framework for Diagnostic Fault Simulation and Test Generation Utilizing Subsets of Outputs. IEEE Trans. on CAD of Integrated Circuits and Systems 26(9): 1700-1712 (2007)
32EEDavid Abercrombie, Bernd Koenemann, Nagesh Tamarapalli, Srikanth Venkataraman: DFM, DFT, Silicon Debug and Diagnosis - The Loop to Ensure Product Yield. VLSI Design 2006: 14
31EEBharath Seshadri, Xiaoming Yu, Srikanth Venkataraman: Accelerating Diagnostic Fault Simulation Using Z-diagnosis and Concurrent Equivalence Identification. VTS 2006: 380-385
30EEBharath Seshadri, Irith Pomeranz, Srikanth Venkataraman, Enamul Amyeen, Sudhakar M. Reddy: Dominance Based Analysis for Large Volume Production Fail Diagnosis. VTS 2006: 392-399
29EERuifeng Guo, Subhasish Mitra, Enamul Amyeen, Jinkyu Lee, Srihari Sivaraj, Srikanth Venkataraman: Evaluation of Test Metrics: Stuck-at, Bridge Coverage Estimate and Gate Exhaustive. VTS 2006: 66-71
28EEYu-Shen Yang, Andreas G. Veneris, Paul J. Thadikaran, Srikanth Venkataraman: Extraction error modeling and automated model debugging in high-performance custom designs. IEEE Trans. VLSI Syst. 14(7): 763-776 (2006)
27EERuifeng Guo, Srikanth Venkataraman: An algorithmic technique for diagnosis of faulty scan chains. IEEE Trans. on CAD of Integrated Circuits and Systems 25(9): 1861-1868 (2006)
26EEYu-Shen Yang, Andreas G. Veneris, Paul J. Thadikaran, Srikanth Venkataraman: Extraction Error Modeling and Automated Model Debugging in High-Performance Low Power Custom Designs. DATE 2005: 996-1001
25EEIrith Pomeranz, Srikanth Venkataraman, Sudhakar M. Reddy: Fault Diagnosis and Fault Model Aliasing. ISVLSI 2005: 206-211
24EEIrith Pomeranz, Srikanth Venkataraman, Sudhakar M. Reddy, Bharath Seshadri: Z-Sets and Z-Detections: Circuit Characteristics that Simplify Fault Diagnosis. DATE 2004: 68-75
23EESrikanth Venkataraman: Diagnosis meets Physical Failure Analysis: What is needed to succeed?. ITC 2004: 1442
22EEIrith Pomeranz, Srikanth Venkataraman, Sudhakar M. Reddy: Z-DFD: Design-for-Diagnosability Based on the Concept of Z-Detection. ITC 2004: 489-497
21EEEnamul Amyeen, Srikanth Venkataraman, Ajay Ojha, Sangbong Lee: Evaluation of the Quality of N-Detect Scan ATPG Patterns on a Processor. ITC 2004: 669-678
20EEIrith Pomeranz, Srikanth Venkataraman, Sudhakar M. Reddy, Enamul Amyeen: Defect Diagnosis Based on Pattern-Dependent Stuck-At Faults. VLSI Design 2004: 475-480
19EESrikanth Venkataraman, Srihari Sivaraj, Enamul Amyeen, Sangbong Lee, Ajay Ojha, Ruifeng Guo: An Experimental Study of N-Detect Scan ATPG Patterns on a Processor. VTS 2004: 23-30
18EEDebashis Nayak, Srikanth Venkataraman, Paul J. Thadikaran: Razor: A Tool for Post-Silicon Scan ATPG Pattern Debug and Its Application. VTS 2004: 97-102
17EEXiaoming Yu, Enamul Amyeen, Srikanth Venkataraman, Ruifeng Guo, Irith Pomeranz: Concurrent Execution of Diagnostic Fault Simulation and Equivalence Identification During Diagnostic Test Generation. VTS 2003: 351-358
16 Ruifeng Guo, Srikanth Venkataraman: A technique for fault diagnosis of defects in scan chains. ITC 2001: 268-277
15EERamesh C. Tekumalla, Srikanth Venkataraman, Jayabrata Ghosh-Dastidar: On Diagnosing Path Delay Faults in an At-Speed Environment. VTS 2001: 28-33
14EEIsmed Hartanto, Srikanth Venkataraman, W. Kent Fuchs, Elizabeth M. Rudnick, Janak H. Patel, Sreejit Chakravarty: Diagnostic simulation of stuck-at faults in sequential circuits using compact lists. ACM Trans. Design Autom. Electr. Syst. 6(4): 471-489 (2001)
13EESrikanth Venkataraman, Scott Brady Drummonds: Poirot: Applications of a Logic Fault Diagnosis Tool. IEEE Design & Test of Computers 18(1): 19-30 (2001)
12 Srikanth Venkataraman, Scott Brady Drummonds: POIROT: a logic fault diagnosis tool and its applications. ITC 2000: 253-262
11EESrikanth Venkataraman, Scott Brady Drummonds: A Technique for Logic Fault Diagnosis of Interconnect Open Defects. VTS 2000: 313-318
10EEAndreas G. Veneris, Ibrahim N. Hajj, Srikanth Venkataraman, W. Kent Fuchs: Multiple Design Error Diagnosis and Correction in Digital VLSI Circuits. VTS 1999: 58-63
9EESrikanth Venkataraman, W. Kent Fuchs, Janak H. Patel: Diagnostic Simulation of Sequential Circuits Using Fault Sampling. VLSI Design 1998: 476-481
8EESrikanth Venkataraman, W. Kent Fuchs: A deductive technique for diagnosis of bridging faults. ICCAD 1997: 562-567
7 Srikanth Venkataraman, W. Kent Fuchs: Diagnosis of Bridging Faults in Sequential Circuits Using Adaptive Simulation, State Storage, and Path-Tracing. ITC 1997: 878-886
6EESrikanth Venkataraman, W. Kent Fuchs: Distributed Diagnostic Simulation of Stuck-At Faults in Sequential Circuits. VLSI Design 1997: 381-387
5EEDong Xiang, Srikanth Venkataraman, W. Kent Fuchs, Janak H. Patel: Partial Scan Design Based on Circuit State Information. DAC 1996: 807-812
4EESrikanth Venkataraman, Ismed Hartanto, W. Kent Fuchs: Dynamic diagnosis of sequential circuits based on stuck-at faults. VTS 1996: 198-203
3EESreejit Chakravarty, Yiming Gong, Srikanth Venkataraman: Diagnostic simulation of stuck-at faults in combinational circuits. J. Electronic Testing 8(1): 87-97 (1996)
2EESrikanth Venkataraman, Ismed Hartanto, W. Kent Fuchs, Elizabeth M. Rudnick, Sreejit Chakravarty, Janak H. Patel: Rapid Diagnostic Fault Simulation of Stuck-at Faults in Sequential Circuits Using Compact Lists. DAC 1995: 133-138
1 Sybille Hellebrand, Janusz Rajski, Steffen Tarnick, Srikanth Venkataraman, Bernard Courtois: Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers. IEEE Trans. Computers 44(2): 223-233 (1995)

Coauthor Index

1David Abercrombie [32]
2Enamul Amyeen [17] [19] [20] [21] [29] [30] [34]
3Nadir Z. Basturkmen [38]
4Sreejit Chakravarty [2] [3] [14]
5Bernard Courtois [1]
6Scott Brady Drummonds [11] [12] [13]
7W. Kent Fuchs [2] [4] [5] [6] [7] [8] [9] [10] [14]
8Jayabrata Ghosh-Dastidar [15]
9Yiming Gong [3]
10Steve Griffith [37]
11Ruifeng Guo [16] [17] [19] [27] [29] [34]
12Ibrahim N. Hajj [10]
13Ismed Hartanto [2] [4] [14]
14Sybille Hellebrand [1]
15Michael S. Hsiao [34]
16Lech Józwiak [35]
17Bernd Koenemann [32]
18Jinkyu Lee [29]
19King Leong Lee [38]
20Sangbong Lee [19] [21]
21Robert Madge [37]
22Subhasish Mitra [29]
23Nagesh Nagapalli [35]
24Debashis Nayak [18]
25Walter Ng [37]
26Ankush Oberai [37]
27Ajay Ojha [19] [21]
28Janak H. Patel [2] [5] [9] [14]
29Irith Pomeranz [17] [20] [22] [24] [25] [30] [33]
30Ruchir Puri [37]
31Janusz Rajski [1]
32Sudhakar M. Reddy [20] [22] [24] [25] [30] [33]
33Elizabeth M. Rudnick [2] [14]
34Bharath Seshadri [24] [30] [31]
35Srihari Sivaraj [19] [29]
36Nagesh Tamarapalli [32] [39]
37Steffen Tarnick [1]
38Ramesh C. Tekumalla [15]
39Paul J. Thadikaran [18] [26] [28]
40Andreas G. Veneris [10] [26] [28]
41Vishnu C. Vimjam [34]
42Dong Xiang [5]
43Kai Yang [34]
44Yu-Shen Yang [26] [28]
45Greg Yeric [37]
46Xiaoming Yu [17] [31]
47Yervant Zorian [37]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)