2008 |
39 | EE | Srikanth Venkataraman,
Nagesh Tamarapalli:
DFM / DFT / SiliconDebug / Diagnosis.
VLSI Design 2008: 5-6 |
38 | EE | King Leong Lee,
Nadir Z. Basturkmen,
Srikanth Venkataraman:
Diagnosis of Scan Clock Failures.
VTS 2008: 67-72 |
2007 |
37 | EE | Srikanth Venkataraman,
Ruchir Puri,
Steve Griffith,
Ankush Oberai,
Robert Madge,
Greg Yeric,
Walter Ng,
Yervant Zorian:
Making Manufacturing Work For You.
DAC 2007: 107-108 |
36 | EE | Srikanth Venkataraman:
DFM, DFY, Debug and Diagnosis: The Loop to Ensure Yield.
ISQED 2007: 5 |
35 | EE | Srikanth Venkataraman,
Nagesh Nagapalli,
Lech Józwiak:
Quality Driven Manufacturing and SOC Designs.
ISQED 2007: 5 |
34 | EE | Vishnu C. Vimjam,
Enamul Amyeen,
Ruifeng Guo,
Srikanth Venkataraman,
Michael S. Hsiao,
Kai Yang:
Using Scan-Dump Values to Improve Functional-Diagnosis Methodology.
VTS 2007: 231-238 |
33 | EE | Irith Pomeranz,
Sudhakar M. Reddy,
Srikanth Venkataraman:
z-Diagnosis: A Framework for Diagnostic Fault Simulation and Test Generation Utilizing Subsets of Outputs.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(9): 1700-1712 (2007) |
2006 |
32 | EE | David Abercrombie,
Bernd Koenemann,
Nagesh Tamarapalli,
Srikanth Venkataraman:
DFM, DFT, Silicon Debug and Diagnosis - The Loop to Ensure Product Yield.
VLSI Design 2006: 14 |
31 | EE | Bharath Seshadri,
Xiaoming Yu,
Srikanth Venkataraman:
Accelerating Diagnostic Fault Simulation Using Z-diagnosis and Concurrent Equivalence Identification.
VTS 2006: 380-385 |
30 | EE | Bharath Seshadri,
Irith Pomeranz,
Srikanth Venkataraman,
Enamul Amyeen,
Sudhakar M. Reddy:
Dominance Based Analysis for Large Volume Production Fail Diagnosis.
VTS 2006: 392-399 |
29 | EE | Ruifeng Guo,
Subhasish Mitra,
Enamul Amyeen,
Jinkyu Lee,
Srihari Sivaraj,
Srikanth Venkataraman:
Evaluation of Test Metrics: Stuck-at, Bridge Coverage Estimate and Gate Exhaustive.
VTS 2006: 66-71 |
28 | EE | Yu-Shen Yang,
Andreas G. Veneris,
Paul J. Thadikaran,
Srikanth Venkataraman:
Extraction error modeling and automated model debugging in high-performance custom designs.
IEEE Trans. VLSI Syst. 14(7): 763-776 (2006) |
27 | EE | Ruifeng Guo,
Srikanth Venkataraman:
An algorithmic technique for diagnosis of faulty scan chains.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(9): 1861-1868 (2006) |
2005 |
26 | EE | Yu-Shen Yang,
Andreas G. Veneris,
Paul J. Thadikaran,
Srikanth Venkataraman:
Extraction Error Modeling and Automated Model Debugging in High-Performance Low Power Custom Designs.
DATE 2005: 996-1001 |
25 | EE | Irith Pomeranz,
Srikanth Venkataraman,
Sudhakar M. Reddy:
Fault Diagnosis and Fault Model Aliasing.
ISVLSI 2005: 206-211 |
2004 |
24 | EE | Irith Pomeranz,
Srikanth Venkataraman,
Sudhakar M. Reddy,
Bharath Seshadri:
Z-Sets and Z-Detections: Circuit Characteristics that Simplify Fault Diagnosis.
DATE 2004: 68-75 |
23 | EE | Srikanth Venkataraman:
Diagnosis meets Physical Failure Analysis: What is needed to succeed?.
ITC 2004: 1442 |
22 | EE | Irith Pomeranz,
Srikanth Venkataraman,
Sudhakar M. Reddy:
Z-DFD: Design-for-Diagnosability Based on the Concept of Z-Detection.
ITC 2004: 489-497 |
21 | EE | Enamul Amyeen,
Srikanth Venkataraman,
Ajay Ojha,
Sangbong Lee:
Evaluation of the Quality of N-Detect Scan ATPG Patterns on a Processor.
ITC 2004: 669-678 |
20 | EE | Irith Pomeranz,
Srikanth Venkataraman,
Sudhakar M. Reddy,
Enamul Amyeen:
Defect Diagnosis Based on Pattern-Dependent Stuck-At Faults.
VLSI Design 2004: 475-480 |
19 | EE | Srikanth Venkataraman,
Srihari Sivaraj,
Enamul Amyeen,
Sangbong Lee,
Ajay Ojha,
Ruifeng Guo:
An Experimental Study of N-Detect Scan ATPG Patterns on a Processor.
VTS 2004: 23-30 |
18 | EE | Debashis Nayak,
Srikanth Venkataraman,
Paul J. Thadikaran:
Razor: A Tool for Post-Silicon Scan ATPG Pattern Debug and Its Application.
VTS 2004: 97-102 |
2003 |
17 | EE | Xiaoming Yu,
Enamul Amyeen,
Srikanth Venkataraman,
Ruifeng Guo,
Irith Pomeranz:
Concurrent Execution of Diagnostic Fault Simulation and Equivalence Identification During Diagnostic Test Generation.
VTS 2003: 351-358 |
2001 |
16 | | Ruifeng Guo,
Srikanth Venkataraman:
A technique for fault diagnosis of defects in scan chains.
ITC 2001: 268-277 |
15 | EE | Ramesh C. Tekumalla,
Srikanth Venkataraman,
Jayabrata Ghosh-Dastidar:
On Diagnosing Path Delay Faults in an At-Speed Environment.
VTS 2001: 28-33 |
14 | EE | Ismed Hartanto,
Srikanth Venkataraman,
W. Kent Fuchs,
Elizabeth M. Rudnick,
Janak H. Patel,
Sreejit Chakravarty:
Diagnostic simulation of stuck-at faults in sequential circuits using compact lists.
ACM Trans. Design Autom. Electr. Syst. 6(4): 471-489 (2001) |
13 | EE | Srikanth Venkataraman,
Scott Brady Drummonds:
Poirot: Applications of a Logic Fault Diagnosis Tool.
IEEE Design & Test of Computers 18(1): 19-30 (2001) |
2000 |
12 | | Srikanth Venkataraman,
Scott Brady Drummonds:
POIROT: a logic fault diagnosis tool and its applications.
ITC 2000: 253-262 |
11 | EE | Srikanth Venkataraman,
Scott Brady Drummonds:
A Technique for Logic Fault Diagnosis of Interconnect Open Defects.
VTS 2000: 313-318 |
1999 |
10 | EE | Andreas G. Veneris,
Ibrahim N. Hajj,
Srikanth Venkataraman,
W. Kent Fuchs:
Multiple Design Error Diagnosis and Correction in Digital VLSI Circuits.
VTS 1999: 58-63 |
1998 |
9 | EE | Srikanth Venkataraman,
W. Kent Fuchs,
Janak H. Patel:
Diagnostic Simulation of Sequential Circuits Using Fault Sampling.
VLSI Design 1998: 476-481 |
1997 |
8 | EE | Srikanth Venkataraman,
W. Kent Fuchs:
A deductive technique for diagnosis of bridging faults.
ICCAD 1997: 562-567 |
7 | | Srikanth Venkataraman,
W. Kent Fuchs:
Diagnosis of Bridging Faults in Sequential Circuits Using Adaptive Simulation, State Storage, and Path-Tracing.
ITC 1997: 878-886 |
6 | EE | Srikanth Venkataraman,
W. Kent Fuchs:
Distributed Diagnostic Simulation of Stuck-At Faults in Sequential Circuits.
VLSI Design 1997: 381-387 |
1996 |
5 | EE | Dong Xiang,
Srikanth Venkataraman,
W. Kent Fuchs,
Janak H. Patel:
Partial Scan Design Based on Circuit State Information.
DAC 1996: 807-812 |
4 | EE | Srikanth Venkataraman,
Ismed Hartanto,
W. Kent Fuchs:
Dynamic diagnosis of sequential circuits based on stuck-at faults.
VTS 1996: 198-203 |
3 | EE | Sreejit Chakravarty,
Yiming Gong,
Srikanth Venkataraman:
Diagnostic simulation of stuck-at faults in combinational circuits.
J. Electronic Testing 8(1): 87-97 (1996) |
1995 |
2 | EE | Srikanth Venkataraman,
Ismed Hartanto,
W. Kent Fuchs,
Elizabeth M. Rudnick,
Sreejit Chakravarty,
Janak H. Patel:
Rapid Diagnostic Fault Simulation of Stuck-at Faults in Sequential Circuits Using Compact Lists.
DAC 1995: 133-138 |
1 | | Sybille Hellebrand,
Janusz Rajski,
Steffen Tarnick,
Srikanth Venkataraman,
Bernard Courtois:
Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers.
IEEE Trans. Computers 44(2): 223-233 (1995) |