| 2008 |
|---|
| 23 | EE | Zhigang Xu,
Andong Sheng,
Zhi Guo:
The Analysis of the Unobservable Criteria on the Single Platform Bearings-Only Target Tracking System.
ICNSC 2008: 1008-1013 |
| 22 | EE | Jun Wang,
Zhijun Yao,
Zhi Guo,
Longjun Qian:
The Distribution Function of Opportunity-awaiting Time for Random System with Objective Domain.
ICNSC 2008: 1014-1018 |
| 21 | EE | Yuqiang Mu,
Andong Sheng,
Zhi Guo:
Evolutionary Diagonal Recurrent Neural Network for Nonlinear Dynamic System Identification.
ICNSC 2008: 837-841 |
| 20 | EE | Zhi Guo,
Betul Buyukkurt,
John Cortes,
Abhishek Mitra,
Walid A. Najjar:
A Compiler Intermediate Representation for Reconfigurable Fabrics.
International Journal of Parallel Programming 36(5): 493-520 (2008) |
| 19 | EE | Zhi Guo,
Walid A. Najjar,
Betul Buyukkurt:
Efficient hardware code generation for FPGAs.
TACO 5(1): (2008) |
| 2007 |
|---|
| 18 | EE | Kai Schleupen,
Scott Lekuch,
Ryan Mannion,
Zhi Guo,
Walid A. Najjar,
Frank Vahid:
Dynamic Partial FPGA Reconfiguration in a Prototype Microprocessor System.
FPL 2007: 533-536 |
| 17 | | Huigang Xu,
Wenli Zang,
Zhi Guo:
The Satisfactory PID Regulator Design for Discrete Stochastic System.
IMECS 2007: 1554-1556 |
| 16 | EE | Yuren Zhou,
Zhi Guo,
Jun He:
On the Running Time Analysis of the (1+1) Evolutionary Algorithm for the Subset Sum Problem.
LSMS (1) 2007: 73-82 |
| 15 | EE | Zhi Guo,
Betul Buyukkurt,
Walid A. Najjar,
Kees A. Vissers:
Optimized Generation of Data-Path from C Codes for FPGAs
CoRR abs/0710.4716: (2007) |
| 2006 |
|---|
| 14 | EE | Betul Buyukkurt,
Zhi Guo,
Walid A. Najjar:
Impact of Loop Unrolling on Area, Throughput and Clock Frequency in ROCCC: C to VHDL Compiler for FPGAs.
ARC 2006: 401-412 |
| 13 | EE | Dinesh C. Suresh,
Zhi Guo,
Betul Buyukkurt,
Walid A. Najjar:
Automatic Compilation Framework for Bloom Filter Based Intrusion Detection.
ARC 2006: 413-418 |
| 12 | EE | Zhi Guo,
Walid A. Najjar:
A Compiler Intermediate Representation for Reconfigurable Fabrics.
FPL 2006: 1-4 |
| 11 | EE | Zhi Guo,
Abhishek Mitra,
Walid A. Najjar:
Automation of IP Core Interface Generation for Reconfigurable Computing.
FPL 2006: 1-6 |
| 10 | EE | Abhishek Mitra,
Zhi Guo,
Anirban Banerjee,
Walid A. Najjar:
Dynamic Co-Processor Architecture for Software Acceleration on CSoCs.
ICCD 2006 |
| 9 | EE | Liwei Liu,
Jun Yu,
Zhi Guo:
A kind of stochastic duel model for guerrilla war.
European Journal of Operational Research 171(2): 430-438 (2006) |
| 2005 |
|---|
| 8 | EE | Zhi Guo,
Betul Buyukkurt,
Walid A. Najjar,
Kees A. Vissers:
Optimized Generation of Data-Path from C Codes for FPGAs.
DATE 2005: 112-117 |
| 7 | EE | Greg Stitt,
Zhi Guo,
Walid A. Najjar,
Frank Vahid:
Techniques for synthesizing binaries to an advanced register/memory structure.
FPGA 2005: 118-124 |
| 6 | EE | Zhaofeng Ma,
Xibin Zhao,
Zhi Guo,
Ming Gu,
Jiaguang Sun:
Secure Anonymous Communication with Conditional Traceability.
NPC 2005: 405-408 |
| 2004 |
|---|
| 5 | EE | Zhi Guo,
Walid A. Najjar,
Frank Vahid,
Kees A. Vissers:
A quantitative analysis of the speedup factors of FPGAs over processors.
FPGA 2004: 162-170 |
| 4 | EE | Qin Wu,
Zhi Guo,
Yuangang Wang,
Jianwei Ma:
Opportunity-awaiting control strategy on rectangular target area.
ICARCV 2004: 1859-1862 |
| 3 | EE | Jianwei Ma,
Zhi Guo,
Qin Wu:
Variable structure multiple indices consistency control of stochastic system.
ICARCV 2004: 1969-1976 |
| 2 | EE | Zhi Guo,
Betul Buyukkurt,
Walid A. Najjar:
Input data reuse in compiling window operations onto reconfigurable hardware.
LCTES 2004: 249-256 |
| 2003 |
|---|
| 1 | EE | Zhi Guo,
Kwok-Yan Lam,
Siu Leung Chung,
Ming Gu,
Jia-Guang Sun:
Efficient Presentation of Multivariate Audit Data for Intrusion Detection of Web-Based Internet Services.
ACNS 2003: 63-75 |
