| 2008 |
|---|
| 10 | EE | Wenping Wang,
Shengqi Yang,
Yu Cao:
Node Criticality Computation for Circuit Timing Analysis and Optimization under NBTI Effect.
ISQED 2008: 763-768 |
| 9 | EE | Shengqi Yang,
Wenping Wang,
Tiehan Lv,
Wayne Wolf,
Narayanan Vijaykrishnan,
Yuan Xie:
Case Study of Reliability-Aware and Low-Power Design.
IEEE Trans. VLSI Syst. 16(7): 861-873 (2008) |
| 2007 |
|---|
| 8 | EE | Wenping Wang,
Shengqi Yang,
Sarvesh Bhardwaj,
Rakesh Vattikonda,
Sarma B. K. Vrudhula,
Frank Liu,
Yu Cao:
The Impact of NBTI on the Performance of Combinational and Sequential Circuits.
DAC 2007: 364-369 |
| 7 | EE | Wenping Wang,
Zile Wei,
Shengqi Yang,
Yu Cao:
An efficient method to identify critical gates under circuit aging.
ICCAD 2007: 735-740 |
| 2006 |
|---|
| 6 | EE | Shengqi Yang,
Wayne Wolf,
Narayanan Vijaykrishnan,
Yuan Xie:
Reliability-Aware SOC Voltage Islands Partition and Floorplan.
ISVLSI 2006: 343-348 |
| 2005 |
|---|
| 5 | EE | Shengqi Yang,
Wayne Wolf,
Wenping Wang,
Narayanan Vijaykrishnan,
Yuan Xie:
Low-leakage robust SRAM cell design for sub-100nm technologies.
ASP-DAC 2005: 539-544 |
| 4 | EE | Shengqi Yang,
Wayne Wolf,
Narayanan Vijaykrishnan,
Dimitrios N. Serpanos,
Yuan Xie:
Power Attack Resistant Cryptosystem Design: A Dynamic Voltage and Frequency Switching Approach.
DATE 2005: 64-69 |
| 3 | EE | Shengqi Yang,
Wayne Wolf,
Narayanan Vijaykrishnan,
Yuan Xie,
Wenping Wang:
Accurate Stacking Effect Macro-Modeling of Leakage Power in Sub-100nm Circuits.
VLSI Design 2005: 165-170 |
| 2 | EE | Shengqi Yang,
Wayne Wolf,
Narayanan Vijaykrishnan:
Power and Performance Analysis of Motion Estimation Based on Hardware and Software Realizations.
IEEE Trans. Computers 54(6): 714-726 (2005) |
| 2004 |
|---|
| 1 | | Shengqi Yang,
Wayne Wolf,
Narayanan Vijaykrishnan:
Search speed and power driven integrated software and hardware optimizations for motion estimation algorithms.
ICME 2004: 707-710 |
