| 2007 |
|---|
| 9 | EE | John Dielissen,
Andries Hekstra:
Non-fractional parallelism in LDPC decoder implementations.
DATE 2007: 337-342 |
| 2006 |
|---|
| 8 | EE | John Dielissen,
Andries Hekstra,
Vincent Berg:
Low cost LDPC decoder for DVB-S2.
DATE Designers' Forum 2006: 130-135 |
| 2005 |
|---|
| 7 | EE | Kees Goossens,
John Dielissen,
Om Prakash Gangwal,
Santiago González Pestana,
Andrei Radulescu,
Edwin Rijpkema:
A Design Flow for Application-Specific Networks on Chip with Guaranteed Performance to Accelerate SOC Design and Verification.
DATE 2005: 1182-1187 |
| 6 | EE | Kees Goossens,
John Dielissen,
Andrei Radulescu:
Æthereal Network on Chip: Concepts, Architectures, and Implementations.
IEEE Design & Test of Computers 22(5): 414-421 (2005) |
| 5 | EE | Andrei Radulescu,
John Dielissen,
Santiago González Pestana,
Om Prakash Gangwal,
Edwin Rijpkema,
Paul Wielage,
Kees G. W. Goossens:
An efficient on-chip NI offering guaranteed services, shared-memory abstraction, and flexible network configuration.
IEEE Trans. on CAD of Integrated Circuits and Systems 24(1): 4-17 (2005) |
| 2004 |
|---|
| 4 | EE | Andrei Radulescu,
John Dielissen,
Kees G. W. Goossens,
Edwin Rijpkema,
Paul Wielage:
An Efficient On-Chip Network Interface Offering Guaranteed Services, Shared-Memory Abstraction, and Flexible Network Configuration.
DATE 2004: 878-883 |
| 3 | EE | Mauro Cocco,
John Dielissen,
Marc J. M. Heijligers,
Andries Hekstra,
Jos Huisken:
A Scalable Architecture for LDPC Decodin.
DATE 2004: 88-95 |
| 2003 |
|---|
| 2 | EE | Edwin Rijpkema,
Kees G. W. Goossens,
Andrei Radulescu,
John Dielissen,
Jef L. van Meerbergen,
Paul Wielage,
E. Waterlander:
Trade Offs in the Design of a Router with Both Guaranteed and Best-Effort Services for Networks on Chip.
DATE 2003: 10350-10355 |
| 2001 |
|---|
| 1 | EE | John Dielissen,
Jef L. van Meerbergen,
Marco Bekooij,
Françoise Harmsze,
Sergej Sawitzki,
Jos Huisken,
Albert van der Werf:
Power-efficient layered turbo decoder processor.
DATE 2001: 246-251 |
