2008 |
29 | EE | Yi-Hau Chen,
Shao-Yi Chien,
Ching-Yeh Chen,
Yu-Wen Huang,
Liang-Gee Chen:
Analysis and Hardware Architecture Design of Global Motion Estimation.
Signal Processing Systems 53(3): 285-300 (2008) |
28 | EE | Yi-Hau Chen,
Tung-Chien Chen,
Shao-Yi Chien,
Yu-Wen Huang,
Liang-Gee Chen:
VLSI Architecture Design of Fractional Motion Estimation for H.264/AVC.
Signal Processing Systems 53(3): 335-347 (2008) |
2007 |
27 | EE | Tung-Chien Chen,
Chuan-Yung Tsai,
Yu-Wen Huang,
Liang-Gee Chen:
Single Reference Frame Multiple Current Macroblocks Scheme for Multiple Reference Frame Motion Estimation in H.264/AVC.
IEEE Trans. Circuits Syst. Video Techn. 17(2): 242-247 (2007) |
2006 |
26 | EE | Yu-Wen Huang,
Bing-Yu Hsieh,
Shao-Yi Chien,
Shyh-Yih Ma,
Liang-Gee Chen:
Analysis and complexity reduction of multiple reference frames motion estimation in H.264/AVC.
IEEE Trans. Circuits Syst. Video Techn. 16(4): 507-522 (2006) |
25 | EE | Tung-Chien Chen,
Shao-Yi Chien,
Yu-Wen Huang,
Chen-Han Tsai,
Ching-Yeh Chen,
To-Wei Chen,
Liang-Gee Chen:
Analysis and architecture design of an HDTV720p 30 frames/s H.264/AVC encoder.
IEEE Trans. Circuits Syst. Video Techn. 16(6): 673-688 (2006) |
24 | EE | Shao-Yi Chien,
Bing-Yu Hsieh,
Yu-Wen Huang,
Shyh-Yih Ma,
Liang-Gee Chen:
Hybrid Morphology Processing Unit Architecture for Moving Object Segmentation Systems.
VLSI Signal Processing 42(3): 241-255 (2006) |
23 | EE | Yu-Wen Huang,
Ching-Yeh Chen,
Chen-Han Tsai,
Chun-Fu Shen,
Liang-Gee Chen:
Survey on Block Matching Motion Estimation Algorithms and Architectures with New Results.
VLSI Signal Processing 42(3): 297-320 (2006) |
2005 |
22 | EE | Chung-Jr Lian,
Yu-Wen Huang,
Hung-Chi Fang,
Yung-Chi Chang,
Liang-Gee Chen:
PEG, MPEG-4, and H.264 Codec IP Development.
DATE 2005: 1118-1119 |
21 | EE | Tung-Chien Chen,
Yu-Wen Huang,
Chuan-Yung Tsai,
Chao-Tsung Huang,
Liang-Gee Chen:
Single reference frame multiple current macroblocks scheme for multi-frame motion estimation in H.264/AVC.
ISCAS (2) 2005: 1790-1793 |
20 | EE | To-Wei Chen,
Yu-Wen Huang,
Tung-Chien Chen,
Yu-Han Chen,
Chuan-Yung Tsai,
Liang-Gee Chen:
Architecture design of H.264/AVC decoder with hybrid task pipelining for high definition videos.
ISCAS (3) 2005: 2931-2934 |
19 | EE | Yu-Wen Huang,
Chia-Lin Lee,
Ching-Yeh Chen,
Liang-Gee Chen:
One-pass computation-aware motion estimation with adaptive search strategy.
ISCAS (6) 2005: 5469-5472 |
18 | EE | Li-Fu Ding,
Shao-Yi Chien,
Yu-Wen Huang,
Yu-Lin Chang,
Liang-Gee Chen:
Stereo video coding system with hybrid coding based on joint prediction scheme.
ISCAS (6) 2005: 6082-6085 |
17 | EE | Yu-Wen Huang,
Bing-Yu Hsieh,
Tung-Chien Chen,
Liang-Gee Chen:
Analysis, fast algorithm, and VLSI architecture design for H.264/AVC intra frame coder.
IEEE Trans. Circuits Syst. Video Techn. 15(3): 378-401 (2005) |
2004 |
16 | | Yu-Wen Huang,
Bing-Yu Hsieh,
Tung-Chien Chen,
Liang-Gee Chen:
Hardware architecture design for H.264/AVC intra frame coder.
ISCAS (2) 2004: 269-272 |
15 | | Tung-Chien Chen,
Yu-Wen Huang,
Liang-Gee Chen:
Analysis and design of macroblock pipelining for H.264/AVC VLSI architecture.
ISCAS (2) 2004: 273-276 |
14 | | Ching-Yeh Chen,
Shao-Yi Chien,
Wei-Min Chao,
Yu-Wen Huang,
Liang-Gee Chen:
Hardware architecture for global motion estimation for MPEG-4 Advanced Simple Profile.
ISCAS (2) 2004: 301-304 |
13 | EE | Yu-Wen Huang,
Shao-Yi Chien,
Bing-Yu Hsieh,
Liang-Gee Chen:
Global elimination algorithm and architecture design for fast block matching motion estimation.
IEEE Trans. Circuits Syst. Video Techn. 14(6): 898-907 (2004) |
12 | EE | Shao-Yi Chien,
Yu-Wen Huang,
Bing-Yu Hsieh,
Shyh-Yih Ma,
Liang-Gee Chen:
Fast video segmentation algorithm with shadow cancellation, global motion compensation, and adaptive threshold techniques.
IEEE Transactions on Multimedia 6(5): 732-748 (2004) |
2003 |
11 | EE | Shao-Yi Chien,
Ching-Yeh Chen,
Wei-Min Chao,
Yu-Wen Huang,
Liang-Gee Chen:
Analysis and hardware architecture for global motion estimation in MPEG-4 Advanced Simple Profile.
ISCAS (2) 2003: 720-723 |
10 | EE | Yu-Wen Huang,
Tu-Chih Wang,
Bing-Yu Hsieh,
Liang-Gee Chen:
Hardware architecture design for variable block size motion estimation in MPEG-4 AVC/JVT/ITU-T H.264.
ISCAS (2) 2003: 796-799 |
9 | EE | Tu-Chih Wang,
Yu-Wen Huang,
Hung-Chi Fang,
Liang-Gee Chen:
Parallel 4/spl times/4 2D transform and inverse transform architecture for MPEG-4 AVC/H.264.
ISCAS (2) 2003: 800-803 |
8 | | Bing-Yu Hsieh,
Yu-Wen Huang,
Tu-Chih Wang,
Shao-Yi Chien,
Liang-Gee Chen:
Fast motion estimation algorithm for H.264/MPEG-4 AVC by using multiple reference frame skipping criteria.
VCIP 2003: 1551-1560 |
7 | | Yu-Wen Huang,
Shyh-Yih Ma,
Chun-Fu Shen,
Liang-Gee Chen:
Predictive line search: an efficient motion estimation algorithm for MPEG-4 encoding systems on multimedia processors.
IEEE Trans. Circuits Syst. Video Techn. 13(1): 111-117 (2003) |
6 | | Shao-Yi Chien,
Yu-Wen Huang,
Liang-Gee Chen:
Predictive watershed: a fast watershed algorithm for video segmentation.
IEEE Trans. Circuits Syst. Video Techn. 13(5): 453-461 (2003) |
2002 |
5 | | Shao-Yi Chien,
Ching-Yeh Chen,
Wei-Min Chao,
Chih-Wei Hsu,
Yu-Wen Huang,
Liang-Gee Chen:
A fast and high subjective quality sprite generation algorithm with frame skipping and multiple sprites techniques.
ICIP (1) 2002: 193-196 |
4 | EE | Shao-Yi Chien,
Yu-Wen Huang,
Liang-Gee Chen:
A hardware accelerator for video segmentation using programmable morphology PE array.
ISCAS (4) 2002: 341-344 |
3 | | Yu-Wen Huang,
Shao-Yi Chien,
Bing-Yu Hsieh,
Liang-Gee Chen:
Automatic threshold decision of background registration technique for video segmentation.
VCIP 2002: 552-563 |
2001 |
2 | EE | Shao-Yi Chien,
Yu-Wen Huang,
Shyh-Yih Ma,
Liang-Gee Chen:
Automatic Video Segmentation For MPEG-4 Using Predictivewatershed.
ICME 2001 |
1 | EE | Shao-Yi Chien,
Yu-Wen Huang,
Shyh-Yih Ma,
Liang-Gee Chen:
A hybrid morphology processing units architecture for real-time video segmentation systems.
ISCAS (5) 2001: 275-278 |