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Fernando Moraes
List of publications from the DBLP Bibliography Server - FAQ
2008 | ||
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59 | EE | Everton Carara, Fernando Gehm Moraes: Deadlock-Free Multicast Routing Algorithm for Wormhole-Switched Mesh Networks-on-Chip. ISVLSI 2008: 341-346 |
58 | EE | Guilherme Guindani, Cezar Reinbrecht, T. Raupp, Ney Calazans, Fernando Gehm Moraes: NoC Power Estimation at the RTL Abstraction Level. ISVLSI 2008: 475-478 |
57 | EE | Leandro Soares Indrusiak, Luciano Ost, Leandro Möller, Fernando Moraes, Manfred Glesner: Applying UML Interactions and Actor-Oriented Simulation to the Design Space Exploration of Network-on-Chip Interconnects. ISVLSI 2008: 491-494 |
56 | EE | Luciano Ost, Fernando Gehm Moraes, Leandro Möller, Leandro Soares Indrusiak, Manfred Glesner, Sanna Määttä, Jari Nurmi: A simplified executable model to evaluate latency and throughput of networks-on-chip. SBCCI 2008: 170-175 |
55 | EE | Fernando Gehm Moraes, Everton Carara, Daniel V. Pigatto, Ney Laert Vilar Calazans: MOTIM: an industrial application using nocs. SBCCI 2008: 182-187 |
2007 | ||
54 | EE | Gilles Sassatelli, Nicolas Saint-Jean, Pascal Benoit, Lionel Torres, Michel Robert, Cristiane R. Woszezenki, Ismael Grehs, Fernando Gehm Moraes: Run-time mapping and communication strategies for Homogeneous NoC-Based MPSoCs. FCCM 2007: 295-296 |
53 | EE | Julian J. H. Pontes, Rafael Soares, Ewerson Carvalho, Fernando Moraes, Ney Calazans: SCAFFI: An intrachip FPGA asynchronous interface based on hard macros. ICCD 2007: 541-546 |
52 | EE | Gilles Sassatelli, Nicolas Saint-Jean, Cristiane R. Woszezenki, Ismael Grehs, Fernando Gehm Moraes: Architectural Issues in Homogeneous NoC-Based MPSoC. IEEE International Workshop on Rapid System Prototyping 2007: 139-142 |
51 | EE | Luis Carlos Caruso, Guilherme Guindani, Hugo Schmitt, Ney Calazans, Fernando Moraes: SPP-NIDS - A Sea of Processors Platform for Network Intrusion Detection Systems. IEEE International Workshop on Rapid System Prototyping 2007: 27-33 |
50 | EE | Ewerson Carvalho, Ney Calazans, Fernando Moraes: Heuristics for Dynamic Task Mapping in NoC-based Heterogeneous MPSoCs. IEEE International Workshop on Rapid System Prototyping 2007: 34-40 |
49 | EE | Everton Carara, Aline Mello, Fernando Moraes: Communication Models in Networks-on-Chip. IEEE International Workshop on Rapid System Prototyping 2007: 57-60 |
48 | EE | Daniel Mesquita, Benoît Badrignans, Lionel Torres, Gilles Sassatelli, Michel Robert, Fernando Moraes: A Cryptographic Coarse Grain Reconfigurable Architecture Robust Against DPA. IPDPS 2007: 1-8 |
47 | EE | César A. M. Marcon, Edson I. Moreno, Ney Laert Vilar Calazans, Fernando Gehm Moraes: Evaluation of Algorithms for Low Energy Mapping onto NoCs. ISCAS 2007: 389-392 |
46 | EE | José Carlos S. Palma, Leandro Soares Indrusiak, Fernando Gehm Moraes, Alberto García Ortiz, Manfred Glesner, Ricardo A. L. Reis: Inserting Data Encoding Techniques into NoC-Based Systems. ISVLSI 2007: 299-304 |
45 | EE | Erico Bastos, Everton Carara, Daniel V. Pigatto, Ney Laert Vilar Calazans, Fernando Moraes: MOTIM - A Scalable Architecture for Ethernet Switches. ISVLSI 2007: 451-452 |
44 | EE | Ewerson Carvalho, Ney Laert Vilar Calazans, Fernando Gehm Moraes: Congestion-Aware Task Mapping in NoC-based MPSoCs with Dynamic Workload. ISVLSI 2007: 459-460 |
43 | Leandro Möller, Ismael Grehs, Ewerson Carvalho, Rafael Soares, Ney Calazans, Fernando Moraes: A NoC-based Infrastructure to Enable Dynamic Self Reconfigurable Systems. ReCoSoC 2007: 23-30 | |
42 | EE | Everton Carara, Fernando Moraes, Ney Calazans: Router architecture for high-performance NoCs. SBCCI 2007: 111-116 |
41 | EE | Leonel Tedesco, Fernando Moraes, Ney Calazans: Buffer sizing for QoS flows in wormhole packet switching NoCs. SBCCI 2007: 99-104 |
40 | EE | Alexandre M. Amory, Frederico Ferlini, Marcelo Lubaszewski, Fernando Moraes: DfT for the Reuse of Networks-on-Chip as Test Access Mechanism. VTS 2007: 435-440 |
39 | EE | César A. M. Marcon, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Igor M. Reis, Fabiano Hessel: Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique CoRR abs/0710.4738: (2007) |
38 | EE | Alexandre M. Amory, Marcelo Lubaszewski, Fernando Gehm Moraes, Edson I. Moreno: Test Time Reduction Reusing Multiple Processors in a Network-on-Chip Based Architecture CoRR abs/0710.4795: (2007) |
37 | EE | Aline Mello, Leandro Möller, Ney Calazans, Fernando Moraes: MultiNoC: A Multiprocessing System Enabled by a Network on Chip CoRR abs/0710.4843: (2007) |
2006 | ||
36 | EE | Alexandre M. Amory, Kees Goossens, Erik Jan Marinissen, Marcelo Lubaszewski, Fernando Moraes: Wrapper Design for the Reuse of Networks-on-Chip as Test Access Mechanism. European Test Symposium 2006: 213-218 |
35 | EE | Daniel Mesquita, Benoît Badrignans, Lionel Torres, Gilles Sassatelli, Michel Robert, Jean-Claude Bajard, Fernando Gehm Moraes: A Leak Resistant Architecture Against Side Channel Attacks. FPL 2006: 1-4 |
34 | EE | Leandro Möller, Ismael Grehs, Ney Calazans, Fernando Moraes: Reconfigurable Systems Enabled by a Network-on-Chip. FPL 2006: 1-4 |
33 | EE | José Carlos S. Palma, Ricardo A. L. Reis, Leandro Soares Indrusiak, Alberto García Ortiz, Manfred Glesner, Fernando Gehm Moraes: Evaluating the Impact of Data Encoding Techniques on the Power Consumption in Networks-on-Chip. ISVLSI 2006: 426-427 |
32 | EE | José Carlos S. Palma, Leandro Soares Indrusiak, Fernando Gehm Moraes, Alberto García Ortiz, Manfred Glesner, Ricardo A. L. Reis: Adaptive Coding in Networks-on-Chip: Transition Activity Reduction Versus Power Overhead of the Codec Circuitry. PATMOS 2006: 603-613 |
31 | EE | Leandro Möller, Rafael Soares, Ewerson Carvalho, Ismael Grehs, Ney Calazans, Fernando Moraes: Infrastructure for dynamic reconfigurable systems: choices and trade-offs. SBCCI 2006: 44-49 |
30 | EE | Leonel Tedesco, Aline Mello, Leonardo Giacomet, Ney Calazans, Fernando Gehm Moraes: Application driven traffic modeling for NoCs. SBCCI 2006: 62-67 |
2005 | ||
29 | EE | Luciano Ost, Aline Mello, José Palma, Fernando Gehm Moraes, Ney Calazans: MAIA: a framework for networks on chip generation and verification. ASP-DAC 2005: 49-52 |
28 | EE | César A. M. Marcon, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Igor M. Reis, Fabiano Hessel: Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique. DATE 2005: 502-507 |
27 | EE | Alexandre M. Amory, Marcelo Lubaszewski, Fernando Gehm Moraes, Edson I. Moreno: Test Time Reduction Reusing Multiple Processors in a Network-on-Chip Based Architecture. DATE 2005: 62-63 |
26 | Daniel Mesquita, Jean-Denis Techer, Lionel Torres, Gilles Sassatelli, Gaston Cambon, Michel Robert, Fernando Moraes: A new hardware countermeasure for masking power signatures of crypto cores. ReCoSoC 2005: 169-176 | |
25 | EE | Daniel Mesquita, Jean-Denis Techer, Lionel Torres, Gilles Sassatelli, Gaston Cambon, Michel Robert, Fernando Moraes: Current mask generation: a transistor level security against DPA attacks. SBCCI 2005: 115-120 |
24 | EE | Aline Mello, Leonel Tedesco, Ney Calazans, Fernando Moraes: Virtual channels in networks on chip: implementation and evaluation on hermes NoC. SBCCI 2005: 178-183 |
23 | EE | Leonel Tedesco, Aline Mello, Diego Garibotti, Ney Calazans, Fernando Moraes: Traffic generation and performance evaluation for mesh-based NoCs. SBCCI 2005: 184-189 |
22 | EE | José Carlos S. Palma, César A. M. Marcon, Fernando Gehm Moraes, Ney Laert Vilar Calazans, Ricardo A. L. Reis, Altamiro Amadeu Susin: Mapping embedded systems onto NoCs: the traffic effect on dynamic energy estimation. SBCCI 2005: 196-201 |
21 | EE | César A. M. Marcon, José Carlos S. Palma, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Ricardo Augusto da Luz Reis: Modeling the Traffic Effect for the Application Cores Mapping Problem onto NoCs. VLSI-SoC 2005: 179-194 |
20 | EE | Daniel Mesquita, Jean-Denis Techer, Lionel Torres, Michel Robert, Guy Cathebras, Gilles Sassatelli, Fernando Gehm Moraes: Current Mask Generation: an Analog Circuit to Thwart DPA Attacks. VLSI-SoC 2005: 317-330 |
2004 | ||
19 | EE | Aline Mello, Leandro Möller, Ney Calazans, Fernando Gehm Moraes: MultiNoC: A Multiprocessing System Enabled by a Network on Chip. DATE 2004: 234-239 |
18 | EE | Aline Mello, Leandro Möller, Ney Calazans, Fernando Gehm Moraes: MultiNoC: A Multiprocessing System Enabled by a Network on Chip. DATE 2004: 234-239 |
17 | EE | Leandro Möller, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Eduardo Wenzel Brião, Ewerson Carvalho, Daniel Camozzato: FiPRe: An Implementation Model to Enable Self-Reconfigurable Applications. FPL 2004: 1042-1046 |
16 | EE | Ewerson Carvalho, Ney Calazans, Eduardo Wenzel Brião, Fernando Moraes: PaDReH: a framework for the design and implementation of dynamically and partially reconfigurable systems. SBCCI 2004: 10-15 |
15 | EE | Alexandre M. Amory, Érika F. Cota, Marcelo Lubaszewski, Fernando Gehm Moraes: Reducing test time with processor reuse in network-on-chip based systems. SBCCI 2004: 111-116 |
14 | EE | Fernando Gehm Moraes, Ney Calazans, Aline Mello, Leandro Möller, Luciano Ost: HERMES: an infrastructure for low area overhead packet-switching networks on chip. Integration 38(1): 69-93 (2004) |
2003 | ||
13 | EE | Fernando Gehm Moraes, Daniel Mesquita, José Carlos S. Palma, Leandro Möller, Ney Laert Vilar Calazans: Development of a Tool-Set for Remote and Partial Reconfiguration of FPGAs. DATE 2003: 11122-11123 |
12 | EE | Vanderlei Bonato, Rolf Fredi Molz, João Carlos Furtado, Marcos Flôres Ferrão, Fernando Gehm Moraes: Design of a fingerprint system using a hardware/software environment. FPGA 2003: 240 |
11 | EE | Vanderlei Bonato, Rolf Fredi Molz, João Carlos Furtado, Marcos Flôres Ferrão, Fernando Gehm Moraes: Propose of a Hardware Implementation for Fingerprint Systems. FPL 2003: 1158-1161 |
10 | EE | Daniel Mesquita, Fernando Gehm Moraes, José Palma, Leandro Möller, Ney Laert Vilar Calazans: Remote and Partial Reconfiguration of FPGAs: Tools and Trends. IPDPS 2003: 177 |
9 | EE | Luigi Carro, Edgard de Faria Corrêa, R. Cardozo, Fernando Moraes, Sergio Bampi: Exploiting reconfigurability for low-power control of embedded processors. ISCAS (5) 2003: 421-424 |
8 | EE | Sandro Ferreira, Felipe Haffner, Luis Fernando Pereira, Fernando Moraes: Design and Prototyping of Direct Torque Control of Induction Motors in FPGAs. SBCCI 2003: 105-110 |
7 | EE | Ney Laert Vilar Calazans, Edson I. Moreno, Fabiano Hessel, Vitor M. da Rosa, Fernando Moraes, Everton Carara: From VHDL Register Transfer Level to SystemC Transaction Level Modeling: A Comparative Case Study. SBCCI 2003: 355- |
6 | Alexandre M. Amory, Leandro A. Oliveira, Fernando Gehm Moraes: Software-Based Test for Non-Programmable Cores in Bus-Based System-on-Chip Architectures. VLSI-SOC 2003: 174-179 | |
5 | Daniel Mesquita, Lionel Torres, Fernando Gehm Moraes, Gilles Sassatelli, Michel Robert: Are coarse grain reconfigurable architectures suitable for cryptography? VLSI-SOC 2003: 276-281 | |
4 | Fernando Gehm Moraes, Aline Mello, Leandro Möller, Luciano Ost, Ney Laert Vilar Calazans: A Low Area Overhead Packet-switched Network on Chip: Architecture and Prototyping. VLSI-SOC 2003: 318-323 | |
2001 | ||
3 | Ney Laert Vilar Calazans, Fernando Gehm Moraes, Delfim Luiz Torok, Andrey V. Andreoli: Projeto para Prototipação de um IP Soft Core MAC Ethernet. RITA 8(1): 23-41 (2001) | |
1999 | ||
2 | Fernando Moraes, Michel Robert, Daniel Auvergne: A Virtual CMOS Library Approach for East Layout Synthesis. VLSI 1999: 415-426 | |
1994 | ||
1 | Michel Robert, Lionel Torres, Fernando Moraes, Daniel Auvergne: Influence of Locig Block Layout Architecture on FPGA Performance. FPL 1994: 34-44 |