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Fernando Gehm Moraes

Fernando Moraes

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2008
59EEEverton Carara, Fernando Gehm Moraes: Deadlock-Free Multicast Routing Algorithm for Wormhole-Switched Mesh Networks-on-Chip. ISVLSI 2008: 341-346
58EEGuilherme Guindani, Cezar Reinbrecht, T. Raupp, Ney Calazans, Fernando Gehm Moraes: NoC Power Estimation at the RTL Abstraction Level. ISVLSI 2008: 475-478
57EELeandro Soares Indrusiak, Luciano Ost, Leandro Möller, Fernando Moraes, Manfred Glesner: Applying UML Interactions and Actor-Oriented Simulation to the Design Space Exploration of Network-on-Chip Interconnects. ISVLSI 2008: 491-494
56EELuciano Ost, Fernando Gehm Moraes, Leandro Möller, Leandro Soares Indrusiak, Manfred Glesner, Sanna Määttä, Jari Nurmi: A simplified executable model to evaluate latency and throughput of networks-on-chip. SBCCI 2008: 170-175
55EEFernando Gehm Moraes, Everton Carara, Daniel V. Pigatto, Ney Laert Vilar Calazans: MOTIM: an industrial application using nocs. SBCCI 2008: 182-187
2007
54EEGilles Sassatelli, Nicolas Saint-Jean, Pascal Benoit, Lionel Torres, Michel Robert, Cristiane R. Woszezenki, Ismael Grehs, Fernando Gehm Moraes: Run-time mapping and communication strategies for Homogeneous NoC-Based MPSoCs. FCCM 2007: 295-296
53EEJulian J. H. Pontes, Rafael Soares, Ewerson Carvalho, Fernando Moraes, Ney Calazans: SCAFFI: An intrachip FPGA asynchronous interface based on hard macros. ICCD 2007: 541-546
52EEGilles Sassatelli, Nicolas Saint-Jean, Cristiane R. Woszezenki, Ismael Grehs, Fernando Gehm Moraes: Architectural Issues in Homogeneous NoC-Based MPSoC. IEEE International Workshop on Rapid System Prototyping 2007: 139-142
51EELuis Carlos Caruso, Guilherme Guindani, Hugo Schmitt, Ney Calazans, Fernando Moraes: SPP-NIDS - A Sea of Processors Platform for Network Intrusion Detection Systems. IEEE International Workshop on Rapid System Prototyping 2007: 27-33
50EEEwerson Carvalho, Ney Calazans, Fernando Moraes: Heuristics for Dynamic Task Mapping in NoC-based Heterogeneous MPSoCs. IEEE International Workshop on Rapid System Prototyping 2007: 34-40
49EEEverton Carara, Aline Mello, Fernando Moraes: Communication Models in Networks-on-Chip. IEEE International Workshop on Rapid System Prototyping 2007: 57-60
48EEDaniel Mesquita, Benoît Badrignans, Lionel Torres, Gilles Sassatelli, Michel Robert, Fernando Moraes: A Cryptographic Coarse Grain Reconfigurable Architecture Robust Against DPA. IPDPS 2007: 1-8
47EECésar A. M. Marcon, Edson I. Moreno, Ney Laert Vilar Calazans, Fernando Gehm Moraes: Evaluation of Algorithms for Low Energy Mapping onto NoCs. ISCAS 2007: 389-392
46EEJosé Carlos S. Palma, Leandro Soares Indrusiak, Fernando Gehm Moraes, Alberto García Ortiz, Manfred Glesner, Ricardo A. L. Reis: Inserting Data Encoding Techniques into NoC-Based Systems. ISVLSI 2007: 299-304
45EEErico Bastos, Everton Carara, Daniel V. Pigatto, Ney Laert Vilar Calazans, Fernando Moraes: MOTIM - A Scalable Architecture for Ethernet Switches. ISVLSI 2007: 451-452
44EEEwerson Carvalho, Ney Laert Vilar Calazans, Fernando Gehm Moraes: Congestion-Aware Task Mapping in NoC-based MPSoCs with Dynamic Workload. ISVLSI 2007: 459-460
43 Leandro Möller, Ismael Grehs, Ewerson Carvalho, Rafael Soares, Ney Calazans, Fernando Moraes: A NoC-based Infrastructure to Enable Dynamic Self Reconfigurable Systems. ReCoSoC 2007: 23-30
42EEEverton Carara, Fernando Moraes, Ney Calazans: Router architecture for high-performance NoCs. SBCCI 2007: 111-116
41EELeonel Tedesco, Fernando Moraes, Ney Calazans: Buffer sizing for QoS flows in wormhole packet switching NoCs. SBCCI 2007: 99-104
40EEAlexandre M. Amory, Frederico Ferlini, Marcelo Lubaszewski, Fernando Moraes: DfT for the Reuse of Networks-on-Chip as Test Access Mechanism. VTS 2007: 435-440
39EECésar A. M. Marcon, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Igor M. Reis, Fabiano Hessel: Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique CoRR abs/0710.4738: (2007)
38EEAlexandre M. Amory, Marcelo Lubaszewski, Fernando Gehm Moraes, Edson I. Moreno: Test Time Reduction Reusing Multiple Processors in a Network-on-Chip Based Architecture CoRR abs/0710.4795: (2007)
37EEAline Mello, Leandro Möller, Ney Calazans, Fernando Moraes: MultiNoC: A Multiprocessing System Enabled by a Network on Chip CoRR abs/0710.4843: (2007)
2006
36EEAlexandre M. Amory, Kees Goossens, Erik Jan Marinissen, Marcelo Lubaszewski, Fernando Moraes: Wrapper Design for the Reuse of Networks-on-Chip as Test Access Mechanism. European Test Symposium 2006: 213-218
35EEDaniel Mesquita, Benoît Badrignans, Lionel Torres, Gilles Sassatelli, Michel Robert, Jean-Claude Bajard, Fernando Gehm Moraes: A Leak Resistant Architecture Against Side Channel Attacks. FPL 2006: 1-4
34EELeandro Möller, Ismael Grehs, Ney Calazans, Fernando Moraes: Reconfigurable Systems Enabled by a Network-on-Chip. FPL 2006: 1-4
33EEJosé Carlos S. Palma, Ricardo A. L. Reis, Leandro Soares Indrusiak, Alberto García Ortiz, Manfred Glesner, Fernando Gehm Moraes: Evaluating the Impact of Data Encoding Techniques on the Power Consumption in Networks-on-Chip. ISVLSI 2006: 426-427
32EEJosé Carlos S. Palma, Leandro Soares Indrusiak, Fernando Gehm Moraes, Alberto García Ortiz, Manfred Glesner, Ricardo A. L. Reis: Adaptive Coding in Networks-on-Chip: Transition Activity Reduction Versus Power Overhead of the Codec Circuitry. PATMOS 2006: 603-613
31EELeandro Möller, Rafael Soares, Ewerson Carvalho, Ismael Grehs, Ney Calazans, Fernando Moraes: Infrastructure for dynamic reconfigurable systems: choices and trade-offs. SBCCI 2006: 44-49
30EELeonel Tedesco, Aline Mello, Leonardo Giacomet, Ney Calazans, Fernando Gehm Moraes: Application driven traffic modeling for NoCs. SBCCI 2006: 62-67
2005
29EELuciano Ost, Aline Mello, José Palma, Fernando Gehm Moraes, Ney Calazans: MAIA: a framework for networks on chip generation and verification. ASP-DAC 2005: 49-52
28EECésar A. M. Marcon, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Igor M. Reis, Fabiano Hessel: Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique. DATE 2005: 502-507
27EEAlexandre M. Amory, Marcelo Lubaszewski, Fernando Gehm Moraes, Edson I. Moreno: Test Time Reduction Reusing Multiple Processors in a Network-on-Chip Based Architecture. DATE 2005: 62-63
26 Daniel Mesquita, Jean-Denis Techer, Lionel Torres, Gilles Sassatelli, Gaston Cambon, Michel Robert, Fernando Moraes: A new hardware countermeasure for masking power signatures of crypto cores. ReCoSoC 2005: 169-176
25EEDaniel Mesquita, Jean-Denis Techer, Lionel Torres, Gilles Sassatelli, Gaston Cambon, Michel Robert, Fernando Moraes: Current mask generation: a transistor level security against DPA attacks. SBCCI 2005: 115-120
24EEAline Mello, Leonel Tedesco, Ney Calazans, Fernando Moraes: Virtual channels in networks on chip: implementation and evaluation on hermes NoC. SBCCI 2005: 178-183
23EELeonel Tedesco, Aline Mello, Diego Garibotti, Ney Calazans, Fernando Moraes: Traffic generation and performance evaluation for mesh-based NoCs. SBCCI 2005: 184-189
22EEJosé Carlos S. Palma, César A. M. Marcon, Fernando Gehm Moraes, Ney Laert Vilar Calazans, Ricardo A. L. Reis, Altamiro Amadeu Susin: Mapping embedded systems onto NoCs: the traffic effect on dynamic energy estimation. SBCCI 2005: 196-201
21EECésar A. M. Marcon, José Carlos S. Palma, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Ricardo Augusto da Luz Reis: Modeling the Traffic Effect for the Application Cores Mapping Problem onto NoCs. VLSI-SoC 2005: 179-194
20EEDaniel Mesquita, Jean-Denis Techer, Lionel Torres, Michel Robert, Guy Cathebras, Gilles Sassatelli, Fernando Gehm Moraes: Current Mask Generation: an Analog Circuit to Thwart DPA Attacks. VLSI-SoC 2005: 317-330
2004
19EEAline Mello, Leandro Möller, Ney Calazans, Fernando Gehm Moraes: MultiNoC: A Multiprocessing System Enabled by a Network on Chip. DATE 2004: 234-239
18EEAline Mello, Leandro Möller, Ney Calazans, Fernando Gehm Moraes: MultiNoC: A Multiprocessing System Enabled by a Network on Chip. DATE 2004: 234-239
17EELeandro Möller, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Eduardo Wenzel Brião, Ewerson Carvalho, Daniel Camozzato: FiPRe: An Implementation Model to Enable Self-Reconfigurable Applications. FPL 2004: 1042-1046
16EEEwerson Carvalho, Ney Calazans, Eduardo Wenzel Brião, Fernando Moraes: PaDReH: a framework for the design and implementation of dynamically and partially reconfigurable systems. SBCCI 2004: 10-15
15EEAlexandre M. Amory, Érika F. Cota, Marcelo Lubaszewski, Fernando Gehm Moraes: Reducing test time with processor reuse in network-on-chip based systems. SBCCI 2004: 111-116
14EEFernando Gehm Moraes, Ney Calazans, Aline Mello, Leandro Möller, Luciano Ost: HERMES: an infrastructure for low area overhead packet-switching networks on chip. Integration 38(1): 69-93 (2004)
2003
13EEFernando Gehm Moraes, Daniel Mesquita, José Carlos S. Palma, Leandro Möller, Ney Laert Vilar Calazans: Development of a Tool-Set for Remote and Partial Reconfiguration of FPGAs. DATE 2003: 11122-11123
12EEVanderlei Bonato, Rolf Fredi Molz, João Carlos Furtado, Marcos Flôres Ferrão, Fernando Gehm Moraes: Design of a fingerprint system using a hardware/software environment. FPGA 2003: 240
11EEVanderlei Bonato, Rolf Fredi Molz, João Carlos Furtado, Marcos Flôres Ferrão, Fernando Gehm Moraes: Propose of a Hardware Implementation for Fingerprint Systems. FPL 2003: 1158-1161
10EEDaniel Mesquita, Fernando Gehm Moraes, José Palma, Leandro Möller, Ney Laert Vilar Calazans: Remote and Partial Reconfiguration of FPGAs: Tools and Trends. IPDPS 2003: 177
9EELuigi Carro, Edgard de Faria Corrêa, R. Cardozo, Fernando Moraes, Sergio Bampi: Exploiting reconfigurability for low-power control of embedded processors. ISCAS (5) 2003: 421-424
8EESandro Ferreira, Felipe Haffner, Luis Fernando Pereira, Fernando Moraes: Design and Prototyping of Direct Torque Control of Induction Motors in FPGAs. SBCCI 2003: 105-110
7EENey Laert Vilar Calazans, Edson I. Moreno, Fabiano Hessel, Vitor M. da Rosa, Fernando Moraes, Everton Carara: From VHDL Register Transfer Level to SystemC Transaction Level Modeling: A Comparative Case Study. SBCCI 2003: 355-
6 Alexandre M. Amory, Leandro A. Oliveira, Fernando Gehm Moraes: Software-Based Test for Non-Programmable Cores in Bus-Based System-on-Chip Architectures. VLSI-SOC 2003: 174-179
5 Daniel Mesquita, Lionel Torres, Fernando Gehm Moraes, Gilles Sassatelli, Michel Robert: Are coarse grain reconfigurable architectures suitable for cryptography? VLSI-SOC 2003: 276-281
4 Fernando Gehm Moraes, Aline Mello, Leandro Möller, Luciano Ost, Ney Laert Vilar Calazans: A Low Area Overhead Packet-switched Network on Chip: Architecture and Prototyping. VLSI-SOC 2003: 318-323
2001
3 Ney Laert Vilar Calazans, Fernando Gehm Moraes, Delfim Luiz Torok, Andrey V. Andreoli: Projeto para Prototipação de um IP Soft Core MAC Ethernet. RITA 8(1): 23-41 (2001)
1999
2 Fernando Moraes, Michel Robert, Daniel Auvergne: A Virtual CMOS Library Approach for East Layout Synthesis. VLSI 1999: 415-426
1994
1 Michel Robert, Lionel Torres, Fernando Moraes, Daniel Auvergne: Influence of Locig Block Layout Architecture on FPGA Performance. FPL 1994: 34-44

Coauthor Index

1Alexandre M. Amory [6] [15] [27] [36] [38] [40]
2Andrey V. Andreoli [3]
3Daniel Auvergne [1] [2]
4Benoît Badrignans [35] [48]
5Jean-Claude Bajard [35]
6Sergio Bampi [9]
7Erico Bastos [45]
8Pascal Benoit [54]
9Vanderlei Bonato [11] [12]
10Eduardo Wenzel Brião [16] [17]
11Ney Laert Vilar Calazans (Ney Calazans) [3] [4] [7] [10] [13] [14] [16] [17] [18] [19] [21] [22] [23] [24] [28] [29] [30] [31] [34] [37] [39] [41] [42] [43] [44] [45] [47] [50] [51] [53] [55] [58]
12Gaston Cambon [25] [26]
13Daniel Camozzato [17]
14Everton Carara [7] [42] [45] [49] [55] [59]
15R. Cardozo [9]
16Luigi Carro [9]
17Luis Carlos Caruso [51]
18Ewerson Carvalho [16] [17] [31] [43] [44] [50] [53]
19Guy Cathebras [20]
20Edgard de Faria Corrêa [9]
21Érika F. Cota [15]
22Frederico Ferlini [40]
23Marcos Flôres Ferrão [11] [12]
24Sandro Ferreira [8]
25João Carlos Furtado [11] [12]
26Diego Garibotti [23]
27Leonardo Giacomet [30]
28Manfred Glesner [32] [33] [46] [56] [57]
29Kees G. W. Goossens (Kees Goossens) [36]
30Ismael Grehs [31] [34] [43] [52] [54]
31Guilherme Guindani [51] [58]
32Felipe Haffner [8]
33Fabiano Hessel [7] [28] [39]
34Leandro Soares Indrusiak [32] [33] [46] [56] [57]
35Marcelo Lubaszewski [15] [27] [36] [38] [40]
36Sanna Määttä [56]
37César A. M. Marcon [21] [22] [28] [39] [47]
38Erik Jan Marinissen [36]
39Aline Mello [4] [14] [18] [19] [23] [24] [29] [30] [37] [49]
40Daniel Mesquita [5] [10] [13] [20] [25] [26] [35] [48]
41Leandro Möller [4] [10] [13] [14] [17] [18] [19] [31] [34] [37] [43] [56] [57]
42Rolf Fredi Molz [11] [12]
43Edson I. Moreno [7] [27] [38] [47]
44Jari Nurmi [56]
45Leandro A. Oliveira [6]
46Alberto García Ortiz [32] [33] [46]
47Luciano Ost [4] [14] [29] [56] [57]
48José Palma [10] [29]
49José Carlos S. Palma [13] [21] [22] [32] [33] [46]
50Luis Fernando Pereira [8]
51Daniel V. Pigatto [45] [55]
52Julian J. H. Pontes [53]
53T. Raupp [58]
54Cezar Reinbrecht [58]
55Igor M. Reis [28] [39]
56Ricardo Augusto da Luz Reis (Ricardo A. L. Reis, Ricardo Reis) [21] [22] [32] [33] [46]
57Michel Robert [1] [2] [5] [20] [25] [26] [35] [48] [54]
58Vitor M. da Rosa [7]
59Nicolas Saint-Jean [52] [54]
60Gilles Sassatelli [5] [20] [25] [26] [35] [48] [52] [54]
61Hugo Schmitt [51]
62Rafael Soares [31] [43] [53]
63Altamiro Amadeu Susin [21] [22] [28] [39]
64Jean-Denis Techer [20] [25] [26]
65Leonel Tedesco [23] [24] [30] [41]
66Delfim Luiz Torok [3]
67Lionel Torres [1] [5] [20] [25] [26] [35] [48] [54]
68Cristiane R. Woszezenki [52] [54]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)