Walter Stechele

2008
32	EE	Josef Angermeier, Ulrich Batzer, Mateusz Majer, Jürgen Teich, Christopher Claus, Walter Stechele: Reconfigurable HW/SW Architecture of a Real-Time Driver Assistance System. ARC 2008: 148-158
31	EE	Jürgen Becker, Michael Hübner, Robert Esser, Andreas Herkersdorf, Walter Stechele, Vera Lauer: Design Flows, Communication Based Design and Architectures in Automotive Electronic Systems. DATE 2008
30	EE	Nicolas Alt, Christopher Claus, Walter Stechele: Hardware/software architecture of an algorithm for vision-based real-time vehicle detection in dark environments. DATE 2008: 176-181
29	EE	Josef Angermeier, Mateusz Majer, Jürgen Teich, Lars Braun, T. Schwalb, Philipp Graf, Michael Hübner, Jürgen Becker, Enno Lübbers, Marco Platzner, Christopher Claus, Walter Stechele, Andreas Herkersdorf, Markus Rullmann, Renate Merker: Fine grain reconfigurable architectures. FPL 2008: 348
28	EE	Christopher Claus, Bin Zhang, Walter Stechele, Lars Braun, Michael Hübner, Jürgen Becker: A multi-platform controller allowing for maximum Dynamic Partial Reconfiguration throughput. FPL 2008: 535-538
27	EE	Christopher Claus, Walter Stechele, Matthias Kovatsch, Josef Angermeier, Jürgen Teich: A comparison of embedded reconfigurable video-processing architectures. FPL 2008: 587-590
26		Andreas Herkersdorf, Walter Stechele, Christian Müller-Schloer, Hartmut Schmeck: Workshop "Adaptive and Organic Systems". GI Jahrestagung (2) 2008: 731-732
25		Johannes Zeppenfeld, Abdelmajid Bouajila, Walter Stechele, Andreas Herkersdorf: Learning Classifier Tables for Autonomic Systems on Chip. GI Jahrestagung (2) 2008: 771-778
2007
24	EE	Christopher Claus, Johannes Zeppenfeld, Florian Helmut Müller, Walter Stechele: Using partial-run-time reconfigurable hardware to accelerate video processing in driver assistance system. DATE 2007: 498-503
23	EE	Christopher Claus, Florian Helmut Müller, Johannes Zeppenfeld, Walter Stechele: A new framework to accelerate Virtex-II Pro dynamic partial self-reconfiguration. IPDPS 2007: 1-7
22	EE	Michael Hübner, Lars Braun, Jürgen Becker, Christopher Claus, Walter Stechele: Physical Configuration On-Line Visualization of Xilinx Virtex-II FPGAs. ISVLSI 2007: 41-46
21	EE	Walter Stechele, L. Alvado Cárcel, Stephan Herrmann, J. Lidón Simón: A Coprocessor for Accelerating Visual Information Processing CoRR abs/0710.4823: (2007)
20	EE	Christopher Claus, Walter Stechele, Andreas Herkersdorf: Autovision - A Run-time Reconfigurable MPSoC Architecture for Future Driver Assistance Systems (Autovision - Eine zur Laufzeit rekonfigurierbare MPSoC Architektur für zukünftige Fahrerassistenzsysteme). it - Information Technology 49(3): 181- (2007)
2006
19		Christopher Claus, Florian Helmut Müller, Walter Stechele: Combitgen: A new approach for creating partial bitstreams in Virtex-II Pro. ARCS Workshops 2006: 122-131
18	EE	Abdelmajid Bouajila, Andreas Bernauer, Andreas Herkersdorf, Wolfgang Rosenstiel, Oliver Bringmann, Walter Stechele: Error Detection Techniques Applicable in an Architecture Framework and Design Methodology for Autonomic SoCs. BICC 2006: 107-113
17	EE	Andreas Herkersdorf, Walter Stechele: AutoVision: flexible processor architecture for video-assisted driving. DATE 2006: 556
16	EE	Walter Stechele: Dynamically Reconfigurable Systems-on-Chip. Dynamically Reconfigurable Architectures 2006
15		Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel, Abdelmajid Bouajila, Walter Stechele, Andreas Herkersdorf: An Architecture for Runtime Evaluation of SoC Reliability. GI Jahrestagung (1) 2006: 177-
14	EE	Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel: Organic Computing at the System on Chip Level. VLSI-SoC 2006: 338-341
2005
13		Gabriel Lipsa, Andreas Herkersdorf, Wolfgang Rosenstiel, Oliver Bringmann, Walter Stechele: Towards a Framework and a Design Methodology for Autonomous SoC. ARCS Workshops 2005: 101-108
12	EE	Walter Stechele, L. Alvado Cárcel, Stephan Herrmann, J. Lidón Simón: A Coprocessor for Accelerating Visual Information Processing. DATE 2005: 26-31
11	EE	Paul Zuber, Armin Windschiegl, Raúl Medina Beltán de Otálora, Walter Stechele, Andreas Herkersdorf: Reduction of CMOS Power Consumption and Signal Integrity Issues by Routing Optimization. DATE 2005: 986-987
10		Paul Zuber, Florian Helmut Müller, Walter Stechele: Optimization Potential of CMOS Power by Wire Spacing. GI Jahrestagung (1) 2005: 344-348
9	EE	Gabriel Lipsa, Andreas Herkersdorf, Wolfgang Rosenstiel, Oliver Bringmann, Walter Stechele: Towards a Framework and a Design Methodology for Autonomic SoC. ICAC 2005: 391-392
8	EE	Paul Zuber, Peter Gritzmann, Michael Ritter, Walter Stechele: The Optimal Wire Order for Low Power CMOS. PATMOS 2005: 674-683
2004
7		Walter Stechele, Stephan Herrmann, Andreas Herkersdorf: Towards a Dynamically Reconfigurable System-on-Chip Platform for Video Signal Processing. ARCS Workshops 2004: 225-234
2003
6	EE	Walter Stechele: Performance Optimization of Color Segmentation Algorithms. SIP 2003: 292-297
2002
5	EE	Ulrich Niedermeier, Jörg Heuer, Andreas Hutter, Walter Stechele: MPEG-7 Binary Format for XML Dat. DCC 2002: 467
4	EE	Michael Eiermann, Walter Stechele: Novel modeling techniques for RTL power estimation. ISLPED 2002: 323-328
3	EE	Torsten Mahnke, Walter Stechele, Wolfgang Hoeld: Dual Supply Voltage Scaling in a Conventional Power-Driven Logic Synthesis Environment. PATMOS 2002: 146-155
2	EE	Armin Windschiegl, Paul Zuber, Walter Stechele: Exploiting Metal Layer Characteristics for Low-Power Routing. PATMOS 2002: 55-64
1997
1	EE	Peter M. Kuhn, Andreas Weisgerber, Robert Poppenwimmer, Walter Stechele: A flexible VLSI architecture for variable block size segment matching with luminance correction. ASAP 1997: 479-488

Coauthor Index

1	Nicolas Alt	[30]
2	Josef Angermeier	[27] [29] [32]
3	Ulrich Batzer	[32]
4	Jürgen Becker	[22] [28] [29] [31]
5	Andreas Bernauer	[14] [15] [18]
6	Abdelmajid Bouajila	[14] [15] [18] [25]
7	Lars Braun	[22] [28] [29]
8	Oliver Bringmann	[9] [13] [14] [15] [18]
9	L. Alvado Cárcel	[12] [21]
10	Christopher Claus	[19] [20] [22] [23] [24] [27] [28] [29] [30] [32]
11	Michael Eiermann	[4]
12	Robert Esser	[31]
13	Philipp Graf	[29]
14	Peter Gritzmann	[8]
15	Andreas Herkersdorf	[7] [9] [11] [13] [14] [15] [17] [18] [20] [25] [26] [29] [31]
16	Stephan Herrmann	[7] [12] [21]
17	Jörg Heuer	[5]
18	Wolfgang Hoeld	[3]
19	Michael Hübner	[22] [28] [29] [31]
20	Andreas Hutter	[5]
21	Matthias Kovatsch	[27]
22	Peter M. Kuhn	[1]
23	Vera Lauer	[31]
24	Gabriel Lipsa	[9] [13]
25	Enno Lübbers	[29]
26	Torsten Mahnke	[3]
27	Mateusz Majer	[29] [32]
28	Renate Merker	[29]
29	Florian Helmut Müller	[10] [19] [23] [24]
30	Christian Müller-Schloer	[26]
31	Ulrich Niedermeier	[5]
32	Raúl Medina Beltán de Otálora	[11]
33	Marco Platzner	[29]
34	Robert Poppenwimmer	[1]
35	Michael Ritter	[8]
36	Wolfgang Rosenstiel	[9] [13] [14] [15] [18]
37	Markus Rullmann	[29]
38	Hartmut Schmeck	[26]
39	T. Schwalb	[29]
40	J. Lidón Simón	[12] [21]
41	Jürgen Teich	[27] [29] [32]
42	Andreas Weisgerber	[1]
43	Armin Windschiegl	[2] [11]
44	Johannes Zeppenfeld	[14] [23] [24] [25]
45	Bin Zhang	[28]
46	Paul Zuber	[2] [8] [10] [11]

Colors in the list of coauthors