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Yuejian Wu

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2008
19EEYuejian Wu, Sandy Thomson, Han Sun, Chandra Bontu, Eric Hall: Built-in functional tests for fast validation of a 40Gbps coherent optical receiver SoC ASIC. SoCC 2008: 55-58
2007
18EEBaosheng Wang, Yuejian Wu, André Ivanov: A Fast Diagnosis Scheme for Distributed Small Embedded SRAMs CoRR abs/0710.4655: (2007)
2006
17EEYuejian Wu, André Ivanov: Low Power SoC Memory BIST. DFT 2006: 197-205
16EEJosh Yang, Baosheng Wang, Yuejian Wu, André Ivanov: Fast detection of data retention faults and other SRAM cell open defects. IEEE Trans. on CAD of Integrated Circuits and Systems 25(1): 167-180 (2006)
2005
15EEBaosheng Wang, Josh Yang, Yuejian Wu, André Ivanov: A retention-aware test power model for embedded SRAM. ASP-DAC 2005: 1180-1183
14EEBaosheng Wang, Yuejian Wu, André Ivanov: A Fast Diagnosis Scheme for Distributed Small Embedded SRAMs. DATE 2005: 852-857
13EEBaosheng Wang, Yuejian Wu, Josh Yang, André Ivanov, Yervant Zorian: SRAM Retention Testing: Zero Incremental Time Integration with March Algorithms. VTS 2005: 66-71
2004
12EEBaosheng Wang, Yuejian Wu, André Ivanov: Designs for Reducing Test Time of Distributed Small Embedded SRAMs. DFT 2004: 120-128
11 Yuejian Wu: Low power decoding of BCH codes. ISCAS (2) 2004: 369-372
2003
10EEYuejian Wu, Paul N. MacDonald: Testing ASICs with multiple identical cores. IEEE Trans. on CAD of Integrated Circuits and Systems 22(3): 327-336 (2003)
2002
9EERobert Gibbins, R. Dean Adams, Thomas J. Eckenrode, Michael Ouellette, Yuejian Wu: Design and Test of a 9-port SRAM for a 100Gb/s STS-1 Switch. MTDT 2002: 83-
2001
8 Yuejian Wu, Liviu Calin: Shadow write and read for at-speed BIST of TDM SRAMs. ITC 2001: 985-994
1999
7 Yuejian Wu, Paul Soong: Interconnect delay fault testing with IEEE 1149.1. ITC 1999: 449-457
6EEYuejian Wu, Saman Adham: Scan-based BIST fault diagnosis. IEEE Trans. on CAD of Integrated Circuits and Systems 18(2): 203-211 (1999)
1998
5EEYuejian Wu: Diagnosis of Scan Chain Failures. DFT 1998: 217-
1997
4EEYuejian Wu, Sanjay Gupta: Built-In Self-Test for Multi-Port RAMs. Asian Test Symposium 1997: 398-403
1996
3 Yuejian Wu, Saman Adham: BIST Fault Diagnosis in Scan-Based VLSI Environments. ITC 1996: 48-57
1995
2EEYuejian Wu, André Ivanov: Reducing Hardware with Fuzzy Multiple Signature Analysis. IEEE Design & Test of Computers 12(1): 68-74 (1995)
1 Yuejian Wu, André Ivanov: Single-Reference Multiple Intermediate Signature (SREMIS) Analysis for BIST. IEEE Trans. Computers 44(6): 817-825 (1995)

Coauthor Index

1R. Dean Adams [9]
2Saman Adham [3] [6]
3Chandra Bontu [19]
4Liviu Calin [8]
5Thomas J. Eckenrode [9]
6Robert Gibbins [9]
7Sanjay Gupta [4]
8Eric Hall [19]
9André Ivanov [1] [2] [12] [13] [14] [15] [16] [17] [18]
10Paul N. MacDonald [10]
11Michael Ouellette [9]
12Paul Soong [7]
13Han Sun [19]
14Sandy Thomson [19]
15Baosheng Wang [12] [13] [14] [15] [16] [18]
16Josh Yang [13] [15] [16]
17Yervant Zorian [13]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)