João M. P. Cardoso

2009
38	EE	Ricardo Ferreira, Alex Damiany, Julio Vendramini, Tiago Teixeira, João M. P. Cardoso: On Simplifying Placement and Routing by Extending Coarse-Grained Reconfigurable Arrays with Omega Networks. ARC 2009: 145-156
37	EE	André C. Santos, Luís Tarrataca, João M. P. Cardoso: An Analysis of Navigation Algorithms for Smartphones Using J2ME. MOBILWARE 2009: 266-279
36	EE	André C. Santos, Luís Tarrataca, João M. P. Cardoso, Diogo R. Ferreira, Pedro C. Diniz, Paulo Chainho: Context Inference for Mobile Applications in the UPCASE Project. MOBILWARE 2009: 352-365
35	EE	Luís Tarrataca, André C. Santos, João M. P. Cardoso: The current feasibility of gesture recognition for a smartphone using J2ME. SAC 2009: 1642-1649
2008
34	EE	Rui Marcelino, Horácio C. Neto, João M. P. Cardoso: Sorting Units for FPGA-Based Embedded Systems. DIPES 2008: 11-22
33	EE	Carlos Morra, João Bispo, João M. P. Cardoso, Jürgen Becker: Combining Rewriting-Logic, Architecture Generation, and Simulation to Exploit Coarse-Grained Reconfigurable Architectures. FCCM 2008: 320-321
32	EE	Carlos Morra, João M. P. Cardoso, João Bispo, Jürgen Becker: Retargeting, Evaluating, and Generating Reconfigurable Array-Based Architectures. SASP 2008: 34-41
31	EE	Ioannis Sourdis, João Bispo, João M. P. Cardoso, Stamatis Vassiliadis: Regular Expression Matching in Reconfigurable Hardware. Signal Processing Systems 51(1): 99-121 (2008)
2007
30		Pedro C. Diniz, Eduardo Marques, Koen Bertels, Marcio Merino Fernandes, João M. P. Cardoso: Reconfigurable Computing: Architectures, Tools and Applications, Third International Workshop, ARC 2007, Mangaratiba, Brazil, March 27-29, 2007. Springer 2007
29	EE	João Bispo, Ioannis Sourdis, João M. P. Cardoso, Stamatis Vassiliadis: Synthesis of Regular Expressions Targeting FPGAs: Current Status and Open Issues. ARC 2007: 179-190
28	EE	Rui Rodrigues, João M. P. Cardoso, Pedro C. Diniz: A Data-Driven Approach for Pipelining Sequences of Data-Dependent Loops. FCCM 2007: 219-228
27	EE	Ricardo Menotti, Eduardo Marques, João M. P. Cardoso: Aggressive Loop Pipelining for Reconfigurable Architectures. FPL 2007: 501-502
26	EE	Carlos Morra, João M. P. Cardoso, Jürgen Becker: Using Rewriting Logic to Match Patterns of Instructions from a Compiler Intermediate Form to Coarse-Grained Processing Elements. IPDPS 2007: 1-8
25	EE	Ricardo Ferreira, Alisson Garcia, Tiago Teixeira, João M. P. Cardoso: A Polynomial Placement Algorithm for Data Driven Coarse-Grained Reconfigurable Architectures. ISVLSI 2007: 61-66
24	EE	Vanderlei Bonato, Rafael Peron, Denis F. Wolf, José A. M. de Holanda, Eduardo Marques, João M. P. Cardoso: An FPGA Implementation for a Kalman Filter with Application to Mobile Robotics. SIES 2007: 148-155
23	EE	José A. de Holanda, Jecel Assumpcao, Denis F. Wolf, Eduardo Marques, João M. P. Cardoso: On Adapting Power Estimation Models for Embedded Soft-Core Processors. SIES 2007: 345-348
22	EE	Rui Rodrigues, João M. P. Cardoso: An Infrastructure to Functionally Test Designs Generated by Compilers Targeting FPGAs CoRR abs/0710.4706: (2007)
21	EE	Rui Rodrigues, João M. P. Cardoso: On Pipelining Sequences of Data-Dependent Loops. J. UCS 13(3): 419-439 (2007)
2006
20		Koen Bertels, João M. P. Cardoso, Stamatis Vassiliadis: Reconfigurable Computing: Architectures and Applications, Second International Workshop, ARC 2006, Delft, The Netherlands, March 1-3, 2006, Revised Selected Papers Springer 2006
2005
19	EE	João M. P. Cardoso: On Estimations for Compiling Software to FPGA-based Systems. ASAP 2005: 225-230
18	EE	João M. P. Cardoso: Dynamic loop pipelining in data-driven architectures. Conf. Computing Frontiers 2005: 106-115
17	EE	Rui Rodrigues, João M. P. Cardoso: An Infrastructure to Functionally Test Designs Generated by Compilers Targeting FPGAs. DATE 2005: 30-31
16	EE	João M. P. Cardoso: New challenges in computer science education. ITiCSE 2005: 203-207
15	EE	Ricardo Ferreira, João M. P. Cardoso, Andre Toledo, Horácio C. Neto: Data-Driven Regular Reconfigurable Arrays: Design Space Exploration and Mapping. SAMOS 2005: 41-50
2004
14	EE	Ricardo Ferreira, João M. P. Cardoso, Horácio C. Neto: An Environment for Exploring Data-Driven Architectures. FPL 2004: 1022-1026
13		Vanderlei Bonato, Adriano K. Sanches, Márcio M. Fernandes, João M. P. Cardoso, Eduardo D. V. Simões, Eduardo Marques: A Real Time Gesture Recognition System for Mobile Robots. ICINCO (2) 2004: 207-214
12	EE	João M. P. Cardoso, Pedro C. Diniz: Modeling Loop Unrolling: Approaches and Open Issues. SAMOS 2004: 224-233
11	EE	João M. P. Cardoso: Self-loop Pipelining and Reconfigurable Dataflow Arrays. SAMOS 2004: 234-243
2003
10	EE	João M. P. Cardoso, Markus Weinhardt: From C Programs to the Configure-Execute Model. DATE 2003: 10576-10581
9	EE	João M. P. Cardoso: Loop Dissevering: A Technique for Temporally Partitioning Loops in Dynamically Reconfigurable Computing Platforms. IPDPS 2003: 181
8		R. A. Gonçalves, P. A. Moraes, João M. P. Cardoso, Denis F. Wolf, Márcio M. Fernandes, Roseli A. Francelin Romero, Eduardo Marques: ARCHITECT-R: A System for Reconfigurable Robots Design. SAC 2003: 679-683
7	EE	João M. P. Cardoso, Horácio C. Neto: Compilation for FPGA-Based Reconfigurable Hardware. IEEE Design & Test of Computers 20(2): 65-75 (2003)
6	EE	João M. P. Cardoso: On Combining Temporal Partitioning and Sharing of Functional Units in Compilation for Reconfigurable Architectures. IEEE Trans. Computers 52(10): 1362-1375 (2003)
2002
5	EE	João M. P. Cardoso, Markus Weinhardt: Fast and Guaranteed C Compilation onto the PACT-XPP? Reconfigurable Computing Platform. FCCM 2002: 291-292
4	EE	João M. P. Cardoso, Markus Weinhardt: XPP-VC: A C Compiler with Temporal Partitioning for the PACT-XPP Architecture. FPL 2002: 864-874
2001
3	EE	João M. P. Cardoso, Horácio C. Neto: Compilation Increasing the Scheduling Scope for Multi-memory-FPGA-Based Custom Computing Machines. FPL 2001: 523-533
1999
2	EE	João M. P. Cardoso, Horácio C. Neto: Macro-Based Hardware Compilation of Java(tm) Bytecodes into a Dynamic Reconfigurable Computing System. FCCM 1999: 2-11
1		João M. P. Cardoso, Horácio C. Neto: An Enhanced Static-List Scheduling Algorithm for Temporal Partitioning onto RPUs. VLSI 1999: 485-496

Coauthor Index

1	Jecel Assumpcao	[23]
2	Jürgen Becker	[26] [32] [33]
3	Koen Bertels	[20] [30]
4	João Bispo	[29] [31] [32] [33]
5	Vanderlei Bonato	[13] [24]
6	Paulo Chainho	[36]
7	Alex Damiany	[38]
8	Pedro C. Diniz	[12] [28] [30] [36]
9	Márcio M. Fernandes	[8] [13]
10	Marcio Merino Fernandes	[30]
11	Diogo R. Ferreira	[36]
12	Ricardo Ferreira	[14] [15] [25] [38]
13	Alisson Garcia	[25]
14	R. A. Gonçalves	[8]
15	José A. M. de Holanda	[24]
16	José A. de Holanda	[23]
17	Rui Marcelino	[34]
18	Eduardo Marques	[8] [13] [23] [24] [27] [30]
19	Ricardo Menotti	[27]
20	P. A. Moraes	[8]
21	Carlos Morra	[26] [32] [33]
22	Horácio C. Neto	[1] [2] [3] [7] [14] [15] [34]
23	Rafael Peron	[24]
24	Rui Rodrigues	[17] [21] [22] [28]
25	Roseli A. Francelin Romero	[8]
26	Adriano K. Sanches	[13]
27	André C. Santos	[35] [36] [37]
28	Eduardo D. V. Simões	[13]
29	Ioannis Sourdis	[29] [31]
30	Luís Tarrataca	[35] [36] [37]
31	Tiago Teixeira	[25] [38]
32	Andre Toledo	[15]
33	Stamatis Vassiliadis	[20] [29] [31]
34	Julio Vendramini	[38]
35	Markus Weinhardt	[4] [5] [10]
36	Denis F. Wolf	[8] [23] [24]

Colors in the list of coauthors