2008 |
8 | EE | Sanghyun Park,
Aviral Shrivastava,
Nikil D. Dutt,
Alexandru Nicolau,
Yunheung Paek,
Eugene Earlie:
Register File Power Reduction Using Bypass Sensitive Compiler.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(6): 1155-1159 (2008) |
2007 |
7 | EE | Aviral Shrivastava,
Sanghyun Park,
Eugene Earlie,
Nikil D. Dutt,
Alexandru Nicolau,
Yunheung Paek:
Automatic Design Space Exploration of Register Bypasses in Embedded Processors.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(12): 2102-2115 (2007) |
2006 |
6 | EE | Sanghyun Park,
Eugene Earlie,
Aviral Shrivastava,
Alex Nicolau,
Nikil Dutt,
Yunheung Paek:
Automatic generation of operation tables for fast exploration of bypasses in embedded processors.
DATE 2006: 1197-1202 |
5 | EE | Sanghyun Park,
Aviral Shrivastava,
Nikil D. Dutt,
Alexandru Nicolau,
Yunheung Paek,
Eugene Earlie:
Bypass aware instruction scheduling for register file power reduction.
LCTES 2006: 173-181 |
4 | EE | Aviral Shrivastava,
Eugene Earlie,
Nikil D. Dutt,
Alexandru Nicolau:
Retargetable pipeline hazard detection for partially bypassed processors.
IEEE Trans. VLSI Syst. 14(8): 791-801 (2006) |
2005 |
3 | EE | Aviral Shrivastava,
Eugene Earlie,
Nikil D. Dutt,
Alexandru Nicolau:
Aggregating processor free time for energy reduction.
CODES+ISSS 2005: 154-159 |
2 | EE | Aviral Shrivastava,
Nikil D. Dutt,
Alexandru Nicolau,
Eugene Earlie:
PBExplore: A Framework for Compiler-in-the-Loop Exploration of Partial Bypassing in Embedded Processors.
DATE 2005: 1264-1269 |
2004 |
1 | EE | Aviral Shrivastava,
Eugene Earlie,
Nikil D. Dutt,
Alexandru Nicolau:
Operation tables for scheduling in the presence of incomplete bypassing.
CODES+ISSS 2004: 194-199 |