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Kwang-Ting Cheng

Kwang-Ting (Tim) Cheng

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2009
230EEHsiu-Ming Chang, Kuan-Yu Lin, Chin-Hsuan Chen, Kwang-Ting Cheng: A Built-in self-calibration scheme for pipelined ADCs. ISQED 2009: 266-271
2008
229EEShih-Wei Chu, Mei-Chen Yeh, Kwang-Ting Cheng: A real-time, embedded face-annotation system. ACM Multimedia 2008: 989-990
228EEMei-Chen Yeh, Kwang-Ting Cheng: A string matching approach for visual retrieval and classification. Multimedia Information Retrieval 2008: 52-58
227EEDongwoo Hong, Kwang-Ting (Tim) Cheng: Bit-Error Rate Estimation for Bang-Bang Clock and Data Recovery Circuit in High-Speed Serial Links. VTS 2008: 17-22
226EELaung-Terng Wang, Charles E. Stroud, Kwang-Ting (Tim) Cheng: Logic Testing. Wiley Encyclopedia of Computer Science and Engineering 2008
225EETsung-Ching Huang, Kwang-Ting (Tim) Cheng, Huai-Yuan Tseng, Chen-Pang Kung: Reliability analysis for flexible electronics: Case study of integrated a-Si: H TFT scan driver. JETC 4(3): (2008)
2007
224EETsung-Ching Huang, Huai-Yuan Tseng, Chen-Pang Kung, Kwang-Ting Cheng: Reliability Analysis for Flexible Electronics: Case Study of Integrated a-Si: H TFT Scan Driver. DAC 2007: 966-969
223EEDongwoo Hong, Shadi Saberi, Kwang-Ting Cheng, C. Patrick Yue: A two-tone test method for continuous-time adaptive equalizers. DATE 2007: 1283-1288
222EESung-Jui (Song-Ra) Pan, Kwang-Ting Cheng: A framework for system reliability analysis considering both system error tolerance and component test quality. DATE 2007: 1581-1586
221EEMitchell Lin, Kwang-Ting (Tim) Cheng: Testable design for advanced serial-link transceivers. DATE 2007: 695-700
220EEMango Chia-Tso Chao, Kwang-Ting Cheng, Seongmoon Wang, Srimat T. Chakradhar, Wenlong Wei: A hybrid scheme for compacting test responses with unknown values. ICCAD 2007: 513-519
219EEKai Yang, Kwang-Ting Cheng: Silicon Debug for Timing Errors. IEEE Trans. on CAD of Integrated Circuits and Systems 26(11): 2084-2088 (2007)
218EEYung-Chieh Lin, Feng Lu, Kwang-Ting Cheng: Multiple-Fault Diagnosis Based On Adaptive Diagnostic Test Pattern Generation. IEEE Trans. on CAD of Integrated Circuits and Systems 26(5): 932-942 (2007)
2006
217EEQiang Zhu, Mei-Chen Yeh, Kwang-Ting Cheng: Multimodal fusion using learned text concepts for image categorization. ACM Multimedia 2006: 211-220
216EESung-Jui (Song-Ra) Pan, Kwang-Ting Cheng, John Moondanos, Ziyad Hanna: Generation of shorter sequences for high resolution error diagnosis using sequential SAT. ASP-DAC 2006: 25-29
215EEKai Yang, Kwang-Ting Cheng: Efficient identification of multi-cycle false path. ASP-DAC 2006: 360-365
214EEQiang Zhu, Mei-Chen Yeh, Kwang-Ting Cheng, Shai Avidan: Fast Human Detection Using a Cascade of Histograms of Oriented Gradients. CVPR (2) 2006: 1491-1498
213EEMango Chia-Tso Chao, Kwang-Ting Cheng, Seongmoon Wang, Srimat T. Chakradhar, Wenlong Wei: Unknown-tolerance analysis and test-quality control for test response compaction using space compactors. DAC 2006: 1083-1088
212EEMango Chia-Tso Chao, Seongmoon Wang, Srimat T. Chakradhar, Wenlong Wei, Kwang-Ting Cheng: Coverage loss by using space compactors in presence of unknown values. DATE 2006: 1053-1054
211EEKai Yang, Kwang-Ting Cheng: Timing-reasoning-based delay fault diagnosis. DATE 2006: 418-423
210EEYung-Chieh Lin, Kwang-Ting Cheng: Multiple-fault diagnosis based on single-fault activation and single-output observation. DATE 2006: 424-429
209EEKwang-Ting Cheng: New beginnings, continued success. IEEE Design & Test of Computers 23(1): 5-6 (2006)
208EEKaushik Roy, T. M. Mak, Kwang-Ting (Tim) Cheng: Test Consideration for Nanometer-Scale CMOS Circuits. IEEE Design & Test of Computers 23(2): 128-136 (2006)
207EEKwang-Ting (Tim) Cheng: Dealing with early life failures. IEEE Design & Test of Computers 23(2): 85 (2006)
206EEKwang-Ting (Tim) Cheng: The Need for a SiP Design and Test Infrastructure. IEEE Design & Test of Computers 23(3): 181 (2006)
205EEKwang-Ting (Tim) Cheng: Vision from the Top. IEEE Design & Test of Computers 23(4): 261 (2006)
204EEKwang-Ting (Tim) Cheng: The New World of ESL Design. IEEE Design & Test of Computers 23(5): 333 (2006)
203EECharles H.-P. Wen, Li-C. Wang, Kwang-Ting Cheng: Simulation-Based Functional Test Generation for Embedded Processors. IEEE Trans. Computers 55(11): 1335-1343 (2006)
202EEYung-Chieh Lin, Feng Lu, Kwang-Ting Cheng: Pseudofunctional testing. IEEE Trans. on CAD of Integrated Circuits and Systems 25(8): 1535-1546 (2006)
2005
201EEYung-Chieh Lin, Feng Lu, Kai Yang, Kwang-Ting Cheng: Constraint extraction for pseudo-functional scan-based delay testing. ASP-DAC 2005: 166-171
200EEGanapathy Parthasarathy, Madhu K. Iyer, Kwang-Ting Cheng, Forrest Brewer: Structural search for RTL with predicate learning. DAC 2005: 451-456
199EEFeng Lu, Madhu K. Iyer, Ganapathy Parthasarathy, Li-C. Wang, Kwang-Ting Cheng, Kuang-Chien Chen: An Efficient Sequential SAT Solver With Improved Search Strategies. DATE 2005: 1102-1107
198EEMadhu K. Iyer, Ganapathy Parthasarathy, Kwang-Ting Cheng: Efficient Conflict-Based Learning in an RTL Circuit Constraint Solver. DATE 2005: 666-671
197 Ganapathy Parthasarathy, Madhu K. Iyer, Kwang-Ting Cheng, Forrest Brewer: RTL SAT simplification by Boolean and interval arithmetic reasoning. ICCAD 2005: 297-302
196 Mango Chia-Tso Chao, Seongmoon Wang, Srimat T. Chakradhar, Kwang-Ting Cheng: Response shaper: a novel technique to enhance unknown tolerance for output response compaction. ICCAD 2005: 80-87
195EEMango Chia-Tso Chao, Seongmoon Wang, Srimat T. Chakradhar, Kwang-Ting Cheng: ChiYun Compact: A Novel Test Compaction Technique for Responses with Unknown Values. ICCD 2005: 147-152
194EEYung-Chieh Lin, Feng Lu, Kwang-Ting Cheng: Accurate Diagnosis of Multiple Faults. ICCD 2005: 153-156
193EEQiang Zhu, Shai Avidan, Kwang-Ting Cheng: Learning a Sparse, Corner-Based Representation for Time-varying Background Modeling. ICCV 2005: 678-685
192EEChing-Tung Wu, Kwang-Ting Cheng, Qiang Zhu, Yi-Leh Wu: Using visual features for anti-spam filtering. ICIP (3) 2005: 509-512
191EECharles H.-P. Wen, Li-C. Wang, Kwang-Ting Cheng, Kai Yang, Wei-Ting Liu, Ji-Jan Chen: On A Software-Based Self-Test Methodology and Its Application. VTS 2005: 107-113
190EEYung-Chieh Lin, Feng Lu, Kwang-Ting Cheng: Pseudo-Functional Scan-based BIST for Delay Fault. VTS 2005: 229-234
189EETao Feng, Li-C. Wang, Kwang-Ting Cheng, Chih-Chan Lin: Using 2-domain partitioned OBDD data structure in an enhanced symbolic simulator. ACM Trans. Design Autom. Electr. Syst. 10(4): 627-650 (2005)
2004
188EEQiang Zhu, Ching-Tung Wu, Kwang-Ting Cheng, Yi-Leh Wu: An adaptive skin model and its application to objectionable image filtering. ACM Multimedia 2004: 56-63
187EEChee-Kian Ong, Dongwoo Hong, Kwang-Ting Cheng, Li-C. Wang: Jitter spectral extraction for multi-gigahertz signal. ASP-DAC 2004: 298-303
186EEGanapathy Parthasarathy, Madhu K. Iyer, Kwang-Ting Cheng, Li-C. Wang: Efficient reachability checking using sequential SAT. ASP-DAC 2004: 418-423
185EETao Feng, Li-C. Wang, Kwang-Ting Cheng: Improved symbolic simulation by functional-space decomposition. ASP-DAC 2004: 634-639
184EEKai Yang, Kwang-Ting Cheng, Li-C. Wang: TranGen: a SAT-based ATPG for path-oriented transition faults. ASP-DAC 2004: 92-97
183EEHao-Chiao Hong, Cheng-Wen Wu, Kwang-Ting Cheng: A Signa-Delta Modulation Based Analog BIST System with a Wide Bandwidth Fifth-Order Analog Response Extractor for Diagnosis Purpose. Asian Test Symposium 2004: 62-67
182EEGanapathy Parthasarathy, Madhu K. Iyer, Kwang-Ting Cheng, Li-C. Wang: An efficient finite-domain constraint solver for circuits. DAC 2004: 212-217
181EELi-C. Wang, T. M. Mak, Kwang-Ting Cheng, Magdy S. Abadir: On path-based learning and its applications in delay test and diagnosis. DAC 2004: 492-497
180EEMango Chia-Tso Chao, Li-C. Wang, Kwang-Ting Cheng: Pattern Selection for Testing of Deep Sub-Micron Timing Defects. DATE 2004: 160
179EEChee-Kian Ong, Dongwoo Hong, Kwang-Ting Cheng, Li-C. Wang: Random Jitter Extraction Technique in a Multi-Gigahertz Signal. DATE 2004: 286-291
178EETao Feng, Li-C. Wang, Kwang-Ting Cheng, Chih-Chan Lin: Improved Symoblic Simulation by Dynamic Funtional Space Partitioning. DATE 2004: 42-49
177EEQiang Zhu, Kwang-Ting Cheng, Ching-Tung Wu, Yi-Leh Wu: Adaptive Learning of an Accurate Skin-Color Model. FGR 2004: 37-42
176EERob A. Rutenbar, Li-C. Wang, Kwang-Ting Cheng, Sandip Kundu: Static statistical timing analysis for latch-based pipeline designs. ICCAD 2004: 468-472
175EELeonard Lee, Li-C. Wang, T. M. Mak, Kwang-Ting Cheng: A path-based methodology for post-silicon timing validation. ICCAD 2004: 713-720
174EEQiang Zhu, Kwang-Ting Cheng, Ching-Tung Wu: A unified adaptive approach to accurate skin detection. ICIP 2004: 1189-1192
173 Qiang Zhu, Kwang-Ting Cheng, HongJiang Zhang: SSD tracking using dynamic template and log-polar transformation. ICME 2004: 723-726
172EEDongwoo Hong, Chee-Kian Ong, Kwang-Ting (Tim) Cheng: BER Estimation for Serial Links Based on Jitter Spectrum and Clock Recovery Characteristics. ITC 2004: 1138-1147
171EEChee-Kian Ong, Dongwoo Hong, Kwang-Ting Cheng, Li-C. Wang: A Scalable On-Chip Jitter Extraction Technique. VTS 2004: 267-272
170EEGanapathy Parthasarathy, Madhu K. Iyer, Kwang-Ting Cheng, Li-C. Wang: Safety Property Verification Using Sequential SAT and Bounded Model Checking. IEEE Design & Test of Computers 21(2): 132-143 (2004)
169EET. M. Mak, Angela Krstic, Kwang-Ting (Tim) Cheng, Li-C. Wang: New Challenges in Delay Testing of Nanometer, Multigigahertz Designs. IEEE Design & Test of Computers 21(3): 241-247 (2004)
168EELi-C. Wang, Jing-Jia Liou, Kwang-Ting Cheng: Critical path selection for delay fault testing based upon a statistical timing model. IEEE Trans. on CAD of Integrated Circuits and Systems 23(11): 1550-1565 (2004)
167EEYing-Tsai Chang, Kwang-Ting Cheng: Self-referential verification for gate-level implementations of arithmetic circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 23(7): 1102-1112 (2004)
166EEFeng Lu, Li-C. Wang, Kwang-Ting (Tim) Cheng, John Moondanos, Ziyad Hanna: A Signal Correlation Guided Circuit-SAT Solver. J. UCS 10(12): 1629-1654 (2004)
2003
165EEFeng Lu, Li-C. Wang, Kwang-Ting Cheng, John Moondanos, Ziyad Hanna: A signal correlation guided ATPG solver and its applications for solving difficult industrial cases. DAC 2003: 436-441
164EEAngela Krstic, Li-C. Wang, Kwang-Ting Cheng, Jing-Jia Liou, T. M. Mak: Enhancing diagnosis resolution for delay defects based upon statistical timing and statistical fault models. DAC 2003: 668-673
163EEAngela Krstic, Li-C. Wang, Kwang-Ting Cheng, Jing-Jia Liou, Magdy S. Abadir: Delay Defect Diagnosis Based Upon Statistical Timing Models - The First Step. DATE 2003: 10328-10335
162EEFeng Lu, Li-C. Wang, Kwang-Ting Cheng, Ric C.-Y. Huang: A Circuit SAT Solver With Signal Correlation Guided Learning. DATE 2003: 10892-10897
161EEMadhu K. Iyer, Ganapathy Parthasarathy, Kwang-Ting Cheng: SATORI - A Fast Sequential SAT Engine for Circuits. ICCAD 2003: 320-325
160EEAngela Krstic, Jing-Jia Liou, Kwang-Ting Cheng, Li-C. Wang: On Structural vs. Functional Testing for Delay Faults. ISQED 2003: 438-441
159EELi-C. Wang, Angela Krstic, Leonard Lee, Kwang-Ting Cheng, M. Ray Mercer, Thomas W. Williams, Magdy S. Abadir: Using Logic Models To Predict The Detection Behavior Of Statistical Timing Defects. ITC 2003: 1041-1050
158EEKwang-Ting Cheng: The Confluence of Manufacturing Test and Design Validation. ITC 2003: 1293
157EEAngela Krstic, Li-C. Wang, Kwang-Ting Cheng, T. M. Mak: Diagnosis-Based Post-Silicon Timing Validation Using Statistical Tools and Methodologies. ITC 2003: 339-348
156EEKaushik Roy, T. M. Mak, Kwang-Ting Cheng: Embedded Tutorial: Test Consideration for Nanometer Scale CMOS Circuits. VTS 2003: 313-318
155EEAngela Krstic, Li-C. Wang, Kwang-Ting Cheng, Jing-Jia Liou: Diagnosis of Delay Defects Using Statistical Timing Models. VTS 2003: 339-344
154EEKenneth M. Butler, Kwang-Ting (Tim) Cheng, Li-C. Wang: Guest Editors' Introduction: Speed Test and Speed Binning for Complex ICs. IEEE Design & Test of Computers 20(5): 6-7 (2003)
153EEJing-Jia Liou, Angela Krstic, Yi-Min Jiang, Kwang-Ting Cheng: Modeling, testing, and analysis for delay defects and noise effects in deep submicron devices. IEEE Trans. on CAD of Integrated Circuits and Systems 22(6): 756-769 (2003)
2002
152EEWei-Cheng Lai, Chengwei Chang, Edward Y. Chang, Kwang-Ting Cheng, Michael Crandell: PBIR-MM: multimodal image retrieval and annotation. ACM Multimedia 2002: 421-422
151EEHao-Chiao Hong, Jiun-Lang Huang, Kwang-Ting Cheng, Cheng-Wen Wu: On-chip Analog Response Extraction with 1-Bit ? - Modulators. Asian Test Symposium 2002: 49-
150EEYing-Tsai Chang, Kwang-Ting Cheng: Self-referential verification of gate-level implementations of arithmetic circuits. DAC 2002: 311-316
149EEAngela Krstic, Wei-Cheng Lai, Kwang-Ting Cheng, Li Chen, Sujit Dey: Embedded software-based self-testing for SoC design. DAC 2002: 355-360
148EEJing-Jia Liou, Li-C. Wang, Kwang-Ting Cheng, Jennifer Dworak, M. Ray Mercer, Rohit Kapur, Thomas W. Williams: Enhancing test efficiency for delay fault testing using multiple-clocked schemes. DAC 2002: 371-374
147EEJing-Jia Liou, Angela Krstic, Li-C. Wang, Kwang-Ting Cheng: False-path-aware statistical timing analysis and efficient path selection for delay testing and timing validation. DAC 2002: 566-569
146EEJing-Jia Liou, Li-C. Wang, Kwang-Ting Cheng: On theoretical and practical considerations of path selection for delay fault testing. ICCAD 2002: 94-100
145EEYi-Leh Wu, Edward Y. Chang, Kwang-Ting Cheng, Chengwei Chang, Chen-Cha Hsu, Wei-Cheng Lai, Ching-Tung Wu: MORF: A Distributed Multimodal Information Filtering System. IEEE Pacific Rim Conference on Multimedia 2002: 279-286
144EEWei-Cheng Lai, Edward Y. Chang, Kwang-Ting Cheng: Hybrid Learning Schemes for Multimedia Information Retrieval. IEEE Pacific Rim Conference on Multimedia 2002: 556-563
143EEGanapathy Parthasarathy, Madhu K. Iyer, Tao Feng, Li-C. Wang, Kwang-Ting Cheng, Magdy S. Abadir: Combining ATPG and Symbolic Simulation for Efficient Validation of Embedded Array Systems. ITC 2002: 203-212
142EEJing-Jia Liou, Li-C. Wang, Kwang-Ting Cheng, Jennifer Dworak, M. Ray Mercer, Rohit Kapur, Thomas W. Williams: Analysis of Delay Test Effectiveness with a Multiple-Clock Scheme. ITC 2002: 407-416
141EEChee-Kian Ong, Kwang-Ting (Tim) Cheng: Self-Testing Second-Order Delta-Sigma Modulators Using Digital Stimulus. VTS 2002: 123-128
140EEMadhu K. Iyer, Kwang-Ting Cheng: Software-Based Weighted Random Testing for IP Cores in Bus-Based Programmable SoCs. VTS 2002: 139-144
139EEAngela Krstic, Wei-Cheng Lai, Kwang-Ting Cheng, Li Chen, Sujit Dey: Embedded Software-Based Self-Test for Programmable Core-Based Designs. IEEE Design & Test of Computers 19(4): 18-27 (2002)
2001
138EEEdward Y. Chang, Kwang-Ting Cheng, Wei-Cheng Lai, Ching-Tung Wu, Chengwei Chang, Yi-Leh Wu: PBIR: perception-based image retrieval-a system that can quickly capture subjective image query concepts. ACM Multimedia 2001: 611-614
137 Kingshy Goh, Edward Y. Chang, Kwang-Ting Cheng: SVM Binary Classifier Ensembles for Image Classification. CIKM 2001: 395-402
136EEWei-Cheng Lai, Kwang-Ting Cheng: Instruction-Level DFT for Testing Processor and IP Cores in System-on-a-Chip. DAC 2001: 59-64
135EEJing-Jia Liou, Kwang-Ting Cheng, Sandip Kundu, Angela Krstic: Fast Statistical Timing Analysis By Probabilistic Event Propagation. DAC 2001: 661-666
134EEYing-Tsai Chang, Kwang-Ting Cheng: Induction-Based Gate-Level Verification of Multipliers. ICCAD 2001: 190-
133EEBeitao Li, Wei-Cheng Lai, Edward Y. Chang, Kwang-Ting Cheng: Mining Image Features for Efficient Query Processing. ICDM 2001: 353-360
132EEYi-Min Jiang, Han Young Koh, Kwang-Ting Cheng: HRM - A Hierarchical Simulator for Full-Chip Power Network Reliability Analysis. ISQED 2001: 307-312
131 Angela Krstic, Jing-Jia Liou, Yi-Min Jiang, Kwang-Ting Cheng: Delay testing considering crosstalk-induced effects. ITC 2001: 558-567
130EEJing-Reng Huang, Madhu K. Iyer, Kwang-Ting Cheng: A Self-Test Methodology for IP Cores in Bus-Based Programmable SoCs. VTS 2001: 198-203
129EEWei-Cheng Lai, Jing-Reng Huang, Kwang-Ting (Tim) Cheng: Embedded-Software-Based Approach to Testing Crosstalk-Induced Faults at On-Chip Buses. VTS 2001: 204-209
128EEJiun-Lang Huang, Kwang-Ting Cheng: An On-Chip Short-Time Interval Measurement Technique for Testing High-Speed Communication Links. VTS 2001: 380-387
127EEShi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen: Verifying sequential equivalence using ATPG techniques. ACM Trans. Design Autom. Electr. Syst. 6(2): 244-275 (2001)
126EEYi-Min Jiang, Kwang-Ting Cheng: Vector generation for power supply noise estimation and verification of deep submicron designs. IEEE Trans. VLSI Syst. 9(2): 329-340 (2001)
125EEChung-Yang Huang, Kwang-Ting Cheng: Using word-level ATPG and modular arithmetic constraint-solvingtechniques for assertion property checking. IEEE Trans. on CAD of Integrated Circuits and Systems 20(3): 381-391 (2001)
124EEAngela Krstic, Yi-Min Jiang, Kwang-Ting Cheng: Pattern generation for delay testing and dynamic timing analysisconsidering power-supply noise effects. IEEE Trans. on CAD of Integrated Circuits and Systems 20(3): 416-425 (2001)
2000
123EEJing-Jia Liou, Angela Krstic, Kwang-Ting Cheng, Deb Aditya Mukherjee, Sandip Kundu: Performance sensitivity analysis using statistical method and its applications to delay. ASP-DAC 2000: 587-592
122EEHuan-Chih Tsai, Kwang-Ting Cheng, Vishwani D. Agrawal: A testability metric for path delay faults and its application. ASP-DAC 2000: 593-598
121EEJiun-Lang Huang, Kwang-Ting Cheng: A sigma-delta modulation based BIST scheme for mixed-signal circuits. ASP-DAC 2000: 605-612
120EEKwang-Ting Cheng, Vishwani D. Agrawal, Jing-Yang Jou, Li-C. Wang, Chi-Feng Wu, Shianling Wu: Collaboration between Industry and Academia in Test Research. Asian Test Symposium 2000: 17-
119EEVishwani D. Agrawal, Kwang-Ting Cheng: Testing in the Fourth Dimension. Asian Test Symposium 2000: 2-
118EEMelvin A. Breuer, Kwang-Ting Cheng: Challenges for the Academic Test Community. Asian Test Symposium 2000: 4-
117EEJing-Reng Huang, Chee-Kian Ong, Kwang-Ting Cheng, Cheng-Wen Wu: An FPGA-based re-configurable functional tester for memory chips. Asian Test Symposium 2000: 51-57
116EEChung-Yang Huang, Kwang-Ting Cheng: Assertion checking by combined word-level ATPG and modular arithmetic constraint-solving techniques. DAC 2000: 118-123
115EEKwang-Ting Cheng, Sujit Dey, Mike Rodgers, Kaushik Roy: Test challenges for deep sub-micron technologies. DAC 2000: 142-149
114EEJiun-Lang Huang, Chee-Kian Ong, Kwang-Ting Cheng: A BIST Scheme for On-Chip ADC and DAC Testing. DATE 2000: 216-220
113 Jing-Jia Liou, Angela Krstic, Yi-Min Jiang, Kwang-Ting Cheng: Path Selection and Pattern Generation for Dynamic Timing Analysis Considering Power Supply Noise Effects. ICCAD 2000: 493-496
112EEYi-Min Jiang, Angela Krstic, Kwang-Ting Cheng: Dynamic Timing Analysis Considering Power Supply Noise Effects. ISQED 2000: 137-144
111 Jiun-Lang Huang, Kwang-Ting Cheng: Testing and characterization of the one-bit first-order delta-sigma modulator for on-chip analog signal analysis. ITC 2000: 1021-1030
110 Wei-Cheng Lai, Angela Krstic, Kwang-Ting Cheng: Test program synthesis for path delay faults in microprocessor cores. ITC 2000: 1080-1089
109 Subrata Roy, Gokhan Guner, Kwang-Ting Cheng: Efficient test mode selection and insertion for RTL-BIST. ITC 2000: 263-272
108 Chung-Yang Huang, Bwolen Yang, Huan-Chih Tsai, Kwang-Ting Cheng: Static property checking using ATPG vs. BDD techniques. ITC 2000: 309-316
107EEWei-Cheng Lai, Angela Krstic, Kwang-Ting Cheng: On Testing the Path Delay Faults of a Microprocessor Using its Instruction Set. VTS 2000: 15-22
106EEJan Arild Tofte, Chee-Kian Ong, Jiun-Lang Huang, Kwang-Ting (Tim) Cheng: Characterization of a Pseudo-Random Testing Technique for Analog and Mixed-Signal Built-in-Self-Test. VTS 2000: 237-246
105EEJing-Jia Liou, Kwang-Ting Cheng, Deb Aditya Mukherjee: Path Selection for Delay Testing of Deep Sub-Micron Devices Using Statistical Performance Sensitivity Analysis. VTS 2000: 97-104
104EEWei-Cheng Lai, Angela Krstic, Kwang-Ting (Tim) Cheng: Functionally Testable Path Delay Faults on a Microprocessor. IEEE Design & Test of Computers 17(4): 6-14 (2000)
103EEShi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen, Chung-Yang Huang, Forrest Brewer: AQUILA: An Equivalence Checking System for Large Sequential Designs. IEEE Trans. Computers 49(5): 443-464 (2000)
102EEYi-Min Jiang, Angela Krstic, Kwang-Ting Cheng: Estimation for maximum instantaneous current through supply lines for CMOS circuits. IEEE Trans. VLSI Syst. 8(1): 61-73 (2000)
101EEHuan-Chih Tsai, Kwang-Ting Cheng, Sudipta Bhawmik: On improving test quality of scan-based BIST. IEEE Trans. on CAD of Integrated Circuits and Systems 19(8): 928-938 (2000)
100EEAngela Krstic, Srimat T. Chakradhar, Kwang-Ting Cheng: Testable Path Delay Fault Cover for Sequential Circuits. J. Inf. Sci. Eng. 16(5): 673-686 (2000)
1999
99EEHuan-Chih Tsai, Kwang-Ting Cheng, Sudipta Bhawmik: Improving the Test Quality for Scan-Based BIST Using a General Test Application Scheme. DAC 1999: 748-753
98EEYi-Min Jiang, Kwang-Ting Cheng: Analysis of Performance Impact Caused by Power Supply Noise in Deep Submicron Devices. DAC 1999: 760-765
97EEYi-Min Jiang, Tak K. Young, Kwang-Ting Cheng: VIP - an input pattern generator for indentifying critical voltage drop for deep sub-micron designs. ISLPED 1999: 156-161
96 Yi-Min Jiang, Angela Krstic, Kwang-Ting Cheng: Delay testing considering power supply noise effects. ITC 1999: 181-190
95EEAngela Krstic, Kwang-Ting (Tim) Cheng, Srimat T. Chakradhar: Testing High Speed VLSI Devices Using Slower Testers. VTS 1999: 16-21
94EEJiun-Lang Huang, Chen-Yang Pan, Kwang-Ting Cheng: Specification Back-Propagation and Its Application to DC Fault Simulation for Analog/Mixed-Signal Circuits. VTS 1999: 220-225
93 Kwang-Ting Cheng, Angela Krstic: Current Directions in Automatic Test-Pattern Generation. IEEE Computer 32(11): 58-64 (1999)
92EEKwang-Ting Cheng, Shi-Yu Huang, Wei-Jin Dai: Fault emulation: A new methodology for fault grading. IEEE Trans. on CAD of Integrated Circuits and Systems 18(10): 1487-1495 (1999)
91EEAngela Krstic, Kwang-Ting Cheng, Srimat T. Chakradhar: Primitive delay faults: identification, testing, and design for testability. IEEE Trans. on CAD of Integrated Circuits and Systems 18(6): 669-684 (1999)
90EEShi-Yu Huang, Kwang-Ting Cheng: ErrorTracer: design error diagnosis based on fault simulation techniques. IEEE Trans. on CAD of Integrated Circuits and Systems 18(9): 1341-1352 (1999)
89EEShi-Yu Huang, Kuang-Chien Chen, Kwang-Ting Cheng: AutoFix: a hybrid tool for automatic logic rectification. IEEE Trans. on CAD of Integrated Circuits and Systems 18(9): 1376-1384 (1999)
1998
88 Yi-Min Jiang, Shi-Yu Huang, Kwang-Ting Cheng, Deborah C. Wang, ChingYen Ho: A Hybrid Power Model for RTL Power Estimation. ASP-DAC 1998: 551-556
87EEShi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen, Juin-Yeu Joseph Lu: Fault-Simulation Based Design Error Diagnosis for Sequential Circuits. DAC 1998: 632-637
86EEDouglas Chang, Kwang-Ting Cheng, Malgorzata Marek-Sadowska, Mike Tien-Chien Lee: Functional Scan Chain Testing. DATE 1998: 278-
85EEYi-Min Jiang, Kwang-Ting Cheng: Exact and Approximate Estimation for Maximum Instantaneous Current of CMOS Circuits. DATE 1998: 698-
84EEYi-Min Jiang, Kwang-Ting Cheng, An-Chang Deng: Estimation of maximum power supply noise for deep sub-micron designs. ISLPED 1998: 233-238
83EEChung-Yang Huang, Yucheng Wang, Kwang-Ting Cheng: LIBRA - a library-independent framework for post-layout performance optimization. ISPD 1998: 135-140
82EEHuan-Chih Tsai, Sudipta Bhawmik, Kwang-Ting Cheng: An almost full-scan BIST solution-higher fault coverage and shorter test application time. ITC 1998: 1065-
81EEHuan-Chih Tsai, Kwang-Ting Cheng, Chih-Jen Lin, Sudipta Bhawmik: Efficient test-point selection for scan-based BIST. IEEE Trans. VLSI Syst. 6(4): 667-676 (1998)
80EEDavid Ihsin Cheng, Kwang-Ting Cheng, Deborah C. Wang, Malgorzata Marek-Sadowska: A hybrid methodology for switching activities estimation. IEEE Trans. on CAD of Integrated Circuits and Systems 17(4): 357-366 (1998)
79EEChih-Chang Lin, Malgorzata Marek-Sadowska, Kwang-Ting Cheng, Mike Tien-Chien Lee: Test-point insertion: scan paths through functional logic. IEEE Trans. on CAD of Integrated Circuits and Systems 17(9): 838-851 (1998)
1997
78EEAngela Krstic, Kwang-Ting Cheng: Vector Generation for Maximum Instantaneous Current Through Supply Lines for CMOS Circuits. DAC 1997: 383-388
77EEDouglas Chang, Mike Tien-Chien Lee, Malgorzata Marek-Sadowska, Takashi Aikyo, Kwang-Ting Cheng: A Test Synthesis Approach to Reducing BALLAST DFT Overhead. DAC 1997: 466-471
76EEHuan-Chih Tsai, Kwang-Ting Cheng, Chih-Jen Lin, Sudipta Bhawmik: A Hybrid Algorithm for Test Point Selection for Scan-Based BIST. DAC 1997: 478-483
75EEYi-Min Jiang, Angela Krstic, Kwang-Ting Cheng, Malgorzata Marek-Sadowska: Post-Layout Logic Restructuring for Performance Optimization. DAC 1997: 662-665
74EEKwang-Ting Cheng: National Science Foundation Workshop on Future Research Directions in Testing of Electronic Circuits and Systems: executive summary of workshop report. ITC 1997: 1157-
73 Angela Krstic, Kwang-Ting Cheng, Srimat T. Chakradhar: Design for Primitive Delay Fault Testability. ITC 1997: 436-445
72 Jiun-Lang Huang, Kwang-Ting Cheng: Analog Fault Diagnosis for Unpowered Circuit Boards. ITC 1997: 640-648
71 Chen-Yang Pan, Kwang-Ting Cheng: Fault Macromodeling for Analog/Mixed-Signal Circuits. ITC 1997: 913-922
70 Shi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen, David Ihsin Cheng: Error Tracer: A Fault-Simualtion-Based Approach to Design Error Diagnosis. ITC 1997: 974-981
69EEShi-Yu Huang, Kuang-Chien Chen, Kwang-Ting Cheng: Incremental logic rectification. VTS 1997: 143-149
68EEChen-Yang Pan, Kwang-Ting Cheng: Pseudorandom testing for mixed-signal circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 16(10): 1173-1185 (1997)
67EEShih-Chieh Chang, Kwang-Ting Cheng, Nam Sung Woo, Malgorzata Marek-Sadowska: Postlayout logic restructuring using alternative wires. IEEE Trans. on CAD of Integrated Circuits and Systems 16(6): 587-596 (1997)
66EEAngela Krstic, Kwang-Ting Cheng: Resynthesis of Combinational Circuits for Path Count Reduction and for Path Delay Fault Testability. J. Electronic Testing 11(1): 43-54 (1997)
1996
65EEHisashi Kondo, Kwang-Ting Cheng: An Efficient Compact Test Generator for IDDQ Testing. Asian Test Symposium 1996: 177-182
64EEKwang-Ting Cheng: Built-In Self Test for Analog and Mixed-Signal Designs. Asian Test Symposium 1996: 197-198
63EEShi-Yu Huang, Kuang-Chien Chen, Kwang-Ting Cheng, Tien-Chien Lee: Compact Vector Generation for Accurate Power Simulation. DAC 1996: 161-164
62EEShi-Yu Huang, Kuang-Chien Chen, Kwang-Ting Cheng: Error Correction Based on Verification Techniques. DAC 1996: 258-261
61EEChih-Chang Lin, Malgorzata Marek-Sadowska, Kwang-Ting Cheng, Mike Tien-Chien Lee: Test Point Insertion: Scan Paths through Combinational Logic. DAC 1996: 268-273
60EEDavid Ihsin Cheng, Kwang-Ting Cheng, Deborah C. Wang, Malgorzata Marek-Sadowska: A New Hybrid Methodology for Power Estimation. DAC 1996: 439-444
59EEShi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen: On Verifying the Correctness of Retimed Circuits. Great Lakes Symposium on VLSI 1996: 277-
58EEHisashi Kondo, Kwang-Ting Cheng: Driving toward higher IDDQ test quality for sequential circuits: a generalized fault model and its ATPG. ICCAD 1996: 228-232
57EEShi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen, Mike Tien-Chien Lee: A novel methodology for transistor-level power estimation. ISLPED 1996: 67-72
56 Angela Krstic, Kwang-Ting Cheng, Srimat T. Chakradhar: Identification and Test Generation for Primitive Faults. ITC 1996: 423-432
55 Shi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen, Uwe Gläser: An ATPG-Based Framework for Verifying Sequential Equivalence. ITC 1996: 865-874
54EEChen-Yang Pan, Kwang-Ting Cheng: Implicit functional testing for analog circuits. VTS 1996: 489-494
53EEKwang-Ting Cheng, A. S. Krishnakumar: Automatic generation of functional vectors using the extended finite state machine model. ACM Trans. Design Autom. Electr. Syst. 1(1): 57-79 (1996)
52EEKwang-Ting Cheng: Gate-level test generation for sequential circuits. ACM Trans. Design Autom. Electr. Syst. 1(4): 405-442 (1996)
51 Kwang-Ting Cheng, Angela Krstic, Hsi-Chuan Chen: Generation of High Quality Tests for Robustly Untestable Path Delay Faults. IEEE Trans. Computers 45(12): 1379-1392 (1996)
50EEShih-Chieh Chang, Malgorzata Marek-Sadowska, Kwang-Ting Cheng: Perturb and simplify: multilevel Boolean network optimizer. IEEE Trans. on CAD of Integrated Circuits and Systems 15(12): 1494-1504 (1996)
49EEKwang-Ting Cheng, Hsi-Chuan Chen: Classification and identification of nonrobust untestable path delay faults. IEEE Trans. on CAD of Integrated Circuits and Systems 15(8): 845-853 (1996)
48EEChen-Yang Pan, Kwang-Ting Cheng, Sandeep Gupta: Fault macromodeling and a testing strategy for opamps. J. Electronic Testing 9(3): 225-235 (1996)
1995
47EEUwe Gläser, Kwang-Ting Cheng: Logic optimization by an improved sequential redundancy addition and removal techniques. ASP-DAC 1995
46EEUwe Sparmann, D. Luxenburger, Kwang-Ting Cheng, Sudhakar M. Reddy: Fast Identification of Robust Dependent Path Delay Faults. DAC 1995: 119-125
45EEChih-Chang Lin, Kuang-Chien Chen, Shih-Chieh Chang, Malgorzata Marek-Sadowska, Kwang-Ting Cheng: Logic Synthesis for Engineering Change. DAC 1995: 647-652
44EEShih-Chieh Chang, Malgorzata Marek-Sadowska, Kwang-Ting Cheng: An Efficient Algorithm for Local Don't Care Sets Calculation. DAC 1995: 663-667
43EEChen-Yang Pan, Kwang-Ting Cheng: Pseudo-random testing and signature analysis for mixed-signal circuits. ICCAD 1995: 102-107
42EEKwang-Ting Cheng, Shi-Yu Huang, Wei-Jin Dai: Fault emulation: a new approach to fault grading. ICCAD 1995: 681-686
41 Kwang-Ting Cheng, Chih-Jen Lin: Timing-Driven Test Point Insertion for Full-Scan and Partial-Scan BIST. ITC 1995: 506-514
40EEKwang-Ting Cheng: Partial scan designs without using a separate scan clock. VTS 1995: 277-282
39EEAngela Krstic, Kwang-Ting Cheng: Generation of high quality tests for functional sensitizable paths. VTS 1995: 374-379
38EEKwang-Ting (Tim) Cheng: Single-Clock Partial Scan. IEEE Design & Test of Computers 12(2): 24-31 (1995)
37EEJing-Yang Jou, Kwang-Ting (Tim) Cheng: Timing-Driven Partial Scan. IEEE Design & Test of Computers 12(4): 52-59 (1995)
36EELuis Entrena-Arrontes, Kwang-Ting Cheng: Combinational and sequential logic optimization by redundancy addition and removal. IEEE Trans. on CAD of Integrated Circuits and Systems 14(7): 909-916 (1995)
1994
35EEShih-Chieh Chang, Kwang-Ting Cheng, Nam Sung Woo, Malgorzata Marek-Sadowska: Layout Driven Logic Synthesis for FPGAs. DAC 1994: 308-313
34EEKwang-Ting Cheng, Hsi-Chuan Chen: Generation of High Quality Non-Robust Tests for Path Delay Faults. DAC 1994: 365-369
33EEA. S. Krishnakumar, Kwang-Ting Cheng: On the Computation of the Set of Reachable States of Hybrid Models. DAC 1994: 615-621
32EEChen-Yang Pan, Kwang-Ting Cheng, Sandeep Gupta: A comprehensive fault macromodel for opamps. ICCAD 1994: 344-348
1993
31EEKwang-Ting Cheng, A. S. Krishnakumar: Automatic Functional Test Generation Using the Extended Finite State Machine Model. DAC 1993: 86-91
30EELuis Entrena, Kwang-Ting Cheng: Sequential logic optimization by redundancy addition and removal. ICCAD 1993: 310-315
29 Kwang-Ting Cheng, Hsi-Chuan Chen: Delay Testing for Non-Robust Untestable Circuits. ITC 1993: 954-961
28 Wayne Wei-Ming Dai, Kwang-Ting (Tim) Cheng: Guest Editor's Introduction. IEEE Design & Test of Computers 10(4): 7- (1993)
27EEKwang-Ting Cheng: Redundancy removal for sequential circuits without reset states. IEEE Trans. on CAD of Integrated Circuits and Systems 12(1): 13-24 (1993)
26EEKwang-Ting Cheng, Hi-Keung Tony Ma: On the over-specification problem in sequential ATPG algorithms. IEEE Trans. on CAD of Integrated Circuits and Systems 12(10): 1599-1604 (1993)
25EEKwang-Ting Cheng: Transition fault testing for sequential circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 12(12): 1971-1983 (1993)
24EEIrith Pomeranz, Kwang-Ting Cheng: STOIC: state assignment based on output/input functions. IEEE Trans. on CAD of Integrated Circuits and Systems 12(8): 1123-1131 (1993)
23EEKwang-Ting Cheng, Srinivas Devadas, Kurt Keutzer: Delay-fault test generation and synthesis for testability under a standard scan design methodology. IEEE Trans. on CAD of Integrated Circuits and Systems 12(8): 1217-1231 (1993)
1992
22EEKwang-Ting Cheng, Hi-Keung Tony Ma: On the Over-Specification Problem in Sequential ATPG Algorithms. DAC 1992: 16-21
21EEIrith Pomeranz, Kwang-Ting Cheng: State Assignment Using Input/Output Functions. DAC 1992: 573-577
20EEKwang-Ting Cheng: Test generation for delay faults in non-scan and partial scan sequential circuits. ICCAD 1992: 554-559
19 Kwang-Ting Cheng: Transition Fault Simulation for Sequential Circuits. ITC 1992: 723-731
18 Kwang-Ting Cheng, Vishwani D. Agrawal: Initializability Consideration in Sequential Machine Synthesis. IEEE Trans. Computers 41(3): 374-379 (1992)
17EEKwang-Ting Cheng, Jing-Yang Jou: A functional fault model for sequential machines. IEEE Trans. on CAD of Integrated Circuits and Systems 11(9): 1065-1073 (1992)
1991
16EEKwang-Ting Cheng: On Removing Redundancy in Sequential Circuits. DAC 1991: 164-169
15EEKwang-Ting Cheng, Srinivas Devadas, Kurt Keutzer: Robust Delay-Fault Test Generation and Synthesis for Testability Under A Standard Scan Design Methodology. DAC 1991: 80-86
14 Kwang-Ting Cheng: An ATPG-Based Approach to Sequential Logic Optimization. ICCAD 1991: 372-375
13 Jing-Yang Jou, Kwang-Ting Cheng: Timing-Driven Partial Scan. ICCAD 1991: 404-407
12 Kwang-Ting Cheng, Srinivas Devadas, Kurt Keutzer: A Partial Enhanced-Scan Approach to Robust Delay-Fault Test Generation for Sequential Circuits. ITC 1991: 403-410
1990
11EEVishwani D. Agrawal, Kwang-Ting Cheng: Test Function Specification in Synthesis. DAC 1990: 235-240
10EEKwang-Ting Cheng, Vishwani D. Agrawal: An Entropy Measure for the Complexity of Multi-Output Boolean Functions. DAC 1990: 302-305
9EEVishwani D. Agrawal, Kwang-Ting Cheng: An architecture for synthesis of testable finite state machines. EURO-DAC 1990: 612-616
8 Kwang-Ting Cheng, Jing-Yang Jou: A Single-State-Transition Fault Model for Sequential Machines. ICCAD 1990: 226-229
7 Alexander Saldanha, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli, Kwang-Ting Cheng: Timing Optimization with Testability Considerations. ICCAD 1990: 460-463
6 Kwang-Ting Cheng, Vishwani D. Agrawal, Ernest S. Kuh: A Simulation-Based Method for Generating Tests for Sequential Circuits. IEEE Trans. Computers 39(12): 1456-1463 (1990)
5 Kwang-Ting Cheng, Vishwani D. Agrawal: A Partial Scan Method for Sequential Circuits with Feedback. IEEE Trans. Computers 39(4): 544-549 (1990)
4EEVishwani D. Agrawal, Kwang-Ting Cheng: Finite state machine synthesis with embedded test function. J. Electronic Testing 1(3): 221-228 (1990)
1989
3 Prathima Agrawal, Vishwani D. Agrawal, Kwang-Ting Cheng, R. Tutundjian: Fault Simulation in a Pipelined Multiprocessor System. ITC 1989: 727-734
2EEVishwani D. Agrawal, Kwang-Ting Cheng, Prathima Agrawal: A directed search method for test generation using a concurrent simulator. IEEE Trans. on CAD of Integrated Circuits and Systems 8(2): 131-138 (1989)
1988
1EEVishwani D. Agrawal, Kwang-Ting Cheng, Prathima Agrawal: Contest: A Concurrent Test Generator for Sequential Circuits. DAC 1988: 84-89

Coauthor Index

1Magdy S. Abadir [143] [159] [163] [181]
2Prathima Agrawal [1] [2] [3]
3Vishwani D. Agrawal [1] [2] [3] [4] [5] [6] [9] [10] [11] [18] [119] [120] [122]
4Takashi Aikyo [77]
5Shai Avidan [193] [214]
6Sudipta Bhawmik [76] [81] [82] [99] [101]
7Robert K. Brayton [7]
8Melvin A. Breuer [118]
9Forrest Brewer [103] [197] [200]
10Kenneth M. Butler [154]
11Srimat T. Chakradhar [56] [73] [91] [95] [100] [195] [196] [212] [213] [220]
12Chengwei Chang [138] [145] [152]
13Douglas Chang [77] [86]
14Edward Y. Chang [133] [137] [138] [144] [145] [152]
15Hsiu-Ming Chang [230]
16Shih-Chieh Chang [35] [44] [45] [50] [67]
17Ying-Tsai Chang [134] [150] [167]
18Mango Chia-Tso Chao [180] [195] [196] [212] [213] [220]
19Chin-Hsuan Chen [230]
20Hsi-Chuan Chen [29] [34] [49] [51]
21Ji-Jan Chen [191]
22Kuang-Chien Chen [45] [55] [57] [59] [62] [63] [69] [70] [87] [89] [103] [127] [199]
23Li Chen [139] [149]
24David Ihsin Cheng [60] [70] [80]
25Shih-Wei Chu [229]
26Michael Crandell [152]
27Wayne Wei-Ming Dai [28]
28Wei-Jin Dai [42] [92]
29An-Chang Deng [84]
30Srinivas Devadas [12] [15] [23]
31Sujit Dey [115] [139] [149]
32Jennifer Dworak [142] [148]
33Luis Entrena (Luis Entrena-Arrontes) [30] [36]
34Tao Feng [143] [178] [185] [189]
35Uwe Gläser [47] [55]
36Kingshy Goh [137]
37Gokhan Guner [109]
38Sandeep Gupta [32] [48]
39Ziyad Hanna [165] [166] [216]
40ChingYen Ho [88]
41Dongwoo Hong [171] [172] [179] [187] [223] [227]
42Hao-Chiao Hong [151] [183]
43Chen-Cha Hsu [145]
44Chung-Yang Huang [83] [103] [108] [116] [125]
45Jing-Reng Huang [117] [129] [130]
46Jiun-Lang Huang [72] [94] [106] [111] [114] [121] [128] [151]
47Ric C.-Y. Huang [162]
48Shi-Yu Huang [42] [55] [57] [59] [62] [63] [69] [70] [87] [88] [89] [90] [92] [103] [127]
49Tsung-Ching Huang [224] [225]
50Madhu K. Iyer [130] [140] [143] [161] [170] [182] [186] [197] [198] [199] [200]
51Yi-Min Jiang [75] [84] [85] [88] [96] [97] [98] [102] [112] [113] [124] [126] [131] [132] [153]
52Jing-Yang Jou [8] [13] [17] [37] [120]
53Rohit Kapur [142] [148]
54Kurt Keutzer [12] [15] [23]
55Han Young Koh [132]
56Hisashi Kondo [58] [65]
57A. S. Krishnakumar [31] [33] [53]
58Angela Krstic [39] [51] [56] [66] [73] [75] [78] [91] [93] [95] [96] [100] [102] [104] [107] [110] [112] [113] [123] [124] [131] [135] [139] [147] [149] [153] [155] [157] [159] [160] [163] [164] [169]
59Ernest S. Kuh [6]
60Sandip Kundu [123] [135] [176]
61Chen-Pang Kung [224] [225]
62Wei-Cheng Lai [104] [107] [110] [129] [133] [136] [138] [139] [144] [145] [149] [152]
63Leonard Lee [159] [175]
64Mike Tien-Chien Lee [57] [61] [77] [79] [86]
65Tien-Chien Lee [63]
66Beitao Li [133]
67Chih-Chan Lin [178] [189]
68Chih-Chang Lin [45] [61] [79]
69Chih-Jen Lin [41] [76] [81]
70Kuan-Yu Lin [230]
71Mitchell Lin [221]
72Yung-Chieh Lin [190] [194] [201] [202] [210] [218]
73Jing-Jia Liou [105] [113] [123] [131] [135] [142] [146] [147] [148] [153] [155] [160] [163] [164] [168]
74Wei-Ting Liu [191]
75Feng Lu [162] [165] [166] [190] [194] [199] [201] [202] [218]
76Juin-Yeu Joseph Lu [87]
77D. Luxenburger [46]
78Hi-Keung Tony Ma [22] [26]
79T. M. Mak [156] [157] [164] [169] [175] [181] [208]
80Malgorzata Marek-Sadowska [35] [44] [45] [50] [60] [61] [67] [75] [77] [79] [80] [86]
81M. Ray Mercer [142] [148] [159]
82John Moondanos [165] [166] [216]
83Deb Aditya Mukherjee [105] [123]
84Chee-Kian Ong [106] [114] [117] [141] [171] [172] [179] [187]
85Chen-Yang Pan [32] [43] [48] [54] [68] [71] [94]
86Sung-Jui (Song-Ra) Pan [216] [222]
87Ganapathy Parthasarathy [143] [161] [170] [182] [186] [197] [198] [199] [200]
88Irith Pomeranz [21] [24]
89Sudhakar M. Reddy [46]
90Mike Rodgers [115]
91Kaushik Roy [115] [156] [208]
92Subrata Roy [109]
93Rob A. Rutenbar [176]
94Shadi Saberi [223]
95Alexander Saldanha [7]
96Alberto L. Sangiovanni-Vincentelli [7]
97Uwe Sparmann [46]
98Charles E. Stroud [226]
99Jan Arild Tofte [106]
100Huan-Chih Tsai [76] [81] [82] [99] [101] [108] [122]
101Huai-Yuan Tseng [224] [225]
102R. Tutundjian [3]
103Deborah C. Wang [60] [80] [88]
104Laung-Terng Wang [226]
105Li-C. Wang [120] [142] [143] [146] [147] [148] [154] [155] [157] [159] [160] [162] [163] [164] [165] [166] [168] [169] [170] [171] [175] [176] [178] [179] [180] [181] [182] [184] [185] [186] [187] [189] [191] [199] [203]
106Seongmoon Wang [195] [196] [212] [213] [220]
107Yucheng Wang [83]
108Wenlong Wei [212] [213] [220]
109Charles H.-P. Wen [191] [203]
110Thomas W. Williams [142] [148] [159]
111Nam Sung Woo [35] [67]
112Cheng-Wen Wu [117] [151] [183]
113Chi-Feng Wu [120]
114Ching-Tung Wu [138] [145] [174] [177] [188] [192]
115Shianling Wu [120]
116Yi-Leh Wu [138] [145] [177] [188] [192]
117Bwolen Yang [108]
118Kai Yang [184] [191] [201] [211] [215] [219]
119Mei-Chen Yeh [214] [217] [228] [229]
120Tak K. Young [97]
121C. Patrick Yue [223]
122HongJiang Zhang (Hong-Jiang Zhang) [173]
123Qiang Zhu [173] [174] [177] [188] [192] [193] [214] [217]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)