2008 | ||
---|---|---|
21 | EE | Yves Vanderperren, Wim Dehaene: A subsampling pulsed UWB demodulator based on a flexible complex SVD. ASAP 2008: 114-119 |
20 | EE | Marian Verhelst, Julien Ryckaert, Yves Vanderperren, Wim Dehaene: A Low Power, Reconfigurable IR-UWB System. ICC 2008: 3770-3774 |
19 | EE | Jorg Daniels, Wim Dehaene, Michiel Steyaert, Andreas Wiesbauer: A/D conversion using an Asynchronous Delta-Sigma Modulator and a time-to-digital converter. ISCAS 2008: 1648-1651 |
18 | EE | Hans Danneels, Marian Verhelst, Pieter Palmers, Wim Vereecken, Bruno Boury, Wim Dehaene, Michiel Steyaert, Georges G. E. Gielen: A low-power mixing DAC IR-UWB-receiver. ISCAS 2008: 2697-2700 |
17 | EE | Hua Wang, Francky Catthoor, Miguel Miranda, Wim Dehaene: Synthesis of Runtime Switchable Pareto Buffers Offering Full Range Fine Grained Energy/Delay Trade-Offs. Signal Processing Systems 52(2): 193-210 (2008) |
2007 | ||
16 | EE | Georges G. E. Gielen, Wim Dehaene, Phillip Christie, Dieter Draxelmayr, Edmond Janssens, Karen Maex, Ted Vucurevich: Analog and Digital Circuit Design in 65 nm CMOS: End of the Road? CoRR abs/0710.4709: (2007) |
15 | EE | Bruno Bougard, Francky Catthoor, Denis C. Daly, Anantha Chandrakasan, Wim Dehaene: Energy Efficiency of the IEEE 802.15.4 Standard in Dense Wireless Microsensor Networks: Modeling and Improvement Perspectives CoRR abs/0710.4732: (2007) |
2006 | ||
14 | EE | Yves Vanderperren, Wim Dehaene: From UML/SysML to Matlab/Simulink: current state and future perspectives. DATE 2006: 93 |
13 | EE | Wolfgang Mueller, Alberto Rosti, Sara Bocchio, Elvinia Riccobene, Patrizia Scandurra, Wim Dehaene, Yves Vanderperren: UML for ESL design: basic principles, tools, and applications. ICCAD 2006: 73-80 |
12 | EE | Evelyn Grossar, Michele Stucchi, Karen Maex, Wim Dehaene: Statistically Aware SRAM Memory Array Design. ISQED 2006: 25-30 |
11 | EE | Hua Wang, Miguel Miranda, Francky Catthoor, Wim Dehaene: On the Combined Impact of Soft and Medium Gate Oxide Breakdown and Process Variability on the Parametric Figures of SRAM components. MTDT 2006: 71-76 |
10 | EE | Bruno Bougard, Sofie Pollin, Antoine Dejonghe, Francky Catthoor, Wim Dehaene: Cross-layer power management in wireless networks and consequences on system-level architecture. Signal Processing 86(8): 1792-1803 (2006) |
2005 | ||
9 | EE | Bruno Bougard, Francky Catthoor, Denis C. Daly, Anantha Chandrakasan, Wim Dehaene: Energy Efficiency of the IEEE 802.15.4 Standard in Dense Wireless Microsensor Networks: Modeling and Improvement Perspectives. DATE 2005: 196-201 |
8 | EE | Georges G. E. Gielen, Wim Dehaene, Phillip Christie, Dieter Draxelmayr, Edmond Janssens, Karen Maex, Ted Vucurevich: Analog and Digital Circuit Design in 65 nm CMOS: End of the Road? DATE 2005: 36-42 |
7 | EE | Yves Vanderperren, Wim Dehaene: UML 2 and SysML: An Approach to Deal with Complexity in SoC/NoC Design. DATE 2005: 716-717 |
6 | EE | Hua Wang, Miguel Miranda, Wim Dehaene, Francky Catthoor, Karen Maex: Systematic Analysis of Energy and Delay Impact of Very Deep Submicron Process Variability Effects in Embedded SRAM Modules. DATE 2005: 914-919 |
5 | EE | Yves Vanderperren, Wim Dehaene: The SysML profile for embedded system modelling. FDL 2005: 589-598 |
4 | EE | Hua Wang, Miguel Miranda, Antonis Papanikolaou, Francky Catthoor, Wim Dehaene: Variable tapered pareto buffer design and implementation allowing run-time configuration for low-power embedded SRAMs. IEEE Trans. VLSI Syst. 13(10): 1127-1135 (2005) |
3 | EE | Bruno Bougard, M. Rullmann, Erik Brockmeyer, Liesbet Van der Perre, Francky Catthoor, Wim Dehaene: Energy Efficient Memory Architecture for High Speed Decoding of Block Turbo-Codes with the Fang-Buda Algorithm. VLSI Signal Processing 39(1-2): 79-92 (2005) |
2004 | ||
2 | EE | Marian Verhelst, Wim Vereecken, Michiel Steyaert, Wim Dehaene: Architectures for low power ultra-wideband radio receivers in the 3.1-5GHz band for data rates < 10Mbps. ISLPED 2004: 280-285 |
2003 | ||
1 | EE | Ali Sayinta, Gorkem Canverdi, Marc Pauwels, Amer Alshawa, Wim Dehaene: A Mixed Abstraction Level Co-Simulation Case Study Using SystemC for System on Chip Verification. DATE 2003: 20095-20100 |