| 2009 |
|---|
| 18 | EE | Cesare Ferri,
R. Iris Bahar,
Mirko Loghi,
Massimo Poncino:
Energy-optimal synchronization primitives for single-chip multi-processors.
ACM Great Lakes Symposium on VLSI 2009: 141-144 |
| 17 | EE | Franco Fummi,
Mirko Loghi,
Massimo Poncino,
Graziano Pravadelli:
A cosimulation methodology for HW/SW validation and performance estimation.
ACM Trans. Design Autom. Electr. Syst. 14(2): (2009) |
| 2007 |
|---|
| 16 | EE | Olga Golubeva,
Mirko Loghi,
Massimo Poncino:
On the energy efficiency of synchronization primitives for shared-memory single-chip multiprocessors.
ACM Great Lakes Symposium on VLSI 2007: 489-492 |
| 15 | EE | Olga Golubeva,
Mirko Loghi,
Massimo Poncino,
Enrico Macii:
Architectural leakage-aware management of partitioned scratchpad memories.
DATE 2007: 1665-1670 |
| 14 | EE | Olga Golubeva,
Mirko Loghi,
Enrico Macii,
Massimo Poncino:
Locality-driven architectural cache sub-banking for leakage energy reduction.
ISLPED 2007: 274-279 |
| 13 | EE | Mirko Loghi,
Luca Benini,
Massimo Poncino:
Power macromodeling of MPSoC message passing primitives.
ACM Trans. Embedded Comput. Syst. 6(4): (2007) |
| 12 | EE | Francesco Poletti,
Antonio Poggiali,
Davide Bertozzi,
Luca Benini,
Pol Marchal,
Mirko Loghi,
Massimo Poncino:
Energy-Efficient Multiprocessor Systems-on-Chip for Embedded Computing: Exploring Programming Models and Their Architectural Support.
IEEE Trans. Computers 56(5): 606-621 (2007) |
| 2006 |
|---|
| 11 | EE | Franco Fummi,
Giovanni Perbellini,
Mirko Loghi,
Massimo Poncino:
ISS-centric modular HW/SW co-simulation.
ACM Great Lakes Symposium on VLSI 2006: 31-36 |
| 10 | EE | Mirko Loghi,
Massimo Poncino,
Luca Benini:
Synchronization-driven dynamic speed scaling for MPSoCs.
ISLPED 2006: 346-349 |
| 9 | EE | Mirko Loghi,
Massimo Poncino,
Luca Benini:
Cache coherence tradeoffs in shared-memory MPSoCs.
ACM Trans. Embedded Comput. Syst. 5(2): 383-407 (2006) |
| 2005 |
|---|
| 8 | EE | Mirko Loghi,
Martin Letis,
Luca Benini,
Massimo Poncino:
Exploring the energy efficiency of cache coherence protocols in single-chip multi-processors.
ACM Great Lakes Symposium on VLSI 2005: 276-281 |
| 7 | EE | Mirko Loghi,
Massimo Poncino:
Exploring Energy/Performance Tradeoffs in Shared Memory MPSoCs: Snoop-Based Cache Coherence vs. Software Solutions.
DATE 2005: 508-513 |
| 6 | EE | Mirko Loghi,
Paolo Azzoni,
Massimo Poncino:
Tag Overflow Buffering: An Energy-Efficient Cache Architecture.
DATE 2005: 520-525 |
| 5 | EE | Franco Fummi,
Mirko Loghi,
Stefano Martini,
Marco Monguzzi,
Giovanni Perbellini,
Massimo Poncino:
Virtual Hardware Prototyping through Timed Hardware-Software Co-Simulation.
DATE 2005: 798-803 |
| 4 | EE | Mirko Loghi,
Tiziana Margaria,
Graziano Pravadelli,
Bernhard Steffen:
Dynamic and Formal Verification of Embedded Systems: A Comparative Survey.
International Journal of Parallel Programming 33(6): 585-611 (2005) |
| 2004 |
|---|
| 3 | EE | Mirko Loghi,
Massimo Poncino,
Luca Benini:
Cycle-accurate power analysis for multiprocessor systems-on-a-chip.
ACM Great Lakes Symposium on VLSI 2004: 410-406 |
| 2 | EE | Mirko Loghi,
Federico Angiolini,
Davide Bertozzi,
Luca Benini,
Roberto Zafalon:
Analyzing On-Chip Communication in a MPSoC Environment.
DATE 2004: 752-757 |
| 1 | EE | Mirko Loghi,
Luca Benini,
Massimo Poncino:
Analyzing Power Consumption of Message Passing Primitives in a Single-Chip Multiprocessor.
ICCD 2004: 393-396 |
