| 2008 |
|---|
| 8 | EE | Jianjiang Ceng,
Jerónimo Castrillón,
Weihua Sheng,
Hanno Scharwächter,
Rainer Leupers,
Gerd Ascheid,
Heinrich Meyr,
Tsuyoshi Isshiki,
Hiroaki Kunieda:
MAPS: an integrated framework for MPSoC application parallelization.
DAC 2008: 754-759 |
| 2007 |
|---|
| 7 | EE | Hanno Scharwächter,
David Kammler,
Andreas Wieferink,
Manuel Hohenauer,
Kingshuk Karuri,
Jianjiang Ceng,
Rainer Leupers,
Gerd Ascheid,
Heinrich Meyr:
ASIP architecture exploration for efficient IPSec encryption: A case study.
ACM Trans. Embedded Comput. Syst. 6(2): (2007) |
| 2006 |
|---|
| 6 | EE | Federico Angiolini,
Jianjiang Ceng,
Rainer Leupers,
Federico Ferrari,
Cesare Ferri,
Luca Benini:
An integrated open framework for heterogeneous MPSoC design space exploration.
DATE 2006: 1145-1150 |
| 5 | EE | Jianjiang Ceng,
Weihua Sheng,
Manuel Hohenauer,
Rainer Leupers,
Gerd Ascheid,
Heinrich Meyr,
Gunnar Braun:
Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting.
VLSI Signal Processing 43(2-3): 235-246 (2006) |
| 2005 |
|---|
| 4 | EE | Jianjiang Ceng,
Manuel Hohenauer,
Rainer Leupers,
Gerd Ascheid,
Heinrich Meyr,
Gunnar Braun:
C Compiler Retargeting Based on Instruction Semantics Models.
DATE 2005: 1150-1155 |
| 2004 |
|---|
| 3 | EE | Gunnar Braun,
Achim Nohl,
Weihua Sheng,
Jianjiang Ceng,
Manuel Hohenauer,
Hanno Scharwächter,
Rainer Leupers,
Heinrich Meyr:
A novel approach for flexible and consistent ADL-driven ASIP design.
DAC 2004: 717-722 |
| 2 | EE | Jianjiang Ceng,
Weihua Sheng,
Manuel Hohenauer,
Rainer Leupers,
Gerd Ascheid,
Heinrich Meyr,
Gunnar Braun:
Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting.
SAMOS 2004: 463-473 |
| 1 | EE | Hanno Scharwächter,
David Kammler,
Andreas Wieferink,
Manuel Hohenauer,
Kingshuk Karuri,
Jianjiang Ceng,
Rainer Leupers,
Gerd Ascheid,
Heinrich Meyr:
ASIP Architecture Exploration for Efficient Ipsec Encryption: A Case Study.
SCOPES 2004: 33-46 |
