| 2009 |
| 65 | EE | Yoonjin Kim,
Rabi N. Mahapatra:
Dynamic context management for low power coarse-grained reconfigurable architecture.
ACM Great Lakes Symposium on VLSI 2009: 33-38 |
| 2008 |
| 64 | EE | Ranjani Sridharan,
Nikhil Gupta,
Rabi N. Mahapatra:
Feedback-controlled reliability-aware power management for real-time embedded systems.
DAC 2008: 185-190 |
| 63 | EE | Suman Kalyan Mandal,
Praveen Bhojwani,
Saraju P. Mohanty,
Rabi N. Mahapatra:
IntellBatt: towards smarter battery design.
DAC 2008: 872-877 |
| 62 | EE | Heeyeol Yu,
Rabi N. Mahapatra:
A Throughput-Efficient Packet Classifier with n Bloom filters.
GLOBECOM 2008: 2334-2338 |
| 61 | EE | Jason D. Lee,
Rabi N. Mahapatra:
In-field NoC-based SoC testing with distributed test vector storage.
ICCD 2008: 206-211 |
| 60 | EE | Heeyeol Yu,
Rabi N. Mahapatra:
A Memory-Efficient Hashing by Multi-Predicate Bloom Filters for Packet Classification.
INFOCOM 2008: 1795-1803 |
| 59 | EE | Heeyeol Yu,
Rabi N. Mahapatra:
A space- and time-efficient hash table hierarchically indexed by Bloom filters.
IPDPS 2008: 1-12 |
| 58 | EE | Yoonjin Kim,
Rabi N. Mahapatra:
Reusable context pipelining for low power coarse-grained reconfigurable architecture.
IPDPS 2008: 1-8 |
| 57 | EE | Suman Kalyan Mandal,
Rabi N. Mahapatra:
PowerAntz: distributed power sharing strategy for network on chip.
ISLPED 2008: 177-182 |
| 56 | EE | Damian Dechev,
Rabi N. Mahapatra,
Bjarne Stroustrup,
David Wagner:
C++ Dynamic Cast in Autonomous Space Systems.
ISORC 2008: 499-507 |
| 55 | EE | Jason D. Lee,
Nikhil Gupta,
Praveen Bhojwani,
Rabi N. Mahapatra:
An On-Demand Test Triggering Mechanism for NoC-Based Safety-Critical Systems.
ISQED 2008: 184-189 |
| 54 | EE | Amar Rasheed,
Rabi N. Mahapatra:
Secure Data Collection Scheme in Wireless Sensor Network with Mobile Sink.
NCA 2008: 332-340 |
| 53 | EE | Rupak Samanta,
Jason Surprise,
Rabi N. Mahapatra:
Dynamic Aggregation of Virtual Addresses in TLB Using TCAM Cells.
VLSI Design 2008: 243-248 |
| 52 | EE | John Mark Nolen,
Rabi N. Mahapatra:
Time-Division-Multiplexed Test Delivery for NoC Systems.
IEEE Design & Test of Computers 25(1): 44-51 (2008) |
| 51 | EE | Subrata Acharya,
Rabi N. Mahapatra:
A Dynamic Slack Management Technique for Real-Time Distributed Embedded Systems.
IEEE Trans. Computers 57(2): 215-230 (2008) |
| 50 | EE | Rohit Singhal,
Gwan Choi,
Rabi N. Mahapatra:
Data Handling Limits of On-Chip Interconnects.
IEEE Trans. VLSI Syst. 16(6): 707-713 (2008) |
| 49 | EE | Praveen Bhojwani,
Rabi N. Mahapatra:
Robust Concurrent Online Testing of Network-on-Chip-Based SoCs.
IEEE Trans. VLSI Syst. 16(9): 1199-1209 (2008) |
| 2007 |
| 48 | EE | Praveen Bhojwani,
Rabi N. Mahapatra:
A Robust Protocol for Concurrent On-Line Test (COLT) of NoC-based Systems-on-a-Chip.
DAC 2007: 670-675 |
| 47 | EE | Jason D. Lee,
Praveen Bhojwani,
Rabi N. Mahapatra:
A Safety Analysis Framework for COTS Microprocessors in Safety-Critical Applications.
HASE 2007: 407-408 |
| 46 | EE | Yoonjin Kim,
Rabi N. Mahapatra:
Dynamically compressible context architecture for low power coarse-grained reconfigurable array.
ICCD 2007: 395-400 |
| 45 | EE | Praveen Bhojwani,
Jason D. Lee,
Rabi N. Mahapatra:
SAPP: scalable and adaptable peak power management in nocs.
ISLPED 2007: 340-345 |
| 44 | EE | Praveen Bhojwani,
Rabi N. Mahapatra:
An Infrastructure IP for Online Testing of Network-on-Chip Based SoCs.
ISQED 2007: 867-872 |
| 43 | EE | Rupak Samanta,
Rabi N. Mahapatra:
An Enhanced CAM Architecture to Accelerate LZW Compression Algorithm.
VLSI Design 2007: 824-829 |
| 42 | EE | Ranjani Sridharan,
Rabi N. Mahapatra:
Analysis of RealTime Embedded Applications in the Presence of a Stochastic Fault Model.
VLSI Design 2007: 83-88 |
| 41 | EE | Seraj Ahmad,
Rabi N. Mahapatra:
An Efficient Approach to On-Chip Logic Minimization.
IEEE Trans. VLSI Syst. 15(9): 1040-1050 (2007) |
| 2006 |
| 40 | EE | Rohit Singhal,
Gwan S. Choi,
Rabi N. Mahapatra:
Information theoretic approach to address delay and reliability in long on-chip interconnects.
ICCAD 2006: 310-314 |
| 39 | EE | Praveen Bhojwani,
Rabi N. Mahapatra:
Core Network Interface Architecture and Latency Constrained On-Chip Communication.
ISQED 2006: 358-363 |
| 38 | EE | Rohit Singhal,
Gwan S. Choi,
Rabi N. Mahapatra:
Information Theoretic Capacity of Long On-chip Interconnects in the Presence of Crosstalk.
ISQED 2006: 407-412 |
| 37 | EE | Rohit Singhal,
Gwan S. Choi,
Rabi N. Mahapatra:
Programmable LDPC Decoder Based on the Bubble-Sort Algorithm.
VLSI Design 2006: 203-208 |
| 36 | EE | Di Wu,
Jiang Hu,
Rabi N. Mahapatra:
Antenna Avoidance in Layer Assignment.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(4): 734-738 (2006) |
| 35 | EE | Anand Rajaram,
Jiang Hu,
Rabi N. Mahapatra:
Reducing clock skew variability via crosslinks.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(6): 1176-1182 (2006) |
| 34 | EE | Anand Rajaram,
Bing Lu,
Jiang Hu,
Rabi N. Mahapatra,
Wei Guo:
Analytical bound for unwanted clock skew due to wire width variation.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(9): 1869-1876 (2006) |
| 2005 |
| 33 | EE | Di Wu,
Jiang Hu,
Min Zhao,
Rabi N. Mahapatra:
Timing driven track routing considering coupling capacitance.
ASP-DAC 2005: 1156-1159 |
| 32 | EE | Seraj Ahmad,
Rabi N. Mahapatra:
TCAM enabled on-chip logic minimization.
DAC 2005: 678-683 |
| 31 | | Vivek Rai,
Rabi N. Mahapatra:
Lifetime Modeling of a Sensor Network.
DATE 2005: 202-203 |
| 30 | | Di Wu,
Ganesh Venkataraman,
Jiang Hu,
Quiyang Li,
Rabi N. Mahapatra:
DiCER: distributed and cost-effective redundancy for variation tolerance.
ICCAD 2005: 393-397 |
| 29 | EE | Seraj Ahmad,
Nikhil Jayakumar,
Vijay Balasubramanian,
Edward Hursey,
Sunil P. Khatri,
Rabi N. Mahapatra:
X-Routing using Two Manhattan Route Instances.
ICCD 2005: 45-52 |
| 28 | EE | Rohit Singhal,
Gwan S. Choi,
Rabi N. Mahapatra:
Quantized LDPC decoder design for binary symmetric channels.
ISCAS (6) 2005: 5782-5785 |
| 27 | EE | Di Wu,
Jiang Hu,
Rabi N. Mahapatra:
Coupling aware timing optimization and antenna avoidance in layer assignment.
ISPD 2005: 20-27 |
| 26 | EE | John Mark Nolen,
Rabi N. Mahapatra:
A TDM Test Scheduling Method for Network-on-Chip Systems.
MTV 2005: 90-98 |
| 25 | EE | Praveen Bhojwani,
Rabi N. Mahapatra,
Eun Jung Kim,
Thomas Chen:
A Heuristic for Peak Power Constrained Design of Network-on-Chip (NoC) Based Multimode Systems.
VLSI Design 2005: 124-129 |
| 24 | EE | Anuj Kumar,
Rabi N. Mahapatra:
An integrated scheduling and buffer management scheme for input queued switches with finite buffer space.
Computer Communications 29(1): 42-51 (2005) |
| 23 | EE | V. C. Ravikumar,
Rabi N. Mahapatra,
Laxmi N. Bhuyan:
EaseCAM: An Energy and Storage Efficient TCAM-Based Router Architecture for IP Lookup.
IEEE Trans. Computers 54(5): 521-533 (2005) |
| 22 | EE | Rabi N. Mahapatra,
Wei Zhao:
An Energy-Efficient Slack Distribution Technique for Multimode Distributed Real-Time Embedded Systems.
IEEE Trans. Parallel Distrib. Syst. 16(7): 650-662 (2005) |
| 2004 |
| 21 | EE | Di Wu,
Jiang Hu,
Rabi N. Mahapatra,
Min Zhao:
Layer assignment for crosstalk risk minimization.
ASP-DAC 2004: 159-162 |
| 20 | EE | Anand Rajaram,
Jiang Hu,
Rabi N. Mahapatra:
Reducing clock skew variability via cross links.
DAC 2004: 18-23 |
| 19 | EE | Siddharth Choudhuri,
Rabi N. Mahapatra:
Energy characterization of filesystems for diskless embedded systems.
DAC 2004: 566-569 |
| 18 | EE | Seraj Ahmad,
Rabi N. Mahapatra:
M-trie: an efficient approach to on-chip logic minimization.
ICCAD 2004: 428-435 |
| 17 | EE | V. C. Ravikumar,
Rabi N. Mahapatra:
TCAM Architecture for IP Lookup Using Prefix Properties.
IEEE Micro 24(2): 60-69 (2004) |
| 2003 |
| 16 | EE | Anand Rajaram,
Bing Lu,
Wei Guo,
Rabi N. Mahapatra,
Jiang Hu:
Analytical Bound for Unwanted Clock Skew due to Wire Width Variation.
ICCAD 2003: 401-407 |
| 15 | EE | Manoranjan Satpathy,
Rabi N. Mahapatra,
Siddharth Choudhuri,
Sachin V. Chitnis:
High Performance Code Generation through Lazy Activation Records.
Interaction between Compilers and Computer Architectures 2003: 37-50 |
| 14 | EE | Praveen Bhojwani,
Rabi N. Mahapatra:
Interfacing Cores with On-chip Packet-Switched Networks.
VLSI Design 2003: 382-387 |
| 13 | EE | Rabi N. Mahapatra:
Guest Editorial.
Microelectronics Journal 34(11): 987 (2003) |
| 2002 |
| 12 | EE | V. C. Ravikumar,
Rabi N. Mahapatra,
J. C. Liu:
Modified LC-Trie Based Efficient Routing Lookup.
MASCOTS 2002: 177-182 |
| 2000 |
| 11 | EE | Marius Pirvu,
Laxmi N. Bhuyan,
Rabi N. Mahapatra:
Hierarchical Simulation of a Multiprocessor Architecture.
ICCD 2000: 585-588 |
| 10 | | Sudipta Mahapatra,
Rabi N. Mahapatra:
Mapping of Neural Network Models onto Systolic Arrays.
J. Parallel Distrib. Comput. 60(6): 677-689 (2000) |
| 1997 |
| 9 | | B. K. Das,
Rabi N. Mahapatra,
Biswanath N. Chatterji:
Modeling of Wavelet Transform for De Bruijn Graph Connected Multiprocessors.
PDPTA 1997: 1482-1489 |
| 8 | | Sudipta Mahapatra,
Rabi N. Mahapatra,
B. N. Chatterji:
A Parallel Formulation of Back-Propagation Learning on Distributed Memory Multiprocessors.
Parallel Computing 22(12): 1661-1675 (1997) |
| 1996 |
| 7 | | Rabi N. Mahapatra,
Sudipta Mahapatra:
Mapping of Neural Network Models Onto Two-Dimensional Processor Arrays.
Parallel Computing 22(10): 1345-1357 (1996) |
| 1994 |
| 6 | | Richard P. Brent,
Yong-Kim Chong,
Guo-Jie Li,
Paul B. S. Lin,
Rabi N. Mahapatra,
Myong-Soon,
Makoto Takizawa:
Parallel and Distributed Processing Research in Some Asian Countries.
ICPADS 1994: 26-27 |
| 5 | | Rabi N. Mahapatra,
Jharna Majumdar:
Implementation of Fast Hartley Transform.
ICPADS 1994: 96-101 |
| 1992 |
| 4 | | Rabi N. Mahapatra,
Akhilesh Kumar:
Vector Hartley Transform Employing Multiprocessors.
IPPS 1992: 250-253 |
| 1991 |
| 3 | | Rabi N. Mahapatra,
Harish Pareek:
Modelling a Fast Parallel Thinning Algorithm for Shared Memory SIMD Computers.
Inf. Process. Lett. 40(5): 257-261 (1991) |
| 2 | | Abhijit Datta,
Shirish V. Joshi,
Rabi N. Mahapatra:
Modelling a Morphological thinning Algorithm for Shared Memory SIMD Computers.
Parallel Processing Letters 1: 59-65 (1991) |
| 1990 |
| 1 | | Rabi N. Mahapatra,
V. Ashok Kumar,
B. K. Das,
Biswanath N. Chatterji:
Performance of Parallel FFT Algorithm on Multiprocessors.
ICPP (3) 1990: 368-369 |