V. Kamakoti

2009
55	EE	Lavanya Jagan, Ratan Deep Singh, V. Kamakoti, Ananta K. Majhi: Efficient Grouping of Fail Chips for Volume Yield Diagnostics. VLSI Design 2009: 97-102
2008
54	EE	Siva Kumar Sastry Hari, Vishnu Vardhan Reddy Konda, V. Kamakoti, Vivekananda M. Vedula, K. S. Maneperambil: Automatic Constraint Based Test Generation for Behavioral HDL Models. IEEE Trans. VLSI Syst. 16(4): 408-421 (2008)
2007
53	EE	V. R. Devanathan, C. P. Ravikumar, V. Kamakoti: Interactive presentation: On power-profiling and pattern generation for power-safe scan tests. DATE 2007: 534-539
52	EE	V. R. Devanathan, C. P. Ravikumar, V. Kamakoti: Reducing SoC Test Time and Test Power in Hierarchical Scan Test : Scan Architecture and Algorithms. VLSI Design 2007: 351-356
51	EE	K. Najeeb, Karthik Gururaj, V. Kamakoti, Vivekananda M. Vedula: Controllability-driven Power Virus Generation for Digital Circuits. VLSI Design 2007: 407-412
50	EE	V. R. Devanathan, C. P. Ravikumar, V. Kamakoti: Glitch-Aware Pattern Generation and Optimization Framework for Power-Safe Scan Test. VTS 2007: 167-172
49	EE	K. Najeeb, Vishnu Vardhan Reddy Konda, Siva Kumar Sastry Hari, V. Kamakoti, Vivekananda M. Vedula: Power Virus Generation Using Behavioral Models of Circuits. VTS 2007: 35-42
48	EE	Siva Nageswara Rao Borra, Annamalai Muthukaruppan, S. Suresh, V. Kamakoti: A novel approach to the placement and routing problems for field programmable gate arrays. Appl. Soft Comput. 7(1): 455-470 (2007)
47	EE	Ramachandran Pradeep, S. Vinay, Sanjay Burman, V. Kamakoti: FPGA based Agile Algorithm-On-Demand Co-Processor CoRR abs/0710.4824: (2007)
46	EE	V. R. Devanathan, C. P. Ravikumar, V. Kamakoti: Variation-Tolerant, Power-Safe Pattern Generation. IEEE Design & Test of Computers 24(4): 374-384 (2007)
45	EE	A. Pavan Kumar, V. Kamakoti, Sukhendu Das: System-on-programmable-chip implementation for on-line face recognition. Pattern Recognition Letters 28(3): 342-349 (2007)
2006
44	EE	K. Najeeb, Vishal Gupta, V. Kamakoti, Madhu Mutyam: Delay and peak power minimization for on-chip buses using temporal redundancy. ACM Great Lakes Symposium on VLSI 2006: 119-122
43	EE	Vivek Garg, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti: An Area and Configuration-Bit Optimized CLB Architecture and Timing-Driven Packing for FPGAs. VLSI Design 2006: 507-510
42	EE	Kavish Seth, K. N. Viswajith, S. Srinivasan, V. Kamakoti: Ultra Folded High-Speed Architectures for Reed-Solomon Decoders. VLSI Design 2006: 517-520
41	EE	K. Najeeb, Vishal Gupta, V. Kamakoti, Madhu Mutyam: Temporal Redundancy Based Encoding Technique for Peak Power and Delay Reduction of On-Chip Buses. J. Low Power Electronics 2(3): 425-436 (2006)
40	EE	V. R. Devanathan, C. P. Ravikumar, V. Kamakoti: On Reducing Peak Capture Power of Transition Delay Fault Test for SoCs with Unwrapped Cores. J. Low Power Electronics 2(3): 464-476 (2006)
2005
39	EE	E. Syam Sundar Reddy, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti, Narayanan Vijaykrishnan: Cluster-based detection of SEU-caused errors in LUTs of SRAM-based FPGAs. ASP-DAC 2005: 1200-1203
38	EE	Vivek Garg, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti: A novel CLB architecture and circuit packing algorithm for logic-area reduction in SRAM-based FPGAs. ASP-DAC 2005: 791-794
37	EE	Vivek Garg, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti: A function generator-based reconfigurable system. ASP-DAC 2005: 905-909
36	EE	K. Uday Bhaskar, M. Prasanth, V. Kamakoti, Kailasnath Maneparambil: A Framework for Automatic Assembly Program Generator (A2PG) for Verification and Testing of Processor Cores. Asian Test Symposium 2005: 40-45
35	EE	Ramachandran Pradeep, S. Vinay, Sanjay Burman, V. Kamakoti: FPGA based Agile Algorithm-On-Demand Co-Processor. DATE 2005: 82-83
34	EE	E. Syam Sundar Reddy, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti, Narayanan Vijaykrishnan: Efficient methodology for detection and correction of SEU-based interconnect errors in FPGAs using partial reconfiguration (abstract only). FPGA 2005: 265
33	EE	E. Syam Sundar Reddy, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti, Narayanan Vijaykrishnan: Online Detection and Diagnosis of Multiple Configuration Upsets in LUTs of SRAM-Based FPGAs. IPDPS 2005
32	EE	K. Uday Bhaskar, M. Prasanth, G. Chandramouli, V. Kamakoti: A Universal Random Test Generator for Functional Verification of Microprocessors and System-on-Chip. VLSI Design 2005: 207-212
31	EE	R. Manimegalai, E. Siva Soumya, V. Muralidharan, Balaraman Ravindran, V. Kamakoti, D. Bhatia: Placement and Routing for 3D-FPGAs Using Reinforcement Learning and Support Vector Machines. VLSI Design 2005: 451-456
30	EE	E. Syam Sundar Reddy, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti, Narayanan Vijaykrishnan: Detecting SEU-Caused Routing Errors in SRAM-Based FPGAs. VLSI Design 2005: 736-741
29	EE	Chakka Siva Sai Prasanna, N. Sudha, V. Kamakoti: A Principal Component Neural Network-Based Face Recognition System and Its ASIC Implementation. VLSI Design 2005: 795-798
28	EE	L. Kalyan Kumar, Aditya S. Ramani, Amol J. Mupid, V. Kamakoti: Pseudo-online testing methodologies for various components of field programmable gate arrays. Microprocessors and Microsystems 29(2-3): 99-119 (2005)
2004
27	EE	A. Manoj Kumar, Jayaram Bobba, V. Kamakoti: MemMap: Technology Mapping Algorithm for Area Reduction in FPGAs with Embedded Memory Arrays Using Reconvergence Analysis. DATE 2004: 922-929
26	EE	A. Manoj Kumar, B. Jayaram, V. Kamakoti: SHAPER: synthesis for hybrid FPGA architectures containing PLA elements using reconvergence analysis. FPGA 2004: 251
25	EE	R. Manimegalai, A. Manoj Kumar, B. Jayaram, V. Kamakoti: MemMap-pd: Performance Driven Technology Mapping Algorithm for FPGAs with Embedded Memory Blocks. FPL 2004: 1185
24	EE	Chakka Siva Sai Prasanna, N. Sudha, V. Kamakoti: A Hardware-Directed Face Recognition System Based on Local Eigen-analysis with PCNN. ICONIP 2004: 327-332
23	EE	A. Pavan Kumar, Sukhendu Das, V. Kamakoti: Face Recognition Using Weighted Modular Principle Component Analysis. ICONIP 2004: 362-367
22		A. Pavan Kumar, V. Kamakoti, Sukhendu Das: An Architecture for Real Time Face Recognition Using WMPCA. ICVGIP 2004: 644-649
21	EE	A. Manoj Kumar, B. Jayaram, R. Manimegalai, V. Kamakoti: MemMap-pd: Performance Driven Technology Mapping Algorithm for FPGAs with Embedded Memory Arrays. IPDPS 2004
20	EE	Permandla Pratibha, Siva Nageswara Rao Borra, Annamalai Muthukaruppan, S. Suresh, V. Kamakoti: An Evolutionary Algorithm for Automatic Spatial Partitioning in Reconfigurable Environments. MICAI 2004: 735-745
19	EE	Kavish Seth, P. Rangarajan, S. Srinivasan, V. Kamakoti, V. Bala Kuteshwar: A Parallel Architectural Implementation Of The New Three-Step Search Algorithm For Block Motion Estimation. VLSI Design 2004: 1071-1076
18	EE	P. Subrahmanya, R. Manimegalai, V. Kamakoti, Madhu Mutyam: A Bus Encoding Technique for Power and Cross-talk Minimization. VLSI Design 2004: 443-448
2003
17	EE	L. Kalyan Kumar, Amol J. Mupid, Aditya S. Ramani, V. Kamakoti: A Novel Method for Online In-Place Detection and Location of Multiple Interconnect Faults in SRAM Based FPGAs. Asian Test Symposium 2003: 262-267
16	EE	L. Kalyan Kumar, Amol J. Mupid, Aditya S. Ramani, V. Kamakoti: Testable Clock Routing Architecture for Field Programmable Gate Arrays. FPL 2003: 1044-1047
15	EE	B. Jayaram, A. Manoj Kumar, V. Kamakoti: Parallel Partitioning Techniques for Logic Minimization Using Redundancy Identification. HiPC 2003: 174-183
14		Permandla Pratibha, Siva Nageswara Rao Borra, Annamalai Muthukaruppan, S. Suresh, V. Ganesh, V. Kamakoti: A Parallel Evolutionary Approach to Spatial Partitioning in Reconfigurable Environments. IICAI 2003: 938-951
13	EE	Siva Nageswara Rao Borra, Annamalai Muthukaruppan, S. Suresh, V. Kamakoti: A Parallel Genetic Approach to the Placement Problem for Field Programmable Gate Arrays. IPDPS 2003: 184
12	EE	M. Madhu, V. Srinivasa Murty, V. Kamakoti: Dynamic Coding Technique For Low-Power Data Bus. ISVLSI 2003: 252-253
11		L. Kalyan Kumar, Aditya S. Ramani, Amol J. Mupid, V. Kamakoti, Sivaprakasam Suresh: On-Line Location of Multiple Faults in LUT Based Reconfigurable Systems. VLSI 2003: 224-232
2001
10	EE	K. Srinathan, C. Pandu Rangan, V. Kamakoti: Toward Optimal Player Weights in Secure Distributed Protocols. INDOCRYPT 2001: 232-241
1999
9		V. Annamalai, C. S. Krishnamoorthy, V. Kamakoti: Adaptive finite element analysis on a parallel and distributed environment. Parallel Computing 25(12): 1413-1434 (1999)
1998
8	EE	Thomas Graf, V. Kamakoti, N. S. Janaki Latha, C. Pandu Rangan: The Colored Sector Search Tree: A Dynamic Data Structure for Efficient High Dimensional Nearest-Foreign-Neighbor Queries. COCOON 1998: 35-44
1997
7	EE	V. Kamakoti, N. Balakrishnan: Efficient Algorithms for Prefix and General Prefix Computations on Distributed Shared Memory Systems with Applications. ICPADS 1997: 44-51
6	EE	Thomas Graf, V. Kamakoti: Sparse Dominance Queries for Many Points in Optimal Time and Space. Inf. Process. Lett. 64(6): 287-291 (1997)
1995
5		V. Kamakoti, Kamala Krithivasan, C. Pandu Rangan: Efficient Randomized Incremental Algorithm For The Closest Pair Problem Using Leafary Trees. COCOON 1995: 71-80
4		K. Arvind, V. Kamakoti, C. Pandu Rangan: Efficient Parallel Algorithms for Permutation Graphs. J. Parallel Distrib. Comput. 26(1): 116-124 (1995)
3		V. Kamakoti, Kamala Krithivasan, C. Pandu Rangan: An Efficient Randomized Algorithm for the Closest Pair Problem on Colored Point Sets. Nord. J. Comput. 2(1): 28-40 (1995)
1994
2		P. Jagan Mohan, V. Kamakoti, C. Pandu Rangan: Efficient Randomized Parallel Algorithm for the Closest Pair Problem in D-dimension. IFIP Congress (1) 1994: 547-552
1992
1		V. Kamakoti, C. Pandu Rangan: An Optimal Algorithm for Reconstructing a Binary Tree. Inf. Process. Lett. 42(2): 113-115 (1992)

Coauthor Index

1	V. Annamalai	[9]
2	K. Arvind	[4]
3	N. Balakrishnan	[7]
4	K. Uday Bhaskar	[32] [36]
5	D. Bhatia	[31]
6	Jayaram Bobba	[27]
7	Siva Nageswara Rao Borra	[13] [14] [20] [48]
8	Sanjay Burman	[35] [47]
9	G. Chandramouli	[32]
10	Vikram Chandrasekhar	[30] [33] [34] [37] [38] [39] [43]
11	Sukhendu Das	[22] [23] [45]
12	V. R. Devanathan	[40] [46] [50] [52] [53]
13	V. Ganesh	[14]
14	Vivek Garg	[37] [38] [43]
15	Thomas Graf	[6] [8]
16	Vishal Gupta	[41] [44]
17	Karthik Gururaj	[51]
18	Siva Kumar Sastry Hari	[49] [54]
19	Lavanya Jagan	[55]
20	B. Jayaram	[15] [21] [25] [26]
21	Vishnu Vardhan Reddy Konda	[49] [54]
22	C. S. Krishnamoorthy	[9]
23	Kamala Krithivasan	[3] [5]
24	A. Manoj Kumar	[15] [21] [25] [26] [27]
25	A. Pavan Kumar	[22] [23] [45]
26	L. Kalyan Kumar	[11] [16] [17] [28]
27	V. Bala Kuteshwar	[19]
28	N. S. Janaki Latha	[8]
29	M. Madhu	[12]
30	Ananta K. Majhi	[55]
31	Kailasnath Maneparambil	[36]
32	K. S. Maneperambil	[54]
33	R. Manimegalai	[18] [21] [25] [31]
34	P. Jagan Mohan	[2]
35	Amol J. Mupid	[11] [16] [17] [28]
36	V. Muralidharan	[31]
37	V. Srinivasa Murty	[12]
38	Annamalai Muthukaruppan	[13] [14] [20] [48]
39	Madhu Mutyam	[18] [41] [44]
40	K. Najeeb	[41] [44] [49] [51]
41	Ramachandran Pradeep	[35] [47]
42	Chakka Siva Sai Prasanna	[24] [29]
43	M. Prasanth	[32] [36]
44	Permandla Pratibha	[14] [20]
45	Aditya S. Ramani	[11] [16] [17] [28]
46	C. Pandu Rangan (Chanrasekharan Pandu Rangan)	[1] [2] [3] [4] [5] [8] [10]
47	P. Rangarajan	[19]
48	C. P. Ravikumar	[40] [46] [50] [52] [53]
49	Balaraman Ravindran	[31]
50	E. Syam Sundar Reddy	[30] [33] [34] [39]
51	Milagros Sashikánth	[30] [33] [34] [37] [38] [39] [43]
52	Kavish Seth	[19] [42]
53	Ratan Deep Singh	[55]
54	E. Siva Soumya	[31]
55	K. Srinathan (Kannan Srinathan)	[10]
56	S. Srinivasan	[19] [42]
57	P. Subrahmanya	[18]
58	N. Sudha	[24] [29]
59	S. Suresh	[13] [14] [20] [48]
60	Sivaprakasam Suresh	[11]
61	Vivekananda M. Vedula	[49] [51] [54]
62	Narayanan Vijaykrishnan (Vijaykrishnan Narayanan)	[30] [33] [34] [39]
63	S. Vinay	[35] [47]
64	K. N. Viswajith	[42]

Colors in the list of coauthors