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Gerd Ascheid

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2009
54EETorsten Kempf, Stefan Wallentowitz, Gerd Ascheid, Rainer Leupers, Heinrich Meyr: A Workbench for Analytical and Simulation Based Design Space Exploration of Software Defined Radios. VLSI Design 2009: 281-286
53EEAnupam Chattopadhyay, Harold Ishebabi, Xiaolin Chen, Z. Rakosi, Kingshuk Karuri, David Kammler, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Pre- and postfabrication architecture exploration for partially reconfigurable VLIW processors. ACM Trans. Embedded Comput. Syst. 8(2): (2009)
52EEManuel Hohenauer, Felix Engel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: A SIMD optimization framework for retargetable compilers. TACO 6(1): (2009)
2008
51EELei Gao, Kingshuk Karuri, Stefan Kraemer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Multiprocessor performance estimation using hybrid simulation. DAC 2008: 325-330
50EEJianjiang Ceng, Jerónimo Castrillón, Weihua Sheng, Hanno Scharwächter, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tsuyoshi Isshiki, Hiroaki Kunieda: MAPS: an integrated framework for MPSoC application parallelization. DAC 2008: 754-759
49EEAnupam Chattopadhyay, Xiaolin Chen, Harold Ishebabi, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: High-level Modelling and Exploration of Coarse-grained Re-configurable Architectures. DATE 2008: 1334-1339
48EEManuel Hohenauer, Felix Engel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gerrit Bette, Balpreet Singh: Retargetable Code Optimization for Predicated Execution. DATE 2008: 1492-1497
47EERainer Leupers, Gerd Ascheid, Wilfried Verachtert, Tom Ashby, Arnout Vandecappelle: System-Level Design and Application Mapping for Wireless and Multimedia MPSoC Architectures. DATE 2008
46EEI-Wei Lai, Susanne Godtmann, Tzi-Dar Chiueh, Gerd Ascheid, Heinrich Meyr: Asymptotic BER Analysis for MIMO-BICM with Zero-Forcing Detectors Assuming Imperfect CSI. ICC 2008: 1238-1242
45EENiels Hadaschik, Gerd Ascheid: Deriving a Joint Interference Detection and Channel Estimation for WB-OFDM from EM-MAP Theory. ICC 2008: 1322-1327
44EESusanne Godtmann, Niels Hadaschik, Wolfgang Steinert, Gerd Ascheid: A Concept for Data-Aided Carrier Frequency Estimation at Low Signal-To-Noise Ratios. ICC 2008: 463-467
43EESusanne Godtmann, Helge Luders, Gerd Ascheid, Peter Vary: A Bit-Mapping Strategy for Joint Iterative Channel Estimation and Turbo-Decoding. VTC Fall 2008: 1-5
42EEMarkus Jordan, Martin Senst, Gerd Ascheid, Heinrich Meyr: Long-Term Beamforming in Single Frequency Networks using Semidefinite Relaxation. VTC Spring 2008: 275-279
41EEAnupam Chattopadhyay, Harold Ishebabi, Xiaolin Chen, Z. Rakosi, Kingshuk Karuri, David Kammler, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Prefabrication and postfabrication architecture exploration for partially reconfigurable VLIW processors. ACM Trans. Embedded Comput. Syst. 7(4): (2008)
40EEKingshuk Karuri, Anupam Chattopadhyay, Xiaolin Chen, David Kammler, Ling Hao, Rainer Leupers, Heinrich Meyr, Gerd Ascheid: A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors. IEEE Trans. VLSI Syst. 16(10): 1281-1294 (2008)
39EEDiandian Zhang, Anupam Chattopadhyay, David Kammler, Ernst Martin Witte, Gerd Ascheid, Rainer Leupers, Heinrich Meyr: Power-efficient Instruction Encoding Optimization for Various Architecture Classes. JCP 3(3): 25-38 (2008)
2007
38EELei Gao, Stefan Kraemer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: A fast and generic hybrid simulation approach using C virtual machine. CASES 2007: 3-12
37EEHanno Scharwächter, Jonghee M. Yoon, Rainer Leupers, Yunheung Paek, Gerd Ascheid, Heinrich Meyr: A code-generator generator for multi-output instructions. CODES+ISSS 2007: 131-136
36EEStefan Kraemer, Lei Gao, Jan Weinstock, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: HySim: a fast simulation framework for embedded software development. CODES+ISSS 2007: 75-80
35EEStefan Kraemer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Interactive presentation: SoftSIMD - exploiting subword parallelism using source code transformations. DATE 2007: 1349-1354
34EEAnupam Chattopadhyay, W. Ahmed, Kingshuk Karuri, David Kammler, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Design space exploration of partially re-configurable embedded processors. DATE 2007: 319-324
33EEMartin Senst, Markus Jordan, Meik Dorpinghaus, Michael Farber, Gerd Ascheid, Heinrich Meyr: Joint Reduction of Peak-to-Average Power Ratio and Out-of-Band Power in OFDM Systems. GLOBECOM 2007: 3812-3816
32EEKingshuk Karuri, Anupam Chattopadhyay, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Increasing data-bandwidth to instruction-set extensions through register clustering. ICCAD 2007: 166-171
31EEAnupam Chattopadhyay, Z. Rakosi, Kingshuk Karuri, David Kammler, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Pre- and Post-Fabrication Architecture Exploration for Partially Reconfigurable VLIW Processors. IEEE International Workshop on Rapid System Prototyping 2007: 189-194
30EEMarkus Jordan, Gerd Ascheid, Heinrich Meyr: Performance Evaluation of Opportunistic Beamforming with SINR Prediction for HSDPA. VTC Spring 2007: 1652-1656
29EESusanne Godtmann, André Pollok, Niels Hadaschik, Gerd Ascheid, Heinrich Meyr: On the Influence of Pilot Symbol and Data Symbol Positioning on Turbo Synchronization. VTC Spring 2007: 1723-1726
28EEHanno Scharwächter, David Kammler, Andreas Wieferink, Manuel Hohenauer, Kingshuk Karuri, Jianjiang Ceng, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: ASIP architecture exploration for efficient IPSec encryption: A case study. ACM Trans. Embedded Comput. Syst. 6(2): (2007)
2006
27EEManuel Hohenauer, Christoph Schumacher, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Hans van Someren: Retargetable code optimization with SIMD instructions. CODES+ISSS 2006: 148-153
26EETorsten Kempf, Kingshuk Karuri, Stefan Wallentowitz, Gerd Ascheid, Rainer Leupers, Heinrich Meyr: A SW performance estimation framework for early system-level-design using fine-grained instrumentation. DATE 2006: 468-473
25EEAnupam Chattopadhyay, B. Geukes, David Kammler, Ernst Martin Witte, Oliver Schliebusch, Harold Ishebabi, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Automatic ADL-based operand isolation for embedded processors. DATE 2006: 600-605
24EEHanno Scharwächter, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: An interprocedural code optimization technique for network processors using hardware multi-threading support. DATE 2006: 919-924
23EEKingshuk Karuri, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Monu Kedia: Design and implementation of a modular and portable IEEE 754 compliant floating-point unit. DATE Designers' Forum 2006: 221-226
22EELuca Fanucci, Michele Cassiano, Sergio Saponara, David Kammler, Ernst Martin Witte, Oliver Schliebusch, Gerd Ascheid, Rainer Leupers, Heinrich Meyr: ASIP design and synthesis for non linear filtering in image processing. DATE Designers' Forum 2006: 233-238
21EEKingshuk Karuri, Christian Huben, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Memory Access Micro-Profiling for ASIP Design. DELTA 2006: 255-262
20EEAnupam Chattopadhyay, Arnab Sinha, Diandian Zhang, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Integrated Verification Approach during ADL-Driven Processor Design. IEEE International Workshop on Rapid System Prototyping 2006: 110-118
19EEHarold Ishebabi, Gerd Ascheid, Heinrich Meyr, O. Atak, A. Atalar, E. Arikan: An efficient parallelization technique for high throughput FFT-ASIPs. ISCAS 2006
18EEJianjiang Ceng, Weihua Sheng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun: Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting. VLSI Signal Processing 43(2-3): 235-246 (2006)
2005
17EEMohammad Mostafizur Rahman Mozumdar, Kingshuk Karuri, Anupam Chattopadhyay, Stefan Kraemer, Hanno Scharwächter, Heinrich Meyr, Gerd Ascheid, Rainer Leupers: Instruction Set Customization of Application Specific Processors for Network Processing: A Case Study. ASAP 2005: 154-160
16EEOliver Schliebusch, Anupam Chattopadhyay, David Kammler, Gerd Ascheid, Rainer Leupers, Heinrich Meyr, Tim Kogel: A framework for automated and optimized ASIP implementation supporting multiple hardware description languages. ASP-DAC 2005: 280-285
15EEAndreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tom Michiels, Achim Nohl, Tim Kogel: Retargetable generation of TLM bus interfaces for MP-SoC platforms. CODES+ISSS 2005: 249-254
14EEKingshuk Karuri, Mohammad Abdullah Al Faruque, Stefan Kraemer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Fine-grained application source code profiling for ASIP design. DAC 2005: 329-334
13EEJianjiang Ceng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun: C Compiler Retargeting Based on Instruction Semantics Models. DATE 2005: 1150-1155
12EETorsten Kempf, Malte Doerper, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tim Kogel, Bart Vanthournout: A Modular Simulation Framework for Spatial and Temporal Task Mapping onto Multi-Processor SoC Platforms. DATE 2005: 876-881
11EEOliver Schliebusch, Anupam Chattopadhyay, Ernst Martin Witte, David Kammler, Gerd Ascheid, Rainer Leupers, Heinrich Meyr: Optimization Techniques for ADL-Driven RTL Processor Synthesis. IEEE International Workshop on Rapid System Prototyping 2005: 165-171
10 Rainer Leupers, Gerd Ascheid: Digital Signal Processors. Handbook of Networked and Embedded Control Systems 2005: 279-294
2004
9EEAndreas Wieferink, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun, Achim Nohl: A System Level Processor/Communication Co-Exploration Methodology for Multi-Processor System-on-Chip Platform. DATE 2004: 1256-1263
8EEManuel Hohenauer, Hanno Scharwächter, Kingshuk Karuri, Oliver Wahlen, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun, Hans van Someren: A Methodology and Tool Suite for C Compiler Generation from ADL Processor Models. DATE 2004: 1276-1283
7EEOliver Schliebusch, Anupam Chattopadhyay, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Mario Steinert, Gunnar Braun, Achim Nohl: RTL Processor Synthesis for Architecture Exploration and Implementation. DATE 2004: 156-160
6EETim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip Designs. SAMOS 2004: 138-148
5EEAndreas Wieferink, Malte Doerper, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Early ISS Integration into Network-on-Chip Designs. SAMOS 2004: 443-452
4EEJianjiang Ceng, Weihua Sheng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun: Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting. SAMOS 2004: 463-473
3EEHanno Scharwächter, David Kammler, Andreas Wieferink, Manuel Hohenauer, Kingshuk Karuri, Jianjiang Ceng, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: ASIP Architecture Exploration for Efficient Ipsec Encryption: A Case Study. SCOPES 2004: 33-46
2003
2EETim Kogel, Malte Doerper, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Serge Goossens: A modular simulation framework for architectural exploration of on-chip interconnection networks. CODES+ISSS 2003: 7-12
1EEOliver Wahlen, Manuel Hohenauer, Gunnar Braun, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Xiaoning Nie: Extraction of Efficient Instruction Schedulers from Cycle-True Processor Models. SCOPES 2003: 167-181

Coauthor Index

1W. Ahmed [34]
2E. Arikan [19]
3Tom Ashby [47]
4O. Atak [19]
5A. Atalar [19]
6Gerrit Bette [48]
7Gunnar Braun [1] [4] [7] [8] [9] [13] [18]
8Michele Cassiano [22]
9Jerónimo Castrillón [50]
10Jianjiang Ceng [3] [4] [13] [18] [28] [50]
11Anupam Chattopadhyay [7] [11] [16] [17] [20] [25] [31] [32] [34] [39] [40] [41] [49] [53]
12Xiaolin Chen [40] [41] [49] [53]
13Tzi-Dar Chiueh [46]
14Malte Doerper [2] [5] [6] [12]
15Meik Dorpinghaus [33]
16Felix Engel [48] [52]
17Luca Fanucci [22]
18Michael Farber [33]
19Mohammad Abdullah Al Faruque [14]
20Lei Gao [36] [38] [51]
21B. Geukes [25]
22Susanne Godtmann [29] [43] [44] [46]
23Serge Goossens [2]
24Niels Hadaschik [29] [44] [45]
25Ling Hao [40]
26Manuel Hohenauer [1] [3] [4] [8] [13] [18] [24] [27] [28] [32] [48] [52]
27Christian Huben [21]
28Harold Ishebabi [19] [25] [41] [49] [53]
29Tsuyoshi Isshiki [50]
30Markus Jordan [30] [33] [42]
31David Kammler [3] [11] [16] [22] [25] [28] [31] [34] [39] [40] [41] [53]
32Kingshuk Karuri [3] [8] [14] [17] [21] [23] [26] [28] [31] [32] [34] [40] [41] [51] [53]
33Monu Kedia [23]
34Torsten Kempf [6] [12] [26] [54]
35Tim Kogel [2] [5] [6] [8] [9] [12] [15] [16]
36Stefan Kraemer [14] [17] [35] [36] [38] [51]
37Hiroaki Kunieda [50]
38I-Wei Lai [46]
39Rainer Leupers [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [20] [21] [22] [23] [24] [25] [26] [27] [28] [31] [32] [34] [35] [36] [37] [38] [39] [40] [41] [47] [48] [49] [50] [51] [52] [53] [54]
40Helge Luders [43]
41Heinrich Meyr [1] [2] [3] [4] [5] [6] [7] [8] [9] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [29] [30] [31] [32] [33] [34] [35] [36] [37] [38] [39] [40] [41] [42] [46] [48] [49] [50] [51] [52] [53] [54]
42Tom Michiels [15]
43Mohammad Mostafizur Rahman Mozumdar [17]
44Xiaoning Nie [1]
45Achim Nohl [7] [9] [15]
46Yunheung Paek [37]
47André Pollok [29]
48Z. Rakosi [31] [41] [53]
49Sergio Saponara [22]
50Hanno Scharwächter [3] [8] [17] [24] [28] [37] [50]
51Oliver Schliebusch [7] [11] [16] [22] [25]
52Christoph Schumacher [27]
53Martin Senst [33] [42]
54Weihua Sheng [4] [18] [50]
55Balpreet Singh [48]
56Arnab Sinha [20]
57Hans van Someren [8] [27]
58Mario Steinert [7]
59Wolfgang Steinert [44]
60Arnout Vandecappelle [47]
61Bart Vanthournout [12]
62Peter Vary [43]
63Wilfried Verachtert [47]
64Oliver Wahlen [1] [8]
65Stefan Wallentowitz [26] [54]
66Jan Weinstock [36]
67Andreas Wieferink [2] [3] [5] [6] [9] [15] [28]
68Ernst Martin Witte [11] [22] [25] [39]
69Jonghee M. Yoon [37]
70Diandian Zhang [20] [39]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)