2008 | ||
---|---|---|
37 | Kehuai Wu, Esben Rosenlund Hansen, Jan Madsen: Towards Understanding and Managing the Dynamic Behavior of Run-Time Reconfigurable Architectures. ERSA 2008: 97-103 | |
36 | EE | Shankar Mahadevan, Federico Angiolini, Jens Sparsø, Luca Benini, Jan Madsen: A Reactive and Cycle-True IP Emulator for MPSoC Exploration. IEEE Trans. on CAD of Integrated Circuits and Systems 27(1): 109-122 (2008) |
35 | EE | Aske Wiid Brekling, Michael R. Hansen, Jan Madsen: Models and formal verification of multiprocessor system-on-chips. J. Log. Algebr. Program. 77(1-2): 1-19 (2008) |
2007 | ||
34 | Rudy Lauwereins, Jan Madsen: 2007 Design, Automation and Test in Europe Conference and Exposition (DATE 2007), April 16-20, 2007, Nice, France ACM 2007 | |
33 | EE | Kehuai Wu, Andreas Kanstein, Jan Madsen, Mladen Berekovic: MT-ADRES: Multithreading on Coarse-Grained Reconfigurable Architecture. ARC 2007: 26-38 |
32 | EE | Michael R. Hansen, Jan Madsen, Aske Wiid Brekling: Semantics and Verification of a Language for Modelling Hardware Architectures. Formal Methods and Hybrid Real-Time Systems 2007: 300-319 |
31 | EE | Kehuai Wu, Jan Madsen: COSMOS: A System-Level Modelling and Simulation Framework for Coprocessor-Coupled Reconfigurable Systems. ICSAMOS 2007: 128-136 |
2006 | ||
30 | EE | Jan Madsen, Thomas K. Stidsen, Peter Kjaerulf, Shankar Mahadevan: Multi-Objective Design Space Exploration of Embedded System Platforms. DIPES 2006: 185-194 |
2005 | ||
29 | EE | Shankar Mahadevan, Federico Angiolini, Michael Storgaard, Rasmus Grøndahl Olsen, Jens Sparsø, Jan Madsen: A Network Traffic Generator Model for Fast Network-on-Chip Simulation. DATE 2005: 780-785 |
28 | EE | Kashif Virk, Jan Madsen, Andreas Vad Lorentzen, Martin Leopold, Philippe Bonnet: Design of A Development Platform for HW/SW Codesign ofWireless Integrated Sensor Nodes. DSD 2005: 254-260 |
27 | EE | Shankar Mahadevan, Michael Storgaard, Jan Madsen, Kashif Virk: ARTS: A System-Level Framework for Modeling MPSoC Components and Analysis of their Causality. MASCOTS 2005: 480-483 |
26 | EE | Jari Nurmi, Jan Madsen, Erwin Ofner, Jouni Isoaho, Hannu Tenhunen: The SoC-Mobinet Model in System-on-Chip Education. MSE 2005: 71-72 |
25 | EE | Shankar Mahadevan, Federico Angiolini, Jens Sparsø, Luca Benini, Jan Madsen: A Traffic Injection Methodology with Support for System-Level Synchronization. VLSI-SoC 2005: 145-161 |
2004 | ||
24 | EE | S. F. Nielsen, Jens Sparsø, Jan Madsen: Towards Behavioral Synthesis of Asynchronous Circuits - An Implementation Template Targeting Syntax Directed Compilation. DSD 2004: 298-305 |
2003 | ||
23 | EE | S. F. Nielsen, Jan Madsen: Power Constrained High-Level Synthesis of Battery Powered Digital Systems. DATE 2003: 11136-11137 |
22 | EE | Jan Madsen, Shankar Mahadevan, Kashif Virk, Mercury Gonzalez: Network-on-Chip Modeling for System-Level Multiprocessor Simulation. RTSS 2003: 265-274 |
2002 | ||
21 | EE | Jan Madsen, Jørgen Steensgaard-Madsen, Lars Christensen: A Sophomore Course in Codesign. IEEE Computer 35(11): 108-110 (2002) |
2001 | ||
20 | Jan Madsen, Jörg Henkel, Xiaobo Sharon Hu: Proceedings of the Ninth International Symposium on Hardware/Software Codesign, CODES 2001, Copenhagen, Denmark, 2001 ACM 2001 | |
2000 | ||
19 | Frank Vahid, Jan Madsen: Proceedings of the Eighth International Workshop on Hardware/Software Codesign, CODES 2000, San Diego, California, USA, 2000 ACM 2000 | |
18 | EE | Thomas Gleerup, Hans Holten-Lund, Jan Madsen, Steen Pedersen: Memory architecture for efficient utilization of SDRAM: a case study of the computation/memory access trade-off. CODES 2000: 51-55 |
17 | EE | Hans Holten-Lund, Mogens Hvidtfeldt, Jan Madsen, Steen Pedersen: VRML visualization in a surgery planning and diagnostics application. Web3D 2000: 111-118 |
1999 | ||
16 | EE | Peter Voigt Knudsen, Jan Madsen: Graph based communication analysis for hardware/software codesign. CODES 1999: 131-135 |
15 | EE | Jan Madsen, Peter Bjørn-Jørgensen: Embedded system synthesis under memory constraints. CODES 1999: 188-192 |
14 | EE | Peter Voigt Knudsen, Jan Madsen: Integrating communication protocol selection with hardware/software codesign. IEEE Trans. on CAD of Integrated Circuits and Systems 18(8): 1077-1095 (1999) |
1998 | ||
13 | EE | Peter Voigt Knudsen, Jan Madsen: Communication estimation for hardware/software codesign. CODES 1998: 55-59 |
12 | EE | Jesper Grode, Peter Voigt Knudsen, Jan Madsen: Hardware Resource Allocation for Hardware/Software Partitioning in the LYCOS System. DATE 1998: 22-27 |
11 | EE | Jesper Grode, Jan Madsen: A Uni.ed Component Modeling Approach for Performance Estimation in Hardware/Software Codesign. EUROMICRO 1998: 10065-10069 |
10 | EE | Peter Voigt Knudsen, Jan Madsen: Integrating Communication Protocol Selection with Partitioning in Hardware/Software Codesign. ISSS 1998: 111-116 |
1997 | ||
9 | EE | Peter Bjørn-Jørgensen, Jan Madsen: Critical path driven cosynthesis for heterogeneous target architectures. CODES 1997: 15-22 |
8 | EE | D. C. R. Jensen, Jan Madsen, Steen Pedersen: The importance of interfaces: a HW/SW codesign case study. CODES 1997: 87-94 |
7 | EE | Jan Madsen: Validation and testing of sC++ applications. ECBS 1997: 491-497 |
1996 | ||
6 | EE | Peter Voigt Knudsen, Jan Madsen: PACE: A Dynamic Programming Algorithm for Hardware/Software Partitioning. CODES 1996: 85-93 |
1995 | ||
5 | EE | Jan Madsen, Bjarne Hald: An approach to interface synthesis. ISSS 1995: 16-21 |
1994 | ||
4 | EE | Jens P. Brage, Jan Madsen: A codesign case study in computer graphics. CODES 1994: 132-139 |
3 | EE | Jan Madsen, Jens P. Brage: Modeling shared variables in VHDL. EURO-DAC 1994: 486-491 |
1993 | ||
2 | Bjarne Hald, Jan Madsen: Performance Aspects of Gate Matrix Layout. VLSI Design 1993: 226-229 | |
1991 | ||
1 | Jan Madsen: Single-Level Wiring for CMOS Functional Cells. VLSI 1991: 317-326 |