Charlie Chung-Ping Chen

Chung-Ping Chen

2008
71	EE	Sanghamitra Roy, Yu Hen Hu, Charlie Chung-Ping Chen, Shih-Pin Hung, Tse-Yu Chiang, Jiuan-Guei Tseng: An optimal algorithm for sizing sequential circuits for industrial library based designs. ASP-DAC 2008: 148-151
70	EE	Tuck Boon Chan, Hsin-Chia Lu, Jun-Kuei Zeng, Charlie Chung-Ping Chen: LTCC spiral inductor modeling, synthesis, and optimization. ASP-DAC 2008: 768-771
69	EE	Jui-Hsiang Liu, Ming-Feng Tsai, Lumdo Chen, Charlie Chung-Ping Chen: Accurate and analytical statistical spatial correlation modeling for VLSI DFM applications. DAC 2008: 694-697
68	EE	Jun-Kuei Zeng, Chung-Ping Chen: Deep Submicron Interconnect Timing Model with Quadratic Random Variable Analysis. DATE 2008: 1091-1094
67	EE	Jui-Hsiang Liu, Jun-Kuei Zeng, Ai-Syuan Hong, Lumdo Chen, Charlie Chung-Ping Chen: Process-Variation Statistical Modeling for VLSI Timing Analysis. ISQED 2008: 730-733
66	EE	Chung-Ping Chen, Ying-Wen Bai, Yin-Sheng Lee: Performance measurement and queueing analysis of medium-high blocking probability of two and three parallel connection servers. LCN 2008: 568-569
2007
65	EE	Sanghamitra Roy, Charlie Chung-Ping Chen: SmartSmooth: A linear time convexity preserving smoothing algorithm for numerically convex data with application to VLSI design. ASP-DAC 2007: 559-564
64	EE	Dongkeun Oh, Charlie Chung-Ping Chen, Yu Hen Hu: 3DFFT: Thermal Analysis of Non-Homogeneous IC Using 3D FFT Green Function Method. ISQED 2007: 567-572
63	EE	Sanghamitra Roy, Weijen Chen, Charlie Chung-Ping Chen, Yu Hen Hu: Numerically Convex Forms and Their Application in Gate Sizing. IEEE Trans. on CAD of Integrated Circuits and Systems 26(9): 1637-1647 (2007)
2006
62	EE	Lizheng Zhang, Jeng-Liang Tsai, Weijen Chen, Yuhen Hu, Charlie Chung-Ping Chen: Convergence-provable statistical timing analysis with level-sensitive latches and feedback loops. ASP-DAC 2006: 941-946
61	EE	Lizheng Zhang, Yuhen Hu, Charlie Chung-Ping Chen: Statistical timing analysis with path reconvergence and spatial correlations. DATE 2006: 528-532
60	EE	Pei-Yu Huang, Yu-Min Lee, Jeng-Liang Tsai, Charlie Chung-Ping Chen: Simultaneous area minimization and decaps insertion for power delivery network using adjoint sensitivity analysis with IEKS method. ISCAS 2006
59	EE	Lizheng Zhang, Jun Shao, Charlie Chung-Ping Chen: Non-gaussian statistical parameter modeling for SSTA with confidence interval analysis. ISPD 2006: 33-38
58	EE	Sanghamitra Roy, Charlie Chung-Ping Chen: ConvexSmooth: A simultaneous convex fitting and smoothing algorithm for convex optimization problems. ISQED 2006: 665-670
57	EE	Lizheng Zhang, Weijen Chen, Yuhen Hu, John A. Gubner, Charlie Chung-Ping Chen: Correlation-Preserved Statistical Timing With a Quadratic Form of Gaussian Variables. IEEE Trans. on CAD of Integrated Circuits and Systems 25(11): 2437-2449 (2006)
56	EE	Lizheng Zhang, Weijen Chen, Yuhen Hu, Charlie Chung-Ping Chen: Statistical static timing analysis with conditional linear MAX/MIN approximation and extended canonical timing model. IEEE Trans. on CAD of Integrated Circuits and Systems 25(6): 1183-1191 (2006)
2005
55	EE	Vikas Sharma, Chien-Liang Chen, Chung-Ping Chen: 1-V 7-mW dual-band fast-locked frequency synthesizer. ACM Great Lakes Symposium on VLSI 2005: 431-435
54	EE	Rong Jiang, Charlie Chung-Ping Chen: Comprehensive frequency dependent interconnect extraction and evaluation methodology. ASP-DAC 2005: 1070-1073
53	EE	Jeng-Liang Tsai, Charlie Chung-Ping Chen: Process-variation robust and low-power zero-skew buffered clock-tree synthesis using projected scan-line sampling. ASP-DAC 2005: 1168-1171
52	EE	Lizheng Zhang, Yuhen Hu, Charlie Chung-Ping Chen: Wave-pipelined on-chip global interconnect. ASP-DAC 2005: 127-132
51	EE	Lizheng Zhang, Yuhen Hu, Charlie Chung-Ping Chen: Block based statistical timing analysis with extended canonical timing model. ASP-DAC 2005: 250-253
50	EE	Hsinwei Chou, Yu-Hao Wang, Charlie Chung-Ping Chen: Fast and effective gate-sizing with multiple-Vt assignment using generalized Lagrangian Relaxation. ASP-DAC 2005: 381-386
49	EE	Rong Jiang, Yi-Hao Chang, Charlie Chung-Ping Chen: ICCAP: a linear time sparse transformation and reordering algorithm for 3D BEM capacitance extraction. DAC 2005: 163-166
48	EE	Lizheng Zhang, Weijen Chen, Yuhen Hu, John A. Gubner, Charlie Chung-Ping Chen: Correlation-preserved non-gaussian statistical timing analysis with quadratic timing model. DAC 2005: 83-88
47	EE	Lizheng Zhang, Weijen Chen, Yuhen Hu, Charlie Chung-Ping Chen: Statistical Timing Analysis with Extended Pseudo-Canonical Timing Model. DATE 2005: 952-957
46		Rong Jiang, Wenyin Fu, Janet Meiling Wang, Vince Lin, Charlie Chung-Ping Chen: Efficient statistical capacitance variability modeling with orthogonal principle factor analysis. ICCAD 2005: 683-690
45		Janet Meiling Wang, Bharat Srinivas, Dongsheng Ma, Charlie Chung-Ping Chen, Jun Li: System-level power and thermal modeling and analysis by orthogonal polynomial based response surface approach (OPRS). ICCAD 2005: 728-735
44	EE	Jeng-Liang Tsai, Dong Hyun Baik, Charlie Chung-Ping Chen, Kewal K. Saluja: False Path and Clock Scheduling Based Yield-Aware Gate Sizing. VLSI Design 2005: 423-426
43	EE	Jeng-Liang Tsai, Dong Hyun Baik, Charlie Chung-Ping Chen, Kewal K. Saluja: Yield-Driven, False-Path-Aware Clock Skew Scheduling. IEEE Design & Test of Computers 22(3): 214-222 (2005)
42	EE	Rong Jiang, Wenyin Fu, Charlie Chung-Ping Chen: EPEEC: comprehensive SPICE-compatible reluctance extraction for high-speed interconnects above lossy multilayer substrates. IEEE Trans. on CAD of Integrated Circuits and Systems 24(10): 1562-1571 (2005)
41	EE	Yu-Min Lee, Yahong Cao, Tsung-Hao Chen, Janet Meiling Wang, Charlie Chung-Ping Chen: HiPRIME: hierarchical and passivity preserved interconnect macromodeling engine for RLKC power delivery. IEEE Trans. on CAD of Integrated Circuits and Systems 24(6): 797-806 (2005)
2004
40	EE	Clement Luk, Tsung-Hao Chen, Charlie Chung-Ping Chen: Frequency-dependent reluctance extraction. ASP-DAC 2004: 792-797
39	EE	Lizheng Zhang, Yuhen Hu, Charlie Chung-Ping Chen: Statistical timing analysis in sequential circuit for on-chip global interconnect pipelining. DAC 2004: 904-907
38	EE	Rong Jiang, Charlie Chung-Ping Chen: Realizable Reduction for Electromagnetically Coupled RLMC Interconnects. DATE 2004: 1400-1401
37	EE	Ting-Yuan Wang, Jeng-Liang Tsai, Charlie Chung-Ping Chen: Thermal and Power Integrity Based Power/Ground Networks Optimization. DATE 2004: 830-835
36	EE	Rong Jiang, Charlie Chung-Ping Chen: SCORE: SPICE COmpatible Reluctance Extraction. DATE 2004: 948-953
35	EE	Jeng-Liang Tsai, Dong Hyun Baik, Charlie Chung-Ping Chen, Kewal K. Saluja: A yield improvement methodology using pre- and post-silicon statistical clock scheduling. ICCAD 2004: 611-618
34	EE	Ting-Yuan Wang, Jeng-Liang Tsai, Charlie Chung-Ping Chen: Sensitivity guided net weighting for placement driven synthesis. ISPD 2004: 124-131
33	EE	Ting-Yuan Wang, Charlie Chung-Ping Chen: SPICE-Compatible Thermal Simulation with Lumped Circuit Modeling for Thermal Reliability Analysis Based on Modeling Order Reduction. ISQED 2004: 357-362
32	EE	Jeng-Liang Tsai, Tsung-Hao Chen, Charlie Chung-Ping Chen: Zero skew clock-tree optimization with buffer insertion/sizing and wire sizing. IEEE Trans. on CAD of Integrated Circuits and Systems 23(4): 565-572 (2004)
2003
31	EE	Yu-Min Lee, Charlie Chung-Ping Chen: The Power Grid Transient Simulation in Linear Time Based on 3D Alternating-Direction-Implicit Method . DATE 2003: 11020-11025
30	EE	Tsung-Hao Chen, Clement Luk, Charlie Chung-Ping Chen: SuPREME: Substrate and Power-delivery Reluctance-Enhanced Macromodel Evaluation. ICCAD 2003: 786-792
29	EE	Rong Jiang, Tsung-Hao Chen, Charlie Chung-Ping Chen: PODEA: Power delivery efficient analysis with realizable model reduction. ISCAS (4) 2003: 608-611
28	EE	Ting-Yuan Wang, Yu-Min Lee, Charlie Chung-Ping Chen: 3D thermal-ADI: an efficient chip-level transient thermal simulator. ISPD 2003: 10-17
27	EE	Jeng-Liang Tsai, Tsung-Hao Chen, Charlie Chung-Ping Chen: Optimal minimum-delay/area zero-skew clock tree wire-sizing in pseudo-polynomial time. ISPD 2003: 166-173
26	EE	Ting-Yuan Wang, Charlie Chung-Ping Chen: Thermal-ADI - a linear-time chip-level dynamic thermal-simulation algorithm based on alternating-direction-implicit (ADI) method. IEEE Trans. VLSI Syst. 11(4): 691-700 (2003)
25	EE	Yu-Min Lee, Charlie Chung-Ping Chen: The power grid transient simulation in linear time based on 3-D alternating-direction-implicit method. IEEE Trans. on CAD of Integrated Circuits and Systems 22(11): 1545-1550 (2003)
24	EE	Tsung-Hao Chen, Clement Luk, Charlie Chung-Ping Chen: INDUCTWISE: inductance-wise interconnect simulator and extractor. IEEE Trans. on CAD of Integrated Circuits and Systems 22(7): 884-894 (2003)
2002
23	EE	Yahong Cao, Yu-Min Lee, Tsung-Hao Chen, Charlie Chung-Ping Chen: HiPRIME: hierarchical and passivity reserved interconnect macromodeling engine for RLKC power delivery. DAC 2002: 379-384
22	EE	Tsung-Hao Chen, Clement Luk, Hyungsuk Kim, Charlie Chung-Ping Chen: INDUCTWISE: inductance-wise interconnect simulator and extractor. ICCAD 2002: 215-220
21	EE	Ting-Yuan Wang, Charlie Chung-Ping Chen: Optimization of the Power/Ground Network Wire-Sizing and Spacing Based on Sequential Network Simplex Algorithm. ISQED 2002: 157-162
20	EE	Charlie Chung-Ping Chen, Ed Cheng: Future SoC Design Challenges and Solutions (invited). ISQED 2002: 534-538
19	EE	Yu-Min Lee, Charlie Chung-Ping Chen: Power grid transient simulation in linear time based on transmission-line-modeling alternating-direction-implicit method. IEEE Trans. on CAD of Integrated Circuits and Systems 21(11): 1343-1352 (2002)
18	EE	Ting-Yuan Wang, Charlie Chung-Ping Chen: 3-D Thermal-ADI: a linear-time chip level transient thermal simulator. IEEE Trans. on CAD of Integrated Circuits and Systems 21(12): 1434-1445 (2002)
2001
17	EE	Yu-Min Lee, Charlie Chung-Ping Chen: Hierarchical model order reduction for signal-integrity interconnect synthesis. ACM Great Lakes Symposium on VLSI 2001: 109-114
16	EE	Yu-Min Lee, Hing Yin Lai, Charlie Chung-Ping Chen: Optimal spacing and capacitance padding for general clock structures. ASP-DAC 2001: 115-119
15	EE	Tsung-Hao Chen, Charlie Chung-Ping Chen: Efficient Large-Scale Power Grid Analysis Based on Preconditioned Krylov-Subspace Iterative Methods. DAC 2001: 559-562
14	EE	Yu-Min Lee, Charlie Chung-Ping Chen: Power Grid Transient Simulation in Linear Time Based on Transmission-Line-Modeling Alternating-Direction-Implicit Method. ICCAD 2001: 75-
13		Pradeepsunder Ganesh, Charlie Chung-Ping Chen: RC-in RC-out Model Order Reduction Accurate up to Second Order Moments. ICCD 2001: 505-506
12		Saisanthosh Balakrishnan, Jong Hyuk Park, Hyungsuk Kim, Yu-Min Lee, Charlie Chung-Ping Chen: Linear Time Hierarchical Capacitance Extraction without Multipole Expansion. ICCD 2001: 98-103
11	EE	Ting-Yuan Wang, Charlie Chung-Ping Chen: Thermal-ADI: a linear-time chip-level dynamic thermal simulation algorithm based on alternating-direction-implicit (ADI) method. ISPD 2001: 238-243
2000
10		Charlie Chung-Ping Chen, Tae-Woo Lee, Narayanan Murugesan, Susan C. Hagness: Generalized FDTD-ADI: An Unconditionally Stable Full-Wave Maxwell's Equations Solver for VLSI Interconnect Modeling. ICCAD 2000: 156-163
1999
9	EE	Chung-Ping Chen, Noel Menezes: Noise-Aware Repeater Insertion and Wire-Sizing for On-Chip Interconnect Using Hierarchical Moment-Matching. DAC 1999: 502-506
8	EE	Chung-Ping Chen, D. F. Wong: Error Bounded Padé Approximation via Bilinear Conformal Transformation. DAC 1999: 7-12
7	EE	Noel Menezes, Chung-Ping Chen: Spec-Based Repeater Insertion and Wire Sizing for On-chip Interconnect. VLSI Design 1999: 476-
6	EE	Chung-Ping Chen, Chris C. N. Chu, Martin D. F. Wong: Fast and exact simultaneous gate and wire sizing by Lagrangian relaxation. IEEE Trans. on CAD of Integrated Circuits and Systems 18(7): 1014-1025 (1999)
1998
5	EE	Chung-Ping Chen, Chris C. N. Chu, D. F. Wong: Fast and exact simultaneous gate and wire sizing by Lagrangian relaxation. ICCAD 1998: 617-624
1997
4	EE	Chung-Ping Chen, D. F. Wong: Optimal Wire-Sizing Function with Fringing Capacitance Consideration. DAC 1997: 604-607
1996
3	EE	Chung-Ping Chen, Yao-Wen Chang, D. F. Wong: Fast Performance-Driven Optimization for Buffered Clock Trees Based on Lagrangian Relaxation. DAC 1996: 405-408
2	EE	Chung-Ping Chen, Yao-Ping Chen, D. F. Wong: Optimal Wire-Sizing Formular Under the Elmore Delay Model. DAC 1996: 487-490
1	EE	Chung-Ping Chen, Hai Zhou, D. F. Wong: Optimal non-uniform wire-sizing under the Elmore delay model. ICCAD 1996: 38-43

Coauthor Index

1	Ying-Wen Bai	[66]
2	Dong Hyun Baik	[35] [43] [44]
3	Saisanthosh Balakrishnan	[12]
4	Yahong Cao	[23] [41]
5	Tuck Boon Chan	[70]
6	Yao-Wen Chang	[3]
7	Yi-Hao Chang	[49]
8	Chien-Liang Chen	[55]
9	Lumdo Chen	[67] [69]
10	Tsung-Hao Chen	[15] [22] [23] [24] [27] [29] [30] [32] [40] [41]
11	Weijen Chen	[47] [48] [56] [57] [62] [63]
12	Yao-Ping Chen	[2]
13	Ed Cheng	[20]
14	Tse-Yu Chiang	[71]
15	Hsinwei Chou	[50]
16	Chris C. N. Chu (Chris Chong-Nuen Chu)	[5] [6]
17	Wenyin Fu	[42] [46]
18	Pradeepsunder Ganesh	[13]
19	John A. Gubner	[48] [57]
20	Susan C. Hagness	[10]
21	Ai-Syuan Hong	[67]
22	Yu Hen Hu	[63] [64] [71]
23	Yuhen Hu	[39] [47] [48] [51] [52] [56] [57] [61] [62]
24	Pei-Yu Huang	[60]
25	Shih-Pin Hung	[71]
26	Rong Jiang	[29] [36] [38] [42] [46] [49] [54]
27	Hyungsuk Kim	[12] [22]
28	Hing Yin Lai	[16]
29	Tae-Woo Lee	[10]
30	Yin-Sheng Lee	[66]
31	Yu-Min Lee	[12] [14] [16] [17] [19] [23] [25] [28] [31] [41] [60]
32	Jun Li	[45]
33	Vince Lin	[46]
34	Jui-Hsiang Liu	[67] [69]
35	Hsin-Chia Lu	[70]
36	Clement Luk	[22] [24] [30] [40]
37	Dongsheng Ma	[45]
38	Noel Menezes	[7] [9]
39	Narayanan Murugesan	[10]
40	Dongkeun Oh	[64]
41	Jong Hyuk Park	[12]
42	Sanghamitra Roy	[58] [63] [65] [71]
43	Kewal K. Saluja	[35] [43] [44]
44	Jun Shao	[59]
45	Vikas Sharma	[55]
46	Bharat Srinivas	[45]
47	Jeng-Liang Tsai	[27] [32] [34] [35] [37] [43] [44] [53] [60] [62]
48	Ming-Feng Tsai	[69]
49	Jiuan-Guei Tseng	[71]
50	Janet Meiling Wang (Janet Meiling Wang Roveda)	[41] [45] [46]
51	Ting-Yuan Wang	[11] [18] [21] [26] [28] [33] [34] [37]
52	Yu-Hao Wang	[50]
53	Martin D. F. Wong (D. F. Wong)	[1] [2] [3] [4] [5] [6] [8]
54	Jun-Kuei Zeng	[67] [68] [70]
55	Lizheng Zhang	[39] [47] [48] [51] [52] [56] [57] [59] [61] [62]
56	Hai Zhou	[1]

Colors in the list of coauthors