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Salvador Mir

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2009
39EEHaralampos-G. D. Stratigopoulos, Salvador Mir, Ahcène Bounceur: Evaluation of Analog/RF Test Measurements at the Design Stage. IEEE Trans. on CAD of Integrated Circuits and Systems 28(4): 582-590 (2009)
2008
38EEHaralampos-G. D. Stratigopoulos, Jeanne Tongbong, Salvador Mir: A General Method to Evaluate RF BIST Techniques Based on Non-parametric Density Estimation. DATE 2008: 68-73
2007
37EEJeanne Tongbong, Salvador Mir, Jean-Louis Carbonéro: Interactive presentation: Evaluation of test measures for LNA production testing using a multinormal statistical model. DATE 2007: 731-736
36EEEmmanuel Simeu, Salvador Mir, R. Kherreddine, H. N. Nguyen: Envelope Detection Based Transition Time Supervision for Online Testing of RF MEMS Switches. IOLTS 2007: 237-243
35EEAhcène Bounceur, Salvador Mir, Emmanuel Simeu, Luís Rolíndez: Estimation of Test Metrics for the Optimisation of Analogue Circuit Testing. J. Electronic Testing 23(6): 471-484 (2007)
2006
34EEAchraf Dhayni, Salvador Mir, Libor Rufer, Ahcène Bounceur: Pseudorandom functional BIST for linear and nonlinear MEMS. DATE 2006: 664-669
33EEAhcène Bounceur, Salvador Mir, Luís Rolíndez, Emmanuel Simeu: CAT platform for analogue and mixed-signal test evaluation and optimization. VLSI-SoC 2006: 320-325
32EELivier Lizzarraga, Salvador Mir, Gilles Sicard, Ahcène Bounceur: Study of a BIST Technique for CMOS Active Pixel Sensors. VLSI-SoC 2006: 326-331
31EELuís Rolíndez, Salvador Mir, Ahcène Bounceur, Jean-Louis Carbonéro: A SNDR BIST for Sigma-Delta Analogue-to-Digital Converters. VTS 2006: 314-319
30EESalvador Mir, Tim Cheng, Andrew Richardson: Guest Editorial. J. Electronic Testing 22(4-6): 311 (2006)
29EELuís Rolíndez, Salvador Mir, Ahcène Bounceur, Jean-Louis Carbonéro: A BIST Scheme for SNDR Testing of SigmaDelta ADCs Using Sine-Wave Fitting. J. Electronic Testing 22(4-6): 325-335 (2006)
28EESalvador Mir, Libor Rufer, Achraf Dhayni: Built-in-self-test techniques for MEMS. Microelectronics Journal 37(12): 1591-1597 (2006)
2005
27EERabeb Kheriji, V. Danelon, Jean-Louis Carbonéro, Salvador Mir: Optimising Test Sets for a Low Noise Amplifier with a Defect-Oriented Approach. DATE 2005: 170-171
26EEAchraf Dhayni, Salvador Mir, Libor Rufer, Ahcène Bounceur: On-chip Pseudorandom Testing for Linear and Nonlinear MEMS. VLSI-SoC 2005: 245-266
25EELibor Rufer, Salvador Mir, Emmanuel Simeu, C. Domingues: On-Chip Pseudorandom MEMS Testing. J. Electronic Testing 21(3): 233-241 (2005)
24EEBozena Kaminska, Stephen K. Sunter, Salvador Mir: Analog and mixed signal test techniques for SOC development. Microelectronics Journal 36(12): 1063 (2005)
23EEGuillaume Prenat, Salvador Mir, Diego Vázquez, Luís Rolíndez: A low-cost digital frequency testing approach for mixed-signal devices using SigmaDelta modulation. Microelectronics Journal 36(12): 1080-1090 (2005)
2004
22EELuís Rolíndez, Salvador Mir, Guillaume Prenat, Ahcène Bounceur: A 0.18 µm CMOS Implementation of On-chip Analogue Test Signal Generation from Digital Test Patterns. DATE 2004: 706-707
21EESalvador Mir, Libor Rufer, Bernard Courtois: On-chip testing of embedded transducers. VLSI Design 2004: 463-
2003
20EEMohammad A. Naal, Emmanuel Simeu, Salvador Mir: On-Line Testable Decimation Filter Design for AMS Systems. IOLTS 2003: 83-88
19EEC. Roman, Salvador Mir, Benoît Charlot: Building an analogue fault simulation tool and its application to MEMS. Microelectronics Journal 34(10): 897-906 (2003)
2002
18EESalvador Mir, H. Bederr, R. D. (Shawn) Blanton, Hans G. Kerkhoff, H. J. Klim: SoCs with MEMS? Can We Include MEMS in the SoCs Design and Test Flow? VTS 2002: 449-450
2001
17EEBenoît Charlot, Salvador Mir, Fabien Parrain, Bernard Courtois: Electrically Induced Stimuli For MEMS Self-Test. VTS 2001: 210-217
16EEBenoît Charlot, Salvador Mir, Fabien Parrain, Bernard Courtois: Generation of Electrically Induced Stimuli for MEMS Self-Test. J. Electronic Testing 17(6): 459-470 (2001)
2000
15EESalvador Mir, Benoît Charlot, Gabriela Nicolescu, Philippe Coste, Fabien Parrain, Nacer-Eddine Zergainoh, Bernard Courtois, Ahmed Amine Jerraya, Márta Rencz: Towards design and validation of mixed-technology SOCs. ACM Great Lakes Symposium on VLSI 2000: 29-33
14EEMarcelo Lubaszewski, Salvador Mir, Vladimir Kolarik, C. Nielsen, Bernard Courtois: Design of self-checking fully differential circuits and boards. IEEE Trans. VLSI Syst. 8(2): 113-128 (2000)
13EESalvador Mir, Benoît Charlot, Bernard Courtois: Extending Fault-Based Testing to Microelectromechanical Systems. J. Electronic Testing 16(3): 279-288 (2000)
1999
12 Benoît Charlot, Salvador Mir, Érika F. Cota, Marcelo Lubaszewski, Bernard Courtois: Fault modeling of suspended thermal MEMS. ITC 1999: 319-328
11 Bernard Courtois, Jean-Michel Karam, Salvador Mir, Marcelo Lubaszewski, Vladimir Székely, Márta Rencz, Klaus Hofmann, Manfred Glesner: Design and Test of MEMs. VLSI Design 1999: 270-
10EESalvador Mir, Benoît Charlot: On the Integration of Design and Test for Chips Embedding MEMS. IEEE Design & Test of Computers 16(4): 28-38 (1999)
1998
9EESalvador Mir, Adoración Rueda, Diego Vázquez, José Luis Huertas: Switch-Level Fault Coverage Analysis for Switched-Capacitor Systems. DATE 1998: 810-814
8EEA. Castillejo, D. Veychard, Salvador Mir, Jean-Michel Karam, Bernard Courtois: Failure mechanisms and fault classes for CMOS-compatible microelectromechanical systems. ITC 1998: 541-550
1997
7EESalvador Mir, Adoración Rueda, Thomas Olbrich, Eduardo J. Peralías, José Luis Huertas: SWITTEST: Automatic Switch-Level Fault Simulation and Test Evaluation of Switched-Capacitor Systems. DAC 1997: 281-286
1996
6EEMarcelo Lubaszewski, Salvador Mir, Leandro Pulz: ABILBO: Analog BuILt-in Block Observer. ICCAD 1996: 600-603
5EESalvador Mir, Marcelo Lubaszewski, Bernard Courtois: Unified built-in self-test for fully differential analog circuits. J. Electronic Testing 9(1-2): 135-151 (1996)
4EESalvador Mir, Marcelo Lubaszewski, Bernard Courtois: Fault-based ATPG for linear analog circuits with minimal size multifrequency test sets. J. Electronic Testing 9(1-2): 43-57 (1996)
1995
3EEVladimir Kolarik, Salvador Mir, Marcelo Lubaszewski, Bernard Courtois: Analog checkers with absolute and relative tolerances. IEEE Trans. on CAD of Integrated Circuits and Systems 14(5): 607-612 (1995)
1994
2EESalvador Mir, Nick Filer: Re-engineering hardware specifications by exploiting design semantics. EURO-DAC 1994: 336-341
1EESalvador Mir, Vladimir Kolarik, Marcelo Lubaszewski, C. Nielsen, Bernard Courtois: Built-in self-test and fault diagnosis of fully differential analogue circuits. ICCAD 1994: 486-490

Coauthor Index

1H. Bederr [18]
2R. D. (Shawn) Blanton (Ronald D. Blanton) [18]
3Ahcène Bounceur [22] [26] [29] [31] [32] [33] [34] [35] [39]
4Jean-Louis Carbonéro [27] [29] [31] [37]
5A. Castillejo [8]
6Benoît Charlot [10] [12] [13] [15] [16] [17] [19]
7Tim Cheng [30]
8Philippe Coste [15]
9Érika F. Cota [12]
10Bernard Courtois [1] [3] [4] [5] [8] [11] [12] [13] [14] [15] [16] [17] [21]
11V. Danelon [27]
12Achraf Dhayni [26] [28] [34]
13C. Domingues [25]
14Nick Filer [2]
15Manfred Glesner [11]
16Klaus Hofmann [11]
17José Luis Huertas (José L. Huertas) [7] [9]
18Ahmed Amine Jerraya [15]
19Bozena Kaminska [24]
20Jean-Michel Karam [8] [11]
21Hans G. Kerkhoff [18]
22Rabeb Kheriji [27]
23R. Kherreddine [36]
24H. J. Klim [18]
25Vladimir Kolarik [1] [3] [14]
26Livier Lizzarraga [32]
27Marcelo Lubaszewski [1] [3] [4] [5] [6] [11] [12] [14]
28Mohammad A. Naal [20]
29H. N. Nguyen [36]
30Gabriela Nicolescu [15]
31C. Nielsen [1] [14]
32Thomas Olbrich [7]
33Fabien Parrain [15] [16] [17]
34Eduardo J. Peralías [7]
35Guillaume Prenat [22] [23]
36Leandro Pulz [6]
37Márta Rencz [11] [15]
38Andrew Richardson [30]
39Luís Rolíndez [22] [23] [29] [31] [33] [35]
40C. Roman [19]
41Adoración Rueda [7] [9]
42Libor Rufer [21] [25] [26] [28] [34]
43Gilles Sicard [32]
44Emmanuel Simeu [20] [25] [33] [35] [36]
45Haralampos-G. D. Stratigopoulos [38] [39]
46Stephen K. Sunter [24]
47Vladimir Székely [11]
48Jeanne Tongbong [37] [38]
49Diego Vázquez [9] [23]
50D. Veychard [8]
51Nacer-Eddine Zergainoh [15]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)