2007 |
27 | EE | Jonathan Borremans,
Ludwig De Locht,
Piet Wambacq,
Yves Rolain:
Nonlinearity analysis of Analog/RF circuits using combined multisine and volterra analysis.
DATE 2007: 261-266 |
26 | EE | Andrew Fort,
Mike Chen,
Robert W. Brodersen,
Claude Desset,
Piet Wambacq,
Leo Van Biesen:
Impact of Sampling Jitter on Mostly-Digital Architectures for UWB Bio-Medical Applications.
ICC 2007: 5769-5774 |
25 | EE | Mustafa Badaroglu,
Geert Van der Plas,
Piet Wambacq,
Stéphane Donnay,
Georges G. E. Gielen,
Hugo De Man:
Scalable Gate-Level Models for Power and Timing Analysis.
ISCAS 2007: 2938-2941 |
24 | EE | Charlotte Soens,
Geert Van der Plas,
Piet Wambacq,
Stéphane Donnay:
Simulation Methodology for Analysis of Substrate Noise Impact on Analog / RF Circuits Including Interconnect Resistance
CoRR abs/0710.4723: (2007) |
2006 |
23 | EE | Andrew Fort,
Julien Ryckaert,
Claude Desset,
Philippe De Doncker,
Piet Wambacq,
Leo Van Biesen:
Ultra-wideband channel model for communication around the human body.
IEEE Journal on Selected Areas in Communications 24(4): 927-933 (2006) |
22 | EE | Mustafa Badaroglu,
Geert Van der Plas,
Piet Wambacq,
Stéphane Donnay,
Georges G. E. Gielen,
Hugo De Man:
SWAN: high-level simulation methodology for digital substrate noise generation.
IEEE Trans. VLSI Syst. 14(1): 23-33 (2006) |
21 | EE | Mustafa Badaroglu,
Kris Tiri,
Geert Van der Plas,
Piet Wambacq,
Ingrid Verbauwhede,
Stéphane Donnay,
Georges G. E. Gielen,
Hugo De Man:
Clock-skew-optimization methodology for substrate-noise reduction with supply-current folding.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(6): 1146-1154 (2006) |
2005 |
20 | EE | Charlotte Soens,
Geert Van der Plas,
Piet Wambacq,
Stéphane Donnay:
Simulation Methodology for Analysis of Substrate Noise Impact on Analog / RF Circuits Including Interconnect Resistance.
DATE 2005: 270-275 |
19 | EE | Mustafa Badaroglu,
Piet Wambacq,
Geert Van der Plas,
Stéphane Donnay,
Georges G. E. Gielen,
Hugo De Man:
Digital ground bounce reduction by supply current shaping and clock frequency Modulation.
IEEE Trans. on CAD of Integrated Circuits and Systems 24(1): 65-76 (2005) |
2004 |
18 | EE | Geert Van der Plas,
Mustafa Badaroglu,
Gerd Vandersteen,
Petr Dobrovolný,
Piet Wambacq,
Stéphane Donnay,
Georges G. E. Gielen,
Hugo De Man:
High-level simulation of substrate noise in high-ohmic substrates with interconnect and supply effects.
DAC 2004: 854-859 |
17 | EE | Mustafa Badaroglu,
Piet Wambacq,
Geert Van der Plas,
Stéphane Donnay,
Georges G. E. Gielen,
Hugo De Man:
Digital Ground Bounce Reduction by Phase Modulation of the Clock.
DATE 2004: 88-93 |
2003 |
16 | EE | Petr Dobrovolný,
Gerd Vandersteen,
Piet Wambacq,
Stéphane Donnay:
Analysis and White-Box Modeling of Weakly Nonlinear Time-Varying Circuits.
DATE 2003: 10624-10629 |
15 | EE | Wolfgang Eberle,
Gerd Vandersteen,
Piet Wambacq,
Stéphane Donnay,
Georges G. E. Gielen,
Hugo De Man:
Behavioral Modeling and Simulation of a Mixed Analog/Digital Automatic Gain Control Loop in a 5 GHz WLAN Receiver.
DATE 2003: 10642-10649 |
14 | EE | Manuel Innocent,
Piet Wambacq,
Stéphane Donnay,
Harrie A. C. Tilmans,
Willy M. C. Sansen,
Hugo De Man:
An analytic Volterra-series-based model for a MEMS variable capacitor.
IEEE Trans. on CAD of Integrated Circuits and Systems 22(2): 124-131 (2003) |
13 | EE | Petr Dobrovolný,
Gerd Vandersteen,
Piet Wambacq,
Stéphane Donnay:
Analysis and compact behavioral modeling of nonlinear distortion in analog communication circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 22(9): 1215-1227 (2003) |
2002 |
12 | EE | Mustafa Badaroglu,
Kris Tiri,
Stéphane Donnay,
Piet Wambacq,
Hugo De Man,
Ingrid Verbauwhede,
Georges G. E. Gielen:
Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients.
DAC 2002: 399-404 |
11 | EE | Michaël Goffioul,
Piet Wambacq,
Gerd Vandersteen,
Stéphane Donnay:
Analysis of Nonlinearities in RF Front-End Architectures Using a Modified Volterra Series Approach .
DATE 2002: 352-356 |
10 | EE | Gerd Vandersteen,
Piet Wambacq,
Stéphane Donnay,
Frans Verbeyst:
High-Frequency Nonlinear Amplifier Model for the Efficient Evaluation of Inband Distortion Under Nonlinear Load-Pull Conditions.
DATE 2002: 586-591 |
2001 |
9 | EE | Gerd Vandersteen,
Piet Wambacq,
Yves Rolain,
Johan Schoukens,
Stéphane Donnay,
Marc Engels,
Ivo Bolsens:
Efficient bit-error-rate estimation of multicarrier transceivers.
DATE 2001: 164-168 |
8 | EE | Piet Wambacq,
Gerd Vandersteen,
Joel R. Phillips,
Jaijeet S. Roychowdhury,
Wolfgang Eberle,
Baolin Yang,
David E. Long,
Alper Demir:
CAD for RF circuits.
DATE 2001: 520-529 |
7 | EE | Ralf Brederlow,
Werner Weber,
Joseph Sauerer,
Stéphane Donnay,
Piet Wambacq,
Maarten Vertregt:
A Mixed-Signal Design Roadmap.
IEEE Design & Test of Computers 18(6): 34-46 (2001) |
2000 |
6 | EE | Gerd Vandersteen,
Piet Wambacq,
Yves Rolain,
Petr Dobrovolný,
Stéphane Donnay,
Marc Engels,
Ivo Bolsens:
A methodology for efficient high-level dataflow simulation of mixed-signal front-ends of digital telecom transceivers.
DAC 2000: 440-445 |
5 | EE | Piet Wambacq,
Petr Dobrovolný,
Stéphane Donnay,
Marc Engels,
Ivo Bolsens:
Compact Modeling of Nonlinear Distortion in Analog Communication Circuits.
DATE 2000: 350- |
1999 |
4 | EE | Piet Wambacq,
Stéphane Donnay,
Hocine Ziad,
Marc Engels,
Hugo De Man,
Ivo Bolsens:
A Single-Package Solution for Wireless Transceivers.
DATE 1999: 425- |
1995 |
3 | | Georges G. E. Gielen,
Geert Debyser,
Piet Wambacq,
Koen Swings,
Willy M. C. Sansen:
Use of Symbolic Analysis in Analog Circuit Synthesis.
ISCAS 1995: 2205-2208 |
1994 |
2 | | Christiaan Fivez,
Piet Wambacq,
Emiel Schoeters,
André Oosterlinck,
Piet Vuylsteke:
A Novel Method for Scattered Radiation Compensation in X-Ray Imaging Systems, Using Partially Transparent Shields (PTS).
ICIP (3) 1994: 701-705 |
1 | | Francisco V. Fernández,
Piet Wambacq,
Georges G. E. Gielen,
Ángel Rodríguez-Vázquez,
Willy M. C. Sansen:
Symbolic Analysis of Large Analog Integrated Circuits by Approximation During Expression Generation.
ISCAS 1994: 25-28 |