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Oliver Bringmann

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2008
31EEMatthias Krause, Dominik Englert, Oliver Bringmann, Wolfgang Rosenstiel: Combination of instruction set simulation and abstract RTOS model execution for fast and accurate target software evaluation. CODES+ISSS 2008: 143-148
30EEJürgen Schnerr, Oliver Bringmann, Alexander Viehl, Wolfgang Rosenstiel: High-performance timing simulation of embedded software. DAC 2008: 290-295
29EEAlexander Viehl, Björn Sander, Oliver Bringmann, Wolfgang Rosenstiel: Integrated Requirement Evaluation of Non-Functional System-on-Chip Properties. FDL 2008: 105-110
28EEJochen Zimmermann, Oliver Bringmann, Joachim Gerlach, Florian Schaefer, Ulrich Nageldinger: Comprehensive Platform and Component Modeling of Heterogeneous Interconnected Systems (invited). FDL 2008: 227-232
2007
27EEAxel Siebenborn, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel: Control-Flow Aware Communication and Conflict Analysis of Parallel Processes. ASP-DAC 2007: 32-37
26EEAlexander Viehl, Markus Schwarz, Oliver Bringmann, Wolfgang Rosenstiel: Probabilistic performance risk analysis at system-level. CODES+ISSS 2007: 185-190
25EEMatthias Krause, Oliver Bringmann, André Hergenhan, Gökhan Tabanoglu, Wolfgang Rosenstiel: Timing simulation of interconnected AUTOSAR software-components. DATE 2007: 474-479
24EETimo Schönwald, Jochen Zimmermann, Oliver Bringmann, Wolfgang Rosenstiel: Fully Adaptive Fault-Tolerant Routing Algorithm for Network-on-Chip Architectures. DSD 2007: 527-534
23EEAlexander Viehl, Markus Schwarz, Oliver Bringmann, Wolfgang Rosenstiel: A Hybrid Approach for System-Level Design Evaluation. IESS 2007: 165-178
22EEJürgen Schnerr, Oliver Bringmann, Wolfgang Rosenstiel: Cycle Accurate Binary Translation for Simulation Acceleration in Rapid Prototyping of SoCs CoRR abs/0710.4644: (2007)
2006
21EEAbdelmajid Bouajila, Andreas Bernauer, Andreas Herkersdorf, Wolfgang Rosenstiel, Oliver Bringmann, Walter Stechele: Error Detection Techniques Applicable in an Architecture Framework and Design Methodology for Autonomic SoCs. BICC 2006: 107-113
20EEWolfgang Klingauf, Robert Günzel, Oliver Bringmann, Pavel Parfuntseu, Mark Burton: GreenBus: a generic interconnect fabric for transaction level modelling. DAC 2006: 905-910
19EEAlexander Viehl, Timo Schönwald, Oliver Bringmann, Wolfgang Rosenstiel: Formal performance analysis and simulation of UML/SysML models for ESL design. DATE 2006: 242-247
18 Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel, Abdelmajid Bouajila, Walter Stechele, Andreas Herkersdorf: An Architecture for Runtime Evaluation of SoC Reliability. GI Jahrestagung (1) 2006: 177-
17EEAbdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel: Organic Computing at the System on Chip Level. VLSI-SoC 2006: 338-341
2005
16 Gabriel Lipsa, Andreas Herkersdorf, Wolfgang Rosenstiel, Oliver Bringmann, Walter Stechele: Towards a Framework and a Design Methodology for Autonomous SoC. ARCS Workshops 2005: 101-108
15EEOliver Bringmann, Wolfgang Rosenstiel, Axel Siebenborn: Conflict analysis in multiprocess synthesis for optimized system integration. CODES+ISSS 2005: 15-20
14EEJürgen Schnerr, Oliver Bringmann, Wolfgang Rosenstiel: Cycle Accurate Binary Translation for Simulation Acceleration in Rapid Prototyping of SoCs. DATE 2005: 792-797
13EEAxel Braun, Joachim Gerlach, Wolfgang Rosenstiel, Axel Siebenborn, Oliver Bringmann: SystemC-Based Communication and Performance Analysis. FDL 2005: 33-48
12EEGabriel Lipsa, Andreas Herkersdorf, Wolfgang Rosenstiel, Oliver Bringmann, Walter Stechele: Towards a Framework and a Design Methodology for Autonomic SoC. ICAC 2005: 391-392
2004
11EEAxel Siebenborn, Oliver Bringmann, Wolfgang Rosenstiel: Communication Analysis for System-On-Chip Design. DATE 2004: 648-655
10EEAxel Siebenborn, Oliver Bringmann, Wolfgang Rosenstiel: Communication Analysis for Network-on-Chip Design. PARELEC 2004: 315-320
2002
9EEAxel Siebenborn, Oliver Bringmann, Wolfgang Rosenstiel: Worst-case performance analysis of parallel, communicating software processes. CODES 2002: 37-42
8EEOliver Bringmann, Wolfgang Rosenstiel, Carsten Menn: Controller Estimation for FPGA Target Architectures during High-Level Synthesis. ISSS 2002: 56-61
2000
7EEOliver Bringmann, Wolfgang Rosenstiel, Carsten Menn: Target Architecture Oriented High-Level Synthesis for Multi-FPGA Based Emulation. DATE 2000: 326-332
1999
6 Oliver Bringmann, Wolfgang Rosenstiel: Hierarchische Synthese für die Emulation von integrierten Steuerungssystemen. GI Jahrestagung 1999: 146-153
5EEOliver Bringmann, Wolfgang Rosenstiel, Annette Muth, Georg Färber, Frank Slomka, Richard Hofmann: Mixed Abstraction Level Hardware Synthesis from SDL for Rapid Prototyping. IEEE International Workshop on Rapid System Prototyping 1999: 114-119
1998
4EEOliver Bringmann, Wolfgang Rosenstiel: Cross-Level Hierarchical High-Level Synthesis. DATE 1998: 451-456
3EEOliver Bringmann, Wolfgang Rosenstiel, Dirk Reichardt: Synchronization Detection for Multi-Process Hierarchical Synthesis. ISSS 1998: 105-110
1997
2EEOliver Bringmann, Wolfgang Rosenstiel: Resource sharing in hierarchical synthesis. ICCAD 1997: 318-325
1995
1EEUlrich Weinmann, Oliver Bringmann, Wolfgang Rosenstiel: Device selection for system partitioning. EURO-DAC 1995: 2-7

Coauthor Index

1Andreas Bernauer [17] [18] [21]
2Abdelmajid Bouajila [17] [18] [21]
3Axel Braun [13]
4Mark Burton [20]
5Dominik Englert [31]
6Georg Färber [5]
7Joachim Gerlach [13] [28]
8Robert Günzel [20]
9André Hergenhan [25]
10Andreas Herkersdorf [12] [16] [17] [18] [21]
11Richard Hofmann [5]
12Wolfgang Klingauf [20]
13Matthias Krause [25] [31]
14Gabriel Lipsa [12] [16]
15Carsten Menn [7] [8]
16Annette Muth [5]
17Ulrich Nageldinger [28]
18Pavel Parfuntseu [20]
19Dirk Reichardt [3]
20Wolfgang Rosenstiel [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [21] [22] [23] [24] [25] [26] [27] [29] [30] [31]
21Björn Sander [29]
22Florian Schaefer [28]
23Jürgen Schnerr [14] [22] [30]
24Timo Schönwald [19] [24]
25Markus Schwarz [23] [26]
26Axel Siebenborn [9] [10] [11] [13] [15] [27]
27Frank Slomka [5]
28Walter Stechele [12] [16] [17] [18] [21]
29Gökhan Tabanoglu [25]
30Alexander Viehl [19] [23] [26] [27] [29] [30]
31Ulrich Weinmann [1]
32Johannes Zeppenfeld [17]
33Jochen Zimmermann [24] [28]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)