Ilya Issenin

2009
17	EE	Aviral Shrivastava, Ilya Issenin, Nikil Dutt, Sanghyun Park, Yunheung Paek: Compiler-in-the-Loop Design Space Exploration Framework for Energy Reduction in Horizontally Partitioned Cache Architectures. IEEE Trans. on CAD of Integrated Circuits and Systems 28(3): 461-465 (2009)
16	EE	Doosan Cho, Sudeep Pasricha, Ilya Issenin, Nikil D. Dutt, Minwook Ahn, Yunheung Paek: Adaptive Scratch Pad Memory Management for Dynamic Behavior of Multimedia Applications. IEEE Trans. on CAD of Integrated Circuits and Systems 28(4): 554-567 (2009)
2008
15	EE	Aviral Shrivastava, Ilya Issenin, Nikil Dutt: A Compiler-in-the-Loop framework to explore Horizontally Partitioned Cache architectures. ASP-DAC 2008: 328-333
14	EE	Doosan Cho, Sudeep Pasricha, Ilya Issenin, Nikil Dutt, Yunheung Paek, SunJun Ko: Compiler driven data layout optimization for regular/irregular array access patterns. LCTES 2008: 41-50
13	EE	Ilya Issenin, Erik Brockmeyer, Bart Durinck, Nikil D. Dutt: Data-Reuse-Driven Energy-Aware Cosynthesis of Scratch Pad Memory and Hierarchical Bus-Based Communication Architecture for Multiprocessor Streaming Applications. IEEE Trans. on CAD of Integrated Circuits and Systems 27(8): 1439-1452 (2008)
12	EE	Ilya Issenin, Nikil Dutt: Using FORAY Models to Enable MPSoC Memory Optimizations. International Journal of Parallel Programming 36(1): 93-113 (2008)
2007
11	EE	Doosan Cho, Ilya Issenin, Nikil Dutt, Jonghee W. Yoon, Yunheung Paek: Software controlled memory layout reorganization for irregular array access patterns. CASES 2007: 179-188
10	EE	Ilya Issenin, Nikil Dutt: Data Reuse Driven Memory and Network-On-Chip Co-Synthesis. IESS 2007: 299-312
9	EE	Ilya Issenin, Erik Brockmeyer, Miguel Miranda, Nikil Dutt: DRDU: A data reuse analysis technique for efficient scratch-pad memory management. ACM Trans. Design Autom. Electr. Syst. 12(2): (2007)
8	EE	Ilya Issenin, Nikil Dutt: FORAY-GEN: Automatic Generation of Affine Functions for Memory Optimizations CoRR abs/0710.4640: (2007)
2006
7	EE	Kyoungwoo Lee, Aviral Shrivastava, Ilya Issenin, Nikil Dutt, Nalini Venkatasubramanian: Mitigating soft error failures for multimedia applications by selective data protection. CASES 2006: 411-420
6	EE	Ilya Issenin, Nikil Dutt: Data reuse driven energy-aware MPSoC co-synthesis of memory and communication architecture for streaming applications. CODES+ISSS 2006: 294-299
5	EE	Ilya Issenin, Erik Brockmeyer, Bart Durinck, Nikil Dutt: Multiprocessor system-on-chip data reuse analysis for exploring customized memory hierarchies. DAC 2006: 49-52
2005
4	EE	Aviral Shrivastava, Ilya Issenin, Nikil Dutt: Compilation techniques for energy reduction in horizontally partitioned cache architectures. CASES 2005: 90-96
3	EE	Ilya Issenin, Nikil D. Dutt: FORAY-GEN: Automatic Generation of Affine Functions for Memory Optimizations. DATE 2005: 808-813
2004
2	EE	Ilya Issenin, Erik Brockmeyer, Miguel Miranda, Nikil Dutt: Data Reuse Analysis Technique for Software-Controlled Memory Hierarchies. DATE 2004: 202-207
2002
1	EE	Ana Azevedo, Ilya Issenin, Radu Cornea, Rajesh Gupta, Nikil D. Dutt, Alexander V. Veidenbaum, Alexandru Nicolau: Profile-Based Dynamic Voltage Scheduling Using Program Checkpoints. DATE 2002: 168-175

Coauthor Index

1	Minwook Ahn	[16]
2	Ana Azevedo	[1]
3	Erik Brockmeyer	[2] [5] [9] [13]
4	Doosan Cho	[11] [14] [16]
5	Radu Cornea	[1]
6	Bart Durinck	[5] [13]
7	Nikil D. Dutt (Nikil Dutt)	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17]
8	Rajesh K. Gupta (Rajesh Gupta)	[1]
9	SunJun Ko	[14]
10	Kyoungwoo Lee	[7]
11	Miguel Miranda	[2] [9]
12	Alexandru Nicolau (Alex Nicolau)	[1]
13	Yunheung Paek	[11] [14] [16] [17]
14	Sanghyun Park	[17]
15	Sudeep Pasricha	[14] [16]
16	Aviral Shrivastava	[4] [7] [15] [17]
17	Alexander V. Veidenbaum	[1]
18	Nalini Venkatasubramanian	[7]
19	Jonghee W. Yoon	[11]