2009 | ||
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65 | EE | Reouven Elbaz, David Champagne, Catherine H. Gebotys, Ruby B. Lee, Nachiketh R. Potlapally, Lionel Torres: Hardware Mechanisms for Memory Authentication: A Survey of Existing Techniques and Engines. Transactions on Computational Science 4: 1-22 (2009) |
2008 | ||
64 | EE | Benoît Badrignans, Reouven Elbaz, Lionel Torres: Secure FPGA configuration architecture preventing system downgrade. FPL 2008: 317-322 |
63 | EE | Yoann Guillemenet, Lionel Torres, Gilles Sassatelli, Nicolas Bruchon, Ilham Hassoune: A non-volatile run-time FPGA using thermally assisted switching MRAMS. FPL 2008: 421-426 |
62 | EE | Diego Puschini, Fabien Clermidy, Pascal Benoit, Gilles Sassatelli, Lionel Torres: Convergence analysis of run-time distributed optimization on adaptive systems using game theory. FPL 2008: 555-558 |
61 | EE | Nicolas Saint-Jean, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert: Bio-inspiration helps computers: A new machine. FPL 2008: 697-698 |
60 | EE | Nicolas Saint-Jean, Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert: MPI-Based Adaptive Task Migration Support on the HS-Scale System. ISVLSI 2008: 105-110 |
59 | EE | Diego Puschini, Fabien Clermidy, Pascal Benoit, Gilles Sassatelli, Lionel Torres: Temperature-Aware Distributed Run-Time Optimization on MP-SoC Using Game Theory. ISVLSI 2008: 375-380 |
58 | EE | Thomas Ordas, Mathieu Lisart, Etienne Sicard, Philippe Maurine, Lionel Torres: Near-Field Mapping System to Scan in Time Domain the Magnetic Emissions of Integrated Circuits. PATMOS 2008: 229-236 |
57 | EE | Rafael Soares, Ney Laert Vilar Calazans, Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert: Evaluating the robustness of secure triple track logic through prototyping. SBCCI 2008: 193-198 |
2007 | ||
56 | EE | Reouven Elbaz, David Champagne, Ruby B. Lee, Lionel Torres, Gilles Sassatelli, Pierre Guillemin: TEC-Tree: A Low-Cost, Parallelizable Tree for Efficient Defense Against Memory Replay Attacks. CHES 2007: 289-302 |
55 | EE | Benoît Godard, Jean Michel Daga, Lionel Torres, Gilles Sassatelli: Evaluation of design for reliability techniques in embedded flash memories. DATE 2007: 1593-1598 |
54 | Benoît Godard, Jean Michel Daga, Lionel Torres, Gilles Sassatelli: Architecture for Highly Reliable Embedded Flash Memories. DDECS 2007: 75-80 | |
53 | EE | Gilles Sassatelli, Nicolas Saint-Jean, Pascal Benoit, Lionel Torres, Michel Robert, Cristiane R. Woszezenki, Ismael Grehs, Fernando Gehm Moraes: Run-time mapping and communication strategies for Homogeneous NoC-Based MPSoCs. FCCM 2007: 295-296 |
52 | EE | Nicolas Saint-Jean, Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert: Application Case Studies on HS-Scale, a MP-SOC for Embbeded Systems. ICSAMOS 2007: 88-95 |
51 | EE | Daniel Mesquita, Benoît Badrignans, Lionel Torres, Gilles Sassatelli, Michel Robert, Fernando Moraes: A Cryptographic Coarse Grain Reconfigurable Architecture Robust Against DPA. IPDPS 2007: 1-8 |
50 | EE | Nicolas Saint-Jean, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert: HS-Scale: a Hardware-Software Scalable MP-SOC Architecture for embedded Systems. ISVLSI 2007: 21-28 |
49 | EE | Nicolas Bruchon, Lionel Torres, Gilles Sassatelli, Gaston Cambon: Technological hybridization for efficient runtime reconfigurable FPGAs. ISVLSI 2007: 29-34 |
48 | Eduardo Wanderley Netto, Reouven Elbaz, Lionel Torres, Gilles Sassatelli, Romain Vaslin, Guy Gogniat, Jean-Philippe Diguet: IBC-EI: An Instruction Based Compression method with Encryption and Integrity Checking. ReCoSoC 2007: 138-145 | |
47 | Nicolas Saint-Jean, Camille Jalier, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert: HS Scale: A run-time adaptable MP-SoC architecture. ReCoSoC 2007: 39-46 | |
46 | EE | Reouven Elbaz, Lionel Torres, Gilles Sassatelli, Pierre Guillemin, C. Anguille, Michel Bardouillet, Christian Buatois, Jean-Baptiste Rigaud: Hardware Engines for Bus Encryption: A Survey of Existing Techniques CoRR abs/0710.4803: (2007) |
2006 | ||
45 | Gilles Sassatelli, Leandro Soares Indrusiak, Manfred Glesner, Lionel Torres: Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2006, Montpellier, France, July 2006 Univ. Montpellier II 2006 | |
44 | EE | Alex Ngouanga, Gilles Sassatelli, Lionel Torres, Thierry Gil, André Borin Suarez, Altamiro Amadeu Susin: Run-Time Resources Management on Coarse Grained, Packet-Switching Reconfigurable Architecture: A Case Study Through the APACHES' Platform. ARC 2006: 134-145 |
43 | EE | Reouven Elbaz, Lionel Torres, Gilles Sassatelli, Pierre Guillemin, Michel Bardouillet, Albert Martinez: A parallelized way to provide data encryption and integrity checking on a processor-memory bus. DAC 2006: 506-509 |
42 | Reouven Elbaz, Lionel Torres, Gilles Sassatelli, Pierre Guillemin, Michel Bardouillet: PE-ICE: Parallelized Encryption and Integrity Checking Engine. DDECS 2006: 143-144 | |
41 | Alex Ngouanga, Gilles Sassatelli, Lionel Torres, André Borin Soares, Altamiro Amadeu Susin: A Contextual Resources use: a Proof of Concept through the APACHES' Platform. DDECS 2006: 44-49 | |
40 | EE | Nicolas Bruchon, Lionel Torres, Gilles Sassatelli, Gaston Cambon: Magnetic tunnelling junction based FPGA. FPGA 2006: 123-130 |
39 | EE | Daniel Mesquita, Benoît Badrignans, Lionel Torres, Gilles Sassatelli, Michel Robert, Jean-Claude Bajard, Fernando Gehm Moraes: A Leak Resistant Architecture Against Side Channel Attacks. FPL 2006: 1-4 |
38 | EE | Nicolas Valette, Lionel Torres, Gilles Sassatelli, Frédéric Bancel: Securing embedded programmable gate arrays in secure circuits. IPDPS 2006 |
37 | EE | Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon, Jürgen Becker: Dynamic Hardware Multiplexing: Improving Adaptability with a Run Time Reconfiguration Manager. ISVLSI 2006: 251-256 |
36 | EE | Nicolas Bruchon, Lionel Torres, Gilles Sassatelli, Gaston Cambon: New non-volatile FPGA concept using Magnetic Tunneling Junction. ISVLSI 2006: 269-276 |
35 | EE | Reouven Elbaz, Lionel Torres, Gilles Sassatelli, Pierre Guillemin, Michel Bardouillet, Albert Martinez: A Comparison of Two Approaches Providing Data Encryption and Authentication on a Processor Memory Bus. PATMOS 2006: 267-279 |
34 | Nicolas Bruchon, Lionel Torres, Gilles Sassatelli, Gaston Cambon: Remanent SRAM Structure for Runtime Reconfigurable FPGA. ReCoSoC 2006: 124-130 | |
33 | Benoît Badrignans, Daniel Mesquita, Jean-Claude Bajard, Lionel Torres, Gilles Sassatelli, Michel Robert: A Parallel and Secure Architecture for Asymmetric Cryptography. ReCoSoC 2006: 220-224 | |
32 | Viktor Fischer, Lionel Torres, Daniel Mesquita: Flexible security and its technology limits. ReCoSoC 2006: 243-248 | |
31 | Nicolas Valette, Lionel Torres, Gilles Sassatelli, S. Bancel: How to Secure Embedded Programmable Gate Arrays? ReCoSoC 2006: 52-59 | |
30 | Reouven Elbaz, Lionel Torres, Gilles Sassatelli, Pierre Guillemin, Michel Bardouillet, Albert Martinez: Efficient Combination of Data Encryption and Integrity Checking for Embedded Systems. ReCoSoC 2006: 69-75 | |
2005 | ||
29 | Gilles Sassatelli, Manfred Glesner, Lionel Torres, Leandro Soares Indrusiak, Thomas Hollstein: Proceedings of the 1st International Workshop on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2005, Montpellier, France, June 2005 Univ. Montpellier II 2005 | |
28 | EE | Reouven Elbaz, Lionel Torres, Gilles Sassatelli, Pierre Guillemin, C. Anguille, Michel Bardouillet, Christian Buatois, Jean-Baptiste Rigaud: Hardware Engines for Bus Encryption: A Survey of Existing Techniques. DATE 2005: 40-45 |
27 | EE | Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon: Dynamic hardware multiplexing for coarse grain reconfigurable architectures. FPGA 2005: 270 |
26 | Nicolas Bruchon, Gaston Cambon, Lionel Torres, Gilles Sassatelli: Magnetic remanent memory structures for dynamically reconfigurable fine grain FPGA. FPL 2005: 687-690 | |
25 | Pascal Benoit, Jürgen Becker, Michel Robert, Lionel Torres, Gilles Sassatelli, Gaston Cambon: Run-Time Scheduling for Random Multi-Tasking in Reconfigurable Coprocessors. FPL 2005: 703-706 | |
24 | EE | Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon: Automatic Task Scheduling / Loop Unrolling using Dedicated RTR Controllers in Coarse Grain Reconfigurable Architectures. IPDPS 2005 |
23 | Nicolas Bruchon, Gaston Cambon, Lionel Torres, Gilles Sassatelli: Non-volatile SRAM-FPGA based on magnetic tunnelling junction. ReCoSoC 2005: 113-120 | |
22 | Nicolas Valette, Lionel Torres, Frédéric Bancel, Nicolas Bérard: Integration of Reconfigurable Logic on Secure Circuits. ReCoSoC 2005: 163-168 | |
21 | Daniel Mesquita, Jean-Denis Techer, Lionel Torres, Gilles Sassatelli, Gaston Cambon, Michel Robert, Fernando Moraes: A new hardware countermeasure for masking power signatures of crypto cores. ReCoSoC 2005: 169-176 | |
20 | EE | Daniel Mesquita, Jean-Denis Techer, Lionel Torres, Gilles Sassatelli, Gaston Cambon, Michel Robert, Fernando Moraes: Current mask generation: a transistor level security against DPA attacks. SBCCI 2005: 115-120 |
19 | EE | Daniel Mesquita, Jean-Denis Techer, Lionel Torres, Michel Robert, Guy Cathebras, Gilles Sassatelli, Fernando Gehm Moraes: Current Mask Generation: an Analog Circuit to Thwart DPA Attacks. VLSI-SoC 2005: 317-330 |
18 | EE | Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert, Gaston Cambon, Didier Demigny: Méthode de caractérisation des architectures d'accélérateurs flexibles pour systèmes sur puce. Technique et Science Informatiques 24(6): 725-755 (2005) |
2004 | ||
17 | EE | Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert, Gaston Cambon: Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability. SAMOS 2004: 128-137 |
16 | Solaiman Rahim, Bruno Rouzeyre, Lionel Torres: A Flip-Flop Matching Engine to Verify Sequential Optimizations. Computers and Artificial Intelligence 23(5): (2004) | |
2003 | ||
15 | EE | Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert, Gaston Cambon, Didier Demigny: A Novel Approach for Architectural Model Characterization. An Example through the Systolic Ring. FPL 2003: 722-732 |
14 | EE | Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert, Gaston Cambon: Metrics for Reconfigurable Architectures Characterization: Remanence and Scalability. IPDPS 2003: 176 |
13 | Daniel Mesquita, Lionel Torres, Fernando Gehm Moraes, Gilles Sassatelli, Michel Robert: Are coarse grain reconfigurable architectures suitable for cryptography? VLSI-SOC 2003: 276-281 | |
2002 | ||
12 | EE | Gilles Sassatelli, Lionel Torres, Pascal Benoit, Thierry Gil, Camille Diou, Gaston Cambon, Jérôme Galy: Highly Scalable Dynamically Reconfigurable Systolic Ring-Architecture for DSP Applications. DATE 2002: 553-558 |
11 | Christel-Loic Tisse, Lionel Martin, Lionel Torres, Michel Robert: Iris recognition system for person identification. PRIS 2002: 186-199 | |
2001 | ||
10 | EE | Gilles Sassatelli, Lionel Torres, Jérôme Galy, Gaston Cambon, Camille Diou: The Systolic Ring: A Dynamically Reconfigurable Architecture for Embedded Systems. FPL 2001: 409-419 |
9 | EE | Gilles Sassatelli, Gaston Cambon, Jérôme Galy, Lionel Torres: A Dynamically Reconfigurable Architecture for Embedded Systems. IEEE International Workshop on Rapid System Prototyping 2001: 32-37 |
8 | Gilles Sassatelli, Lionel Torres, Pascal Benoit, Gaston Cambon, Michel Robert, Jérôme Galy: Dynamically Reconfigurable Architectures for Digital Signal Processing Applications. VLSI-SOC 2001: 63-74 | |
2000 | ||
7 | Camille Diou, Lionel Torres, Michel Robert: A Wavelet Core for Video Processing. ICIP 2000 | |
1999 | ||
6 | EE | Sébastien Pillement, Lionel Torres, Michel Robert, Gaston Cambon: Fast Prototyping: A Case Study - The JPEG Compression Algorithm. IEEE International Workshop on Rapid System Prototyping 1999: 87- |
5 | Camille Diou, Lionel Torres, Michel Robert: Implementation of a Wavelet Transform Architecture for Image Processing. VLSI 1999: 101-112 | |
4 | S. Raimbault, Gilles Sassatelli, Gamille Cambon, Michel Robert, Sébastien Pillement, Lionel Torres: Embedded Systems Design And Verification: Reuse Oriented Prototyping Methodologies. VLSI 1999: 407-414 | |
1998 | ||
3 | EE | Lionel Torres, El-Bay Bourennane, Michel Robert, Michel Paindavoine: A Recursive Digital Filter Implementation for Noisy and Blurred Images. Real-Time Imaging 4(3): 181-191 (1998) |
1996 | ||
2 | Sébastien Pillement, Lionel Torres, Michel Robert, Gaston Cambon: Concurrent Design of Hardware/Software Dedicated Systems. FPL 1996: 410-414 | |
1994 | ||
1 | Michel Robert, Lionel Torres, Fernando Moraes, Daniel Auvergne: Influence of Locig Block Layout Architecture on FPGA Performance. FPL 1994: 34-44 |