2009 | ||
---|---|---|
54 | EE | Amir-Mohammad Rahmani, Masoud Daneshtalab, Ali Afzali-Kusha, Saeed Safari, Massoud Pedram: Forecasting-Based Dynamic Virtual Channels Allocation for Power Optimization of Network-on-Chips. VLSI Design 2009: 151-156 |
53 | EE | Amir-Mohammad Rahmani, I. Kamali, Pejman Lotfi-Kamran, Ali Afzali-Kusha, Saeed Safari: Negative Exponential Distribution Traffic Pattern for Power/Performance Analysis of Network on Chips. VLSI Design 2009: 157-162 |
52 | EE | Bardia Bozorgzadeh, Ali Afzali-Kusha: Novel MOS Decoupling Capacitor Optimization Technique for Nanotechnologies. VLSI Design 2009: 175-180 |
2008 | ||
51 | EE | Behzad Ebrahimi, Saeed Zeinolabedinzadeh, Ali Afzali-Kusha: Low Standby Power and Robust FinFET Based SRAM Design. ISVLSI 2008: 185-190 |
50 | EE | Pejman Lotfi-Kamran, Amir-Mohammad Rahmani, Ali-Asghar Salehpour, Ali Afzali-Kusha, Zainalabedin Navabi: Stall Power Reduction in Pipelined Architecture Processors. VLSI Design 2008: 541-546 |
49 | EE | Ali Abbasian, Safar Hatami, Ali Afzali-Kusha, Massoud Pedram: Wavelet-based dynamic power management for nonstationary service requests. ACM Trans. Design Autom. Electr. Syst. 13(1): (2008) |
2007 | ||
48 | EE | Mostafa Savadi Oskooei, Ali Afzali-Kusha, Seyed Mojtaba Atarodi: A High-Speed and Low-Power Voltage Controlled Oscillator in 0.18-µm CMOS Process. ISCAS 2007: 933-936 |
47 | EE | Mohammad Azim Karami, Ali Afzali-Kusha, Reza Faraji-Dana, Masoud Rostami: Quantitative Comparison of Optical and Electrical H, X, and Y clock Distribution Networks. ISVLSI 2007: 488-489 |
46 | EE | Vahid Moalemi, Ali Afzali-Kusha: Subthreshold Pass Transistor Logic for Ultra-Low Power Operation. ISVLSI 2007: 490-491 |
45 | EE | Vahid Moalemi, Ali Afzali-Kusha: Subthreshold 1-Bit Full Adder Cells in sub-100 nm Technologies. ISVLSI 2007: 514-515 |
44 | EE | Masoud Daneshtalab, A. Pedram, Mohammad Hossein Neishaburi, M. Riazati, Ali Afzali-Kusha, Simak Mohammadi: Distributing Congestions in NoCs through a Dynamic Routing Algorithm based on Input and Output Selections. VLSI Design 2007: 546-550 |
43 | EE | Shervin Sharifi, Javid Jaffari, Mohammad Hosseinabady, Ali Afzali-Kusha, Zainalabedin Navabi: Simultaneous Reduction of Dynamic and Static Power in Scan Structures CoRR abs/0710.4653: (2007) |
42 | EE | A. Amirabadi, Ali Afzali-Kusha, Y. Mortazavi, Mehrdad Nourani: Clock Delayed Domino Logic With Efficient Variable Threshold Voltage Keeper. IEEE Trans. VLSI Syst. 15(2): 125-134 (2007) |
2006 | ||
41 | EE | Mahdi Nazm Bojnordi, Nariman Moezzi Madani, Mehdi Semsarzadeh, Ali Afzali-Kusha: An Efficient Clocking Scheme for On-Chip Communications. APCCAS 2006: 119-122 |
40 | EE | Fatemeh Aezinia, S. Najafzadeh, Ali Afzali-Kusha: Novel High Speed and Low Power Single and Double Edge-Triggered Flip-Flops. APCCAS 2006: 1383-1386 |
39 | EE | Nima Honarmand, Ali Afzali-Kusha: Low Power Combinational Multipliers using Data-driven Signal Gating. APCCAS 2006: 1430-1433 |
38 | EE | Fatemeh Aezinia, Ali Afzali-Kusha, Caro Lucas: Optimizing High Speed Flip-Flop Using Genetic Algorithm. APCCAS 2006: 1787-1790 |
37 | EE | Masoud Daneshtalab, Ashkan Sobhani, Ali Afzali-Kusha, Omid Fatemi, Zainalabedin Navabi: NoC Hot Spot minimization Using AntNet Dynamic Routing Algorithm. ASAP 2006: 33-38 |
36 | EE | S. H. Rasouli, A. Amirabadi, A. Seyedi, Ali Afzali-Kusha: Double edge triggered Feedback Flip-Flop in sub 100NM technology. ASP-DAC 2006: 297-302 |
35 | EE | Mehrdad Najibi, M. Salehi, Ali Afzali-Kusha, Massoud Pedram, Seid Mehdi Fakhraie, Hossein Pedram: Dynamic voltage and frequency management based on variable update intervals for frequency setting. ICCAD 2006: 755-760 |
34 | EE | Saeid Mehrmanesh, B. Eghbalkhah, Saeed Saeedi, Ali Afzali-Kusha, Seyed Mojtaba Atarodi: A compact low power mixed-signal equalizer for gigabit Ethernet applications. ISCAS 2006 |
33 | EE | Hadi Parandeh-Afshar, Ali Afzali-Kusha, Ali Khakifirooz: A very high performance address BUS encoder. ISCAS 2006 |
32 | EE | B. Kheradmand-Boroujeni, Fatemeh Aezinia, Ali Afzali-Kusha: High performance circuit techniques for dynamic OR gates. ISCAS 2006 |
31 | EE | A. Amirabadi, A. Chehelcheraghi, S. H. Rasouli, A. Seyedi, Ali Afzali-Kusha: Low power and high performance clock delayed domino logic using saturated keeper. ISCAS 2006 |
30 | EE | A. S. Seyedi, S. H. Rasouli, A. Amirabadi, Ali Afzali-Kusha: Low power low leakage clock gated static pulsed flip-flop. ISCAS 2006 |
29 | EE | M. Saneei, Ali Afzali-Kusha, Zainalabedin Navabi: Low-power and low-latency cluster topology for local traffic NoCs. ISCAS 2006 |
28 | EE | M. Riazati, Ashkan Sobhani, M. Mottaghi-Dastjerdi, Ali Afzali-Kusha, Ali Khakifirooz: Low-power multiplier with static decision for input manipulation. ISCAS 2006 |
27 | EE | Nima Honarmand, M. Reza Javaheri, Naser Sedaghati-Mokhtari, Ali Afzali-Kusha: Power efficient sequential multiplication using pre-computation. ISCAS 2006 |
26 | EE | G. Razavipour, A. Motamedi, Ali Afzali-Kusha: WL-VC SRAM: a low leakage memory circuit for deep sub-micron design. ISCAS 2006 |
25 | EE | A. S. Seyedi, S. H. Rasouli, A. Amirabadi, Ali Afzali-Kusha: Clock Gated Static Pulsed Flip-Flop (CGSPFF) in Sub 100 nm Technology. ISVLSI 2006: 373-377 |
24 | EE | Masood Dehyadgari, Mohsen Nickray, Ali Afzali-Kusha, Zainalabedin Navabi: A New Protocol Stack Model for Network on Chip. ISVLSI 2006: 440-441 |
23 | EE | Mohammad D. Mottaghi, Ali Afzali-Kusha, Zainalabedin Navabi: ByZFAD: a low switching activity architecture for shift-and-add multipliers. SBCCI 2006: 179-183 |
22 | EE | Masoud Daneshtalab, Ali Afzali-Kusha, Ashkan Sobhani, Zainalabedin Navabi, Mohammad D. Mottaghi, Omid Fatemi: Ant colony based routing architecture for minimizing hot spots in NOCs. SBCCI 2006: 56-61 |
21 | EE | Shervin Sharifi, Javid Jaffari, Mohammad Hosseinabady, Ali Afzali-Kusha, Zainalabedin Navabi: Scan-Based Structure with Reduced Static and Dynamic Power Consumption. J. Low Power Electronics 2(3): 477-487 (2006) |
2005 | ||
20 | EE | M. Saneei, Ali Afzali-Kusha, Zainalabedin Navabi: Sign bit reduction encoding for low power applications. DAC 2005: 214-217 |
19 | EE | Shervin Sharifi, Javid Jaffari, Mohammad Hosseinabady, Ali Afzali-Kusha, Zainalabedin Navabi: Simultaneous Reduction of Dynamic and Static Power in Scan Structures. DATE 2005: 846-851 |
18 | EE | Behnam Amelifard, Ali Afzali-Kusha, Ahmad Khademzadeh: Enhancing the efficiency of cluster voltage scaling technique for low-power application. ISCAS (2) 2005: 1666-1669 |
17 | EE | A. Amirabadi, Y. Mortazavi, Nariman Moezzi Madani, Ali Afzali-Kusha, Mehrdad Nourani: Domino logic with an efficient variable threshold voltage keeper. ISCAS (2) 2005: 1674-1677 |
16 | EE | Morteza Gholipour, Hamid Shojaee, Ali Afzali-Kusha, Ahmad Khademzadeh, Mehrdad Nourani: An efficient model for performance analysis of asynchronous pipeline design methods. ISCAS (5) 2005: 5234-5237 |
15 | EE | Mohammad Alisafaee, Safar Hatami, Ehsan Atoofian, Zainalabedin Navabi, Ali Afzali-Kusha: A low-power scan-path architecture. ISCAS (5) 2005: 5278-5281 |
14 | EE | B. Afkal, Ali Afzali-Kusha, Mahmoud El Nokali: Efficient power model for crossbar interconnects. ISCAS (6) 2005: 5858-5861 |
13 | EE | Mohammad Taherzadeh-Sani, Ali Abbasian, Behnam Amelifard, Ali Afzali-Kusha: Modeling of MOS transistors based on genetic algorithm and simulated annealing. ISCAS (6) 2005: 6218-6221 |
12 | EE | Davood Shahrjerdi, Bahman Hekmatshoar, Ali Khaki-Firooz, Ali Afzali-Kusha: Optimization of the VT control method for low-power ultra-thin double-gate SOI logic circuits. Integration 38(3): 505-513 (2005) |
2004 | ||
11 | EE | A. Amirabadi, Javid Jaffari, Ali Afzali-Kusha, Mehrdad Nourani, Ali Khaki-Firooz: Leakage current reduction by new technique in standby mode. ACM Great Lakes Symposium on VLSI 2004: 158-161 |
10 | Mohammad H. Tehranipour, Mehrdad Nourani, Karim Arabi, Ali Afzali-Kusha: Mixed RL-Huffman encoding for power reduction and data compression in scan test. ISCAS (2) 2004: 681-684 | |
9 | Ali Abbasian, Safar Hatami, Ali Afzali-Kusha, Mehrdad Nourani, Caro Lucas: Event-driven dynamic power management based on wavelet forecasting theory. ISCAS (5) 2004: 325-328 | |
8 | EE | R. Dehghani, Seyed Mojtaba Atarodi, B. Bornoosh, Ali Afzali-Kusha: A Reduced Complexity 3rd Order Digital Delta-Sigma Modulator for Fractional-N Frequency Synthesis. VLSI Design 2004: 615-618 |
7 | EE | Safar Hatami, M. Yaser Azizi, Hamid-Reza Bahrami, Davoud Motavalizadeh-Naeini, Ali Afzali-Kusha: Accurate and efficient modeling of SOI MOSFET with technology independent neural networks. IEEE Trans. on CAD of Integrated Circuits and Systems 23(11): 1580-1587 (2004) |
2003 | ||
6 | EE | Mohammad Yavari, Omid Shoaei, Ali Afzali-Kusha: A very low-voltage, low-power and high resolution sigma-delta modulator for digital audio in 0.25µm CMOS. ISCAS (1) 2003: 1045-1048 |
5 | EE | Ali Abbasian, S. H. Rasouli, Ali Afzali-Kusha, Mehrdad Nourani: No-race charge recycling complementary pass transistor logic (NCRCPL) for low power applications. ISCAS (5) 2003: 289-292 |
4 | EE | Mohammad H. Tehranipour, Mehrdad Nourani, Seid Mehdi Fakhraie, Ali Afzali-Kusha: Systematic test program generation for SoC testing using embedded processor. ISCAS (5) 2003: 541-544 |
3 | EE | Bahman Javadi, Mohsen Naderi, Hossein Pedram, Ali Afzali-Kusha, Mohammad K. Akbari: An Asynchronous Viterbi Decoder for Low-Power Applications. PATMOS 2003: 471-480 |
2002 | ||
2 | EE | M. Maddah, Ali Afzali-Kusha, Hamid Soltanian-Zadeha: Fast center-line extraction for quantification of vessels in confocal microscopy images. ISBI 2002: 461-464 |
2001 | ||
1 | EE | Hamid Mahmoodi-Meimand, Ali Afzali-Kusha: Efficient power clock generation for adiabatic logic. ISCAS (4) 2001: 642-645 |