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Jürgen Schnerr

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2008
4EEJürgen Schnerr, Oliver Bringmann, Alexander Viehl, Wolfgang Rosenstiel: High-performance timing simulation of embedded software. DAC 2008: 290-295
2007
3EEJürgen Schnerr, Oliver Bringmann, Wolfgang Rosenstiel: Cycle Accurate Binary Translation for Simulation Acceleration in Rapid Prototyping of SoCs CoRR abs/0710.4644: (2007)
2005
2EEJürgen Schnerr, Oliver Bringmann, Wolfgang Rosenstiel: Cycle Accurate Binary Translation for Simulation Acceleration in Rapid Prototyping of SoCs. DATE 2005: 792-797
2003
1EEJürgen Schnerr, Gunter Haug, Wolfgang Rosenstiel: Instruction Set Emulation for Rapid Prototyping of SoCs . DATE 2003: 10562-10569

Coauthor Index

1Oliver Bringmann [2] [3] [4]
2Gunter Haug [1]
3Wolfgang Rosenstiel [1] [2] [3] [4]
4Alexander Viehl [4]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)