| 2007 |
|---|
| 3 | EE | Stephane Bronckers,
Charlotte Soens,
Geert Van der Plas,
Gerd Vandersteen,
Yves Rolain:
Interactive presentation: Simulation methodology and experimental verification for the analysis of substrate noise on LC-VCO's.
DATE 2007: 1520-1525 |
| 2 | EE | Charlotte Soens,
Geert Van der Plas,
Piet Wambacq,
Stéphane Donnay:
Simulation Methodology for Analysis of Substrate Noise Impact on Analog / RF Circuits Including Interconnect Resistance
CoRR abs/0710.4723: (2007) |
| 2005 |
|---|
| 1 | EE | Charlotte Soens,
Geert Van der Plas,
Piet Wambacq,
Stéphane Donnay:
Simulation Methodology for Analysis of Substrate Noise Impact on Analog / RF Circuits Including Interconnect Resistance.
DATE 2005: 270-275 |
