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Charlotte Soens

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2007
3EEStephane Bronckers, Charlotte Soens, Geert Van der Plas, Gerd Vandersteen, Yves Rolain: Interactive presentation: Simulation methodology and experimental verification for the analysis of substrate noise on LC-VCO's. DATE 2007: 1520-1525
2EECharlotte Soens, Geert Van der Plas, Piet Wambacq, Stéphane Donnay: Simulation Methodology for Analysis of Substrate Noise Impact on Analog / RF Circuits Including Interconnect Resistance CoRR abs/0710.4723: (2007)
2005
1EECharlotte Soens, Geert Van der Plas, Piet Wambacq, Stéphane Donnay: Simulation Methodology for Analysis of Substrate Noise Impact on Analog / RF Circuits Including Interconnect Resistance. DATE 2005: 270-275

Coauthor Index

1Stephane Bronckers [3]
2Stéphane Donnay [1] [2]
3Geert Van der Plas [1] [2] [3]
4Yves Rolain [3]
5Gerd Vandersteen [3]
6Piet Wambacq [1] [2]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)